MIPS: Simplify ptrace_getfpregs FPU IR retrieval
All architecturally defined bits in the FPU implementation register are read only & unchanging. It contains some implementation-defined bits but the architecture manual states "This bits are explicitly not intended to be used for mode control functions" which seems to provide justification for viewing the register as a whole as unchanging. This being the case we can simply re-use the value we read at boot rather than having to re-read it later, and avoid the complexity which that read entails. Signed-off-by: Paul Burton <paul.burton@imgtec.com> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/6147/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
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1 changed files with 1 additions and 24 deletions
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@ -114,7 +114,6 @@ int ptrace_setregs(struct task_struct *child, __s64 __user *data)
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int ptrace_getfpregs(struct task_struct *child, __u32 __user *data)
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int ptrace_getfpregs(struct task_struct *child, __u32 __user *data)
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{
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{
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int i;
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int i;
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unsigned int tmp;
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if (!access_ok(VERIFY_WRITE, data, 33 * 8))
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if (!access_ok(VERIFY_WRITE, data, 33 * 8))
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return -EIO;
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return -EIO;
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@ -130,29 +129,7 @@ int ptrace_getfpregs(struct task_struct *child, __u32 __user *data)
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}
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}
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__put_user(child->thread.fpu.fcr31, data + 64);
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__put_user(child->thread.fpu.fcr31, data + 64);
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__put_user(current_cpu_data.fpu_id, data + 65);
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preempt_disable();
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if (cpu_has_fpu) {
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unsigned int flags;
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if (cpu_has_mipsmt) {
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unsigned int vpflags = dvpe();
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flags = read_c0_status();
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__enable_fpu(FPU_AS_IS);
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__asm__ __volatile__("cfc1\t%0,$0" : "=r" (tmp));
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write_c0_status(flags);
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evpe(vpflags);
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} else {
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flags = read_c0_status();
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__enable_fpu(FPU_AS_IS);
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__asm__ __volatile__("cfc1\t%0,$0" : "=r" (tmp));
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write_c0_status(flags);
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}
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} else {
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tmp = 0;
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}
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preempt_enable();
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__put_user(tmp, data + 65);
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return 0;
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return 0;
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}
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}
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