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DRM: SDE: Independent control of left/right global PA

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In the split display use case that has two DSPPs, we enabled the caller
to have different global PA value for each DSPP.

Change-Id: Ie19a48229a07e39fe20a5626aa18c065ad9946d6
Signed-off-by: Camus Wong <camusw@codeaurora.org>
This commit is contained in:
Camus Wong 2018-05-23 12:01:40 -04:00 • committed by Gerrit - the friendly Code Review server
parent 5db86ecc81
commit daf3fdb4aa
2 changed files with 19 additions and 0 deletions
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17
drivers/gpu/drm/msm/sde/sde_color_processing.c
View file

@ -444,6 +444,7 @@ static void sde_cp_crtc_setfeature(struct sde_cp_node *prop_node,
struct sde_hw_cp_cfg hw_cfg;
struct sde_hw_mixer *hw_lm;
struct sde_hw_dspp *hw_dspp;
struct drm_msm_pa_hsic *hsic_cfg;
u32 num_mixers = sde_crtc->num_mixers;
int i = 0;
bool feature_enabled = false;
@ -489,6 +490,22 @@ static void sde_cp_crtc_setfeature(struct sde_cp_node *prop_node,
ret = -EINVAL;
continue;
}
if (hw_cfg.payload && (hw_cfg.len ==
sizeof(struct drm_msm_pa_hsic))) {
/* hw_cfg is valid, check for feature flag */
hsic_cfg = (struct drm_msm_pa_hsic *)
hw_cfg.payload;
if ((hsic_cfg->flags &
PA_HSIC_LEFT_DISPLAY_ONLY) && (i > 0)) {
/* skip right side programming */
continue;
} else if ((hsic_cfg->flags &
PA_HSIC_RIGHT_DISPLAY_ONLY)
&& (i == 0)) {
/* skip left side programming */
continue;
}
}
hw_dspp->ops.setup_pa_hsic(hw_dspp, &hw_cfg);
break;
case SDE_CP_CRTC_DSPP_MEMCOLOR:

2
include/uapi/drm/msm_drm_pp.h
View file

@ -56,6 +56,8 @@ struct drm_msm_pa_vlut {
#define PA_HSIC_SAT_ENABLE (1 << 1)
#define PA_HSIC_VAL_ENABLE (1 << 2)
#define PA_HSIC_CONT_ENABLE (1 << 3)
#define PA_HSIC_LEFT_DISPLAY_ONLY (1 << 4)
#define PA_HSIC_RIGHT_DISPLAY_ONLY (1 << 5)
/**
* struct drm_msm_pa_hsic - pa hsic feature structure
* @flags: flags for the feature customization, values can be: