From db200c1e6ef1f429247370af6fd212b4eca729d0 Mon Sep 17 00:00:00 2001 From: Skylar Chang Date: Tue, 24 May 2016 16:27:17 -0700 Subject: [PATCH] msm: ipa3: fix to read hw tables from debugfs Fix to IPA driver debugfs logic to read filtering and routing directly from HW. CRs-Fixed: 1020271 Change-Id: I6bb5f9a01e3f41107d7b5bdf7c19557546573463 Acked-by: Ady Abraham Signed-off-by: Skylar Chang --- drivers/platform/msm/ipa/ipa_v3/ipa_debugfs.c | 4 ++++ drivers/platform/msm/ipa/ipa_v3/ipa_flt.c | 22 ++++++++++++++----- drivers/platform/msm/ipa/ipa_v3/ipa_rt.c | 22 ++++++++++++++----- 3 files changed, 38 insertions(+), 10 deletions(-) diff --git a/drivers/platform/msm/ipa/ipa_v3/ipa_debugfs.c b/drivers/platform/msm/ipa/ipa_v3/ipa_debugfs.c index 8d0fe0c9d205..12127a2304bb 100644 --- a/drivers/platform/msm/ipa/ipa_v3/ipa_debugfs.c +++ b/drivers/platform/msm/ipa/ipa_v3/ipa_debugfs.c @@ -694,6 +694,7 @@ static ssize_t ipa3_read_rt_hw(struct file *file, char __user *ubuf, if (!entry) return -ENOMEM; + IPA_ACTIVE_CLIENTS_INC_SIMPLE(); mutex_lock(&ipa3_ctx->lock); for (j = 0; j < num_tbls; j++) { pr_err("== NON HASHABLE TABLE tbl:%d ==\n", j); @@ -742,6 +743,7 @@ static ssize_t ipa3_read_rt_hw(struct file *file, char __user *ubuf, } mutex_unlock(&ipa3_ctx->lock); kfree(entry); + IPA_ACTIVE_CLIENTS_DEC_SIMPLE(); return 0; } @@ -866,6 +868,7 @@ static ssize_t ipa3_read_flt_hw(struct file *file, char __user *ubuf, if (!entry) return -ENOMEM; + IPA_ACTIVE_CLIENTS_INC_SIMPLE(); mutex_lock(&ipa3_ctx->lock); for (j = 0; j < ipa3_ctx->ipa_num_pipes; j++) { if (!ipa_is_ep_support_flt(j)) @@ -903,6 +906,7 @@ static ssize_t ipa3_read_flt_hw(struct file *file, char __user *ubuf, } mutex_unlock(&ipa3_ctx->lock); kfree(entry); + IPA_ACTIVE_CLIENTS_DEC_SIMPLE(); return 0; } diff --git a/drivers/platform/msm/ipa/ipa_v3/ipa_flt.c b/drivers/platform/msm/ipa/ipa_v3/ipa_flt.c index f49b16525211..f4307d2bf1a0 100644 --- a/drivers/platform/msm/ipa/ipa_v3/ipa_flt.c +++ b/drivers/platform/msm/ipa/ipa_v3/ipa_flt.c @@ -1821,6 +1821,7 @@ int ipa3_flt_read_tbl_from_hw(u32 pipe_idx, int rule_idx; u8 rule_size; int i; + void *ipa_sram_mmio; IPADBG("pipe_idx=%d ip_type=%d hashable=%d\n", pipe_idx, ip_type, hashable); @@ -1837,6 +1838,18 @@ int ipa3_flt_read_tbl_from_hw(u32 pipe_idx, return -EINVAL; } + /* map IPA SRAM */ + ipa_sram_mmio = ioremap(ipa3_ctx->ipa_wrapper_base + + ipa3_ctx->ctrl->ipa_reg_base_ofst + + ipahal_get_reg_n_ofst( + IPA_SRAM_DIRECT_ACCESS_n, + 0), + ipa3_ctx->smem_sz); + if (!ipa_sram_mmio) { + IPAERR("fail to ioremap IPA SRAM\n"); + return -ENOMEM; + } + memset(entry, 0, sizeof(*entry) * (*num_entry)); /* calculate the offset of the tbl entry */ tbl_entry_idx = 1; /* to skip the bitmap */ @@ -1870,16 +1883,14 @@ int ipa3_flt_read_tbl_from_hw(u32 pipe_idx, IPADBG("tbl_entry_in_hdr_ofst=0x%llx\n", tbl_entry_in_hdr_ofst); - tbl_entry_in_hdr = ipa3_ctx->mmio + - ipahal_get_reg_n_ofst(IPA_SRAM_DIRECT_ACCESS_n, 0) + - tbl_entry_in_hdr_ofst; + tbl_entry_in_hdr = ipa_sram_mmio + tbl_entry_in_hdr_ofst; /* for tables resides in DDR access it from the virtual memory */ if (*tbl_entry_in_hdr & 0x1) { /* local */ - hdr = (void *)(tbl_entry_in_hdr - + hdr = (void *)((u8 *)tbl_entry_in_hdr - tbl_entry_idx * IPA_HW_TBL_HDR_WIDTH + - (*tbl_entry_in_hdr - 1) * 16); + (*tbl_entry_in_hdr - 1) / 16); } else { /* system */ if (hashable) @@ -1921,6 +1932,7 @@ int ipa3_flt_read_tbl_from_hw(u32 pipe_idx, } *num_entry = rule_idx; + iounmap(ipa_sram_mmio); return 0; } diff --git a/drivers/platform/msm/ipa/ipa_v3/ipa_rt.c b/drivers/platform/msm/ipa/ipa_v3/ipa_rt.c index 0e3cecb5e4a8..34c5bdc9c65f 100644 --- a/drivers/platform/msm/ipa/ipa_v3/ipa_rt.c +++ b/drivers/platform/msm/ipa/ipa_v3/ipa_rt.c @@ -1843,6 +1843,7 @@ int ipa3_rt_read_tbl_from_hw(u32 tbl_idx, u8 *buf; int rule_idx; u8 rule_size; + void *ipa_sram_mmio; IPADBG("tbl_idx=%d ip_type=%d hashable=%d\n", tbl_idx, ip_type, hashable); @@ -1857,6 +1858,18 @@ int ipa3_rt_read_tbl_from_hw(u32 tbl_idx, return -EFAULT; } + /* map IPA SRAM */ + ipa_sram_mmio = ioremap(ipa3_ctx->ipa_wrapper_base + + ipa3_ctx->ctrl->ipa_reg_base_ofst + + ipahal_get_reg_n_ofst( + IPA_SRAM_DIRECT_ACCESS_n, + 0), + ipa3_ctx->smem_sz); + if (!ipa_sram_mmio) { + IPAERR("fail to ioremap IPA SRAM\n"); + return -ENOMEM; + } + memset(entry, 0, sizeof(*entry) * (*num_entry)); if (hashable) { if (ip_type == IPA_IP_v4) @@ -1884,9 +1897,7 @@ int ipa3_rt_read_tbl_from_hw(u32 tbl_idx, IPADBG("tbl_entry_in_hdr_ofst=0x%llx\n", tbl_entry_in_hdr_ofst); - tbl_entry_in_hdr = ipa3_ctx->mmio + - ipahal_get_reg_n_ofst(IPA_SRAM_DIRECT_ACCESS_n, 0) + - tbl_entry_in_hdr_ofst; + tbl_entry_in_hdr = ipa_sram_mmio + tbl_entry_in_hdr_ofst; /* for tables which reside in DDR access it from the virtual memory */ if (!(*tbl_entry_in_hdr & 0x1)) { @@ -1907,9 +1918,9 @@ int ipa3_rt_read_tbl_from_hw(u32 tbl_idx, hdr = ipa3_ctx->empty_rt_tbl_mem.base; } else { /* local */ - hdr = (void *)(tbl_entry_in_hdr - + hdr = (void *)((u8 *)tbl_entry_in_hdr - tbl_idx * IPA_HW_TBL_HDR_WIDTH + - (*tbl_entry_in_hdr - 1) * 16); + (*tbl_entry_in_hdr - 1) / 16); } IPADBG("*tbl_entry_in_hdr=0x%llx\n", *tbl_entry_in_hdr); IPADBG("hdr=0x%p\n", hdr); @@ -1941,6 +1952,7 @@ int ipa3_rt_read_tbl_from_hw(u32 tbl_idx, } *num_entry = rule_idx; + iounmap(ipa_sram_mmio); return 0; }