evie/android_kernel_oneplus_msm8998
1
0
Fork 0
Code Issues Pull requests Projects Releases Packages Wiki Activity Actions

ARM: STi: DT: Add STiH407 family tsin5 pinctrl configuration

Browse source 
tsin5 can only be configured for serial data transfer. However
depending on board design, two alternate tsin5 pin configurations
are available, both in pin-controller-front0.

pinctrl_tsin5_serial_alt1 is brought out on B2120 reference
design as TSD on NIMB slot of the B2004A daughter board.

Signed-off-by: Peter Griffin <peter.griffin@linaro.org>
Signed-off-by: Maxime Coquelin <maxime.coquelin@st.com>
This commit is contained in:
Peter Griffin 2015-06-10 16:04:00 +02:00 • committed by Maxime Coquelin
parent af4d191e44
commit dd72896f0d
1 changed files with 21 additions and 0 deletions
Show stats Download patch file Download diff file Expand all files Collapse all files

21
arch/arm/boot/dts/stih407-pinctrl.dtsi
View file

@ -547,6 +547,27 @@
};
};
};
tsin5 {
pinctrl_tsin5_serial_alt1: tsin5_serial_alt1 {
st,pins {
DATA7 = <&pio18 4 ALT1 IN SE_NICLK_IO 0 CLK_A>;
CLKIN = <&pio18 3 ALT1 IN CLKNOTDATA 0 CLK_A>;
VALID = <&pio18 1 ALT1 IN SE_NICLK_IO 0 CLK_A>;
ERROR = <&pio18 0 ALT1 IN SE_NICLK_IO 0 CLK_A>;
PKCLK = <&pio18 2 ALT1 IN SE_NICLK_IO 0 CLK_A>;
};
};
pinctrl_tsin5_serial_alt2: tsin5_serial_alt2 {
st,pins {
DATA7 = <&pio19 4 ALT2 IN SE_NICLK_IO 0 CLK_A>;
CLKIN = <&pio19 3 ALT2 IN CLKNOTDATA 0 CLK_A>;
VALID = <&pio19 1 ALT2 IN SE_NICLK_IO 0 CLK_A>;
ERROR = <&pio19 0 ALT2 IN SE_NICLK_IO 0 CLK_A>;
PKCLK = <&pio19 2 ALT2 IN SE_NICLK_IO 0 CLK_A>;
};
};
};
};
pin-controller-front1 {