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Merge branch 'v3.14-next/fixes-samsung-2' into v3.14-next/dt-exynos-2

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This commit is contained in:
Kukjin Kim 2013-12-21 08:12:01 +09:00
commit de4cf2fe36
13 changed files with 54 additions and 24 deletions
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2
arch/arm/boot/dts/exynos4210-origen.dts
View file

@ -313,7 +313,7 @@
display-timings { display-timings {
native-mode = <&timing0>; native-mode = <&timing0>;
timing0: timing { timing0: timing {
clock-frequency = <50000>; clock-frequency = <47500000>;
hactive = <1024>; hactive = <1024>;
vactive = <600>; vactive = <600>;
hfront-porch = <64>; hfront-porch = <64>;

5
arch/arm/boot/dts/exynos4412-odroidx.dts
View file

@ -38,9 +38,7 @@
}; };
}; };
mshc@12550000 { mmc@12550000 {
#address-cells = <1>;
#size-cells = <0>;
pinctrl-0 = <&sd4_clk &sd4_cmd &sd4_bus4 &sd4_bus8>; pinctrl-0 = <&sd4_clk &sd4_cmd &sd4_bus4 &sd4_bus8>;
pinctrl-names = "default"; pinctrl-names = "default";
vmmc-supply = <&ldo20_reg &buck8_reg>; vmmc-supply = <&ldo20_reg &buck8_reg>;
@ -49,7 +47,6 @@
num-slots = <1>; num-slots = <1>;
supports-highspeed; supports-highspeed;
broken-cd; broken-cd;
fifo-depth = <0x80>;
card-detect-delay = <200>; card-detect-delay = <200>;
samsung,dw-mshc-ciu-div = <3>; samsung,dw-mshc-ciu-div = <3>;
samsung,dw-mshc-sdr-timing = <2 3>; samsung,dw-mshc-sdr-timing = <2 3>;

7
arch/arm/boot/dts/exynos4412-origen.dts
View file

@ -122,9 +122,7 @@
status = "okay"; status = "okay";
}; };
mshc@12550000 { mmc@12550000 {
#address-cells = <1>;
#size-cells = <0>;
pinctrl-0 = <&sd4_clk &sd4_cmd &sd4_bus4 &sd4_bus8>; pinctrl-0 = <&sd4_clk &sd4_cmd &sd4_bus4 &sd4_bus8>;
pinctrl-names = "default"; pinctrl-names = "default";
status = "okay"; status = "okay";
@ -132,7 +130,6 @@
num-slots = <1>; num-slots = <1>;
supports-highspeed; supports-highspeed;
broken-cd; broken-cd;
fifo-depth = <0x80>;
card-detect-delay = <200>; card-detect-delay = <200>;
samsung,dw-mshc-ciu-div = <3>; samsung,dw-mshc-ciu-div = <3>;
samsung,dw-mshc-sdr-timing = <2 3>; samsung,dw-mshc-sdr-timing = <2 3>;
@ -159,7 +156,7 @@
display-timings { display-timings {
native-mode = <&timing0>; native-mode = <&timing0>;
timing0: timing { timing0: timing {
clock-frequency = <50000>; clock-frequency = <47500000>;
hactive = <1024>; hactive = <1024>;
vactive = <600>; vactive = <600>;
hfront-porch = <64>; hfront-porch = <64>;

20
arch/arm/boot/dts/exynos4412-trats2.dts
View file

@ -442,13 +442,25 @@
}; };
}; };
sdhci@12510000 { mmc@12550000 {
bus-width = <8>; num-slots = <1>;
supports-highspeed;
broken-cd;
non-removable; non-removable;
pinctrl-0 = <&sd0_clk &sd0_cmd &sd0_bus8>; card-detect-delay = <200>;
pinctrl-names = "default";
vmmc-supply = <&vemmc_reg>; vmmc-supply = <&vemmc_reg>;
clock-frequency = <400000000>;
samsung,dw-mshc-ciu-div = <0>;
samsung,dw-mshc-sdr-timing = <2 3>;
samsung,dw-mshc-ddr-timing = <1 2>;
pinctrl-0 = <&sd4_clk &sd4_cmd &sd4_bus4 &sd4_bus8>;
pinctrl-names = "default";
status = "okay"; status = "okay";
slot@0 {
reg = <0>;
bus-width = <8>;
};
}; };
serial@13800000 { serial@13800000 {

7
arch/arm/boot/dts/exynos4412.dtsi
View file

@ -61,11 +61,4 @@
}; };
}; };
mshc@12550000 {
compatible = "samsung,exynos4412-dw-mshc";
reg = <0x12550000 0x1000>;
interrupts = <0 77 0>;
#address-cells = <1>;
#size-cells = <0>;
};
}; };

13
arch/arm/boot/dts/exynos4x12.dtsi
View file

@ -28,6 +28,7 @@
pinctrl3 = &pinctrl_3; pinctrl3 = &pinctrl_3;
fimc-lite0 = &fimc_lite_0; fimc-lite0 = &fimc_lite_0;
fimc-lite1 = &fimc_lite_1; fimc-lite1 = &fimc_lite_1;
mshc0 = &mshc_0;
}; };
pd_isp: isp-power-domain@10023CA0 { pd_isp: isp-power-domain@10023CA0 {
@ -176,4 +177,16 @@
}; };
}; };
}; };
mshc_0: mmc@12550000 {
compatible = "samsung,exynos4412-dw-mshc";
reg = <0x12550000 0x1000>;
interrupts = <0 77 0>;
#address-cells = <1>;
#size-cells = <0>;
fifo-depth = <0x80>;
clocks = <&clock 301>, <&clock 149>;
clock-names = "biu", "ciu";
status = "disabled";
};
}; };

2
arch/arm/boot/dts/exynos5250-arndale.dts
View file

@ -302,11 +302,13 @@
buck7_reg: BUCK7 { buck7_reg: BUCK7 {
regulator-name = "PVDD_BUCK7"; regulator-name = "PVDD_BUCK7";
regulator-always-on; regulator-always-on;
op_mode = <1>;
}; };
buck8_reg: BUCK8 { buck8_reg: BUCK8 {
regulator-name = "PVDD_BUCK8"; regulator-name = "PVDD_BUCK8";
regulator-always-on; regulator-always-on;
op_mode = <1>;
}; };
buck9_reg: BUCK9 { buck9_reg: BUCK9 {

3
arch/arm/boot/dts/exynos5250-snow.dts
View file

@ -85,7 +85,7 @@
keypad,num-rows = <8>; keypad,num-rows = <8>;
keypad,num-columns = <13>; keypad,num-columns = <13>;
google,needs-ghost-filter; google,needs-ghost-filter;
linux,keymap = <0x0001003a /* CAPSLK */ linux,keymap = <0x0001007d /* L_META */
0x0002003b /* F1 */ 0x0002003b /* F1 */
0x00030030 /* B */ 0x00030030 /* B */
0x00040044 /* F10 */ 0x00040044 /* F10 */
@ -130,6 +130,7 @@
0x04060024 /* J */ 0x04060024 /* J */
0x04080027 /* ; */ 0x04080027 /* ; */
0x04090026 /* L */ 0x04090026 /* L */
0x040a002b /* \ */
0x040b001c /* ENTER */ 0x040b001c /* ENTER */
0x0501002c /* Z */ 0x0501002c /* Z */

2
arch/arm/boot/dts/exynos5250.dtsi
View file

@ -60,11 +60,13 @@
device_type = "cpu"; device_type = "cpu";
compatible = "arm,cortex-a15"; compatible = "arm,cortex-a15";
reg = <0>; reg = <0>;
clock-frequency = <1700000000>;
}; };
cpu@1 { cpu@1 {
device_type = "cpu"; device_type = "cpu";
compatible = "arm,cortex-a15"; compatible = "arm,cortex-a15";
reg = <1>; reg = <1>;
clock-frequency = <1700000000>;
}; };
}; };

2
arch/arm/boot/dts/exynos5420-pinctrl.dtsi
View file

@ -64,7 +64,7 @@
samsung,pins = "gpx0-7"; samsung,pins = "gpx0-7";
samsung,pin-function = <3>; samsung,pin-function = <3>;
samsung,pin-pud = <0>; samsung,pin-pud = <0>;
samaung,pin-drv = <0>; samsung,pin-drv = <0>;
}; };
}; };

10
arch/arm/mach-s3c64xx/mach-mini6410.c
View file

@ -36,7 +36,9 @@
#include <plat/devs.h> #include <plat/devs.h>
#include <plat/fb.h> #include <plat/fb.h>
#include <linux/platform_data/mtd-nand-s3c2410.h> #include <linux/platform_data/mtd-nand-s3c2410.h>
#include <linux/platform_data/mmc-sdhci-s3c.h>
#include <plat/regs-serial.h> #include <plat/regs-serial.h>
#include <plat/sdhci.h>
#include <linux/platform_data/touchscreen-s3c2410.h> #include <linux/platform_data/touchscreen-s3c2410.h>
#include <video/platform_lcd.h> #include <video/platform_lcd.h>
@ -214,6 +216,13 @@ static struct platform_device mini6410_lcd_powerdev = {
.dev.platform_data = &mini6410_lcd_power_data, .dev.platform_data = &mini6410_lcd_power_data,
}; };
static struct s3c_sdhci_platdata mini6410_hsmmc1_pdata = {
.max_width = 4,
.cd_type = S3C_SDHCI_CD_GPIO,
.ext_cd_gpio = S3C64XX_GPN(10),
.ext_cd_gpio_invert = true,
};
static struct platform_device *mini6410_devices[] __initdata = { static struct platform_device *mini6410_devices[] __initdata = {
&mini6410_device_eth, &mini6410_device_eth,
&s3c_device_hsmmc0, &s3c_device_hsmmc0,
@ -321,6 +330,7 @@ static void __init mini6410_machine_init(void)
s3c_nand_set_platdata(&mini6410_nand_info); s3c_nand_set_platdata(&mini6410_nand_info);
s3c_fb_set_platdata(&mini6410_lcd_pdata[features.lcd_index]); s3c_fb_set_platdata(&mini6410_lcd_pdata[features.lcd_index]);
s3c_sdhci1_set_platdata(&mini6410_hsmmc1_pdata);
s3c24xx_ts_set_platdata(NULL); s3c24xx_ts_set_platdata(NULL);
/* configure nCS1 width to 16 bits */ /* configure nCS1 width to 16 bits */

2
arch/arm/plat-samsung/include/plat/uncompress.h
View file

@ -145,6 +145,8 @@ static inline void arch_enable_uart_fifo(void)
if (!(fifocon & S3C2410_UFCON_RESETBOTH)) if (!(fifocon & S3C2410_UFCON_RESETBOTH))
break; break;
} }
uart_wr(S3C2410_UFCON, S3C2410_UFCON_FIFOMODE);
} }
} }
#else #else

3
drivers/clk/samsung/clk-exynos4.c
View file

@ -530,7 +530,8 @@ static struct samsung_div_clock exynos4_div_clks[] __initdata = {
DIV(sclk_i2s1, "sclk_i2s1", "sclk_audio1", DIV_PERIL5, 0, 6), DIV(sclk_i2s1, "sclk_i2s1", "sclk_audio1", DIV_PERIL5, 0, 6),
DIV(sclk_i2s2, "sclk_i2s2", "sclk_audio2", DIV_PERIL5, 8, 6), DIV(sclk_i2s2, "sclk_i2s2", "sclk_audio2", DIV_PERIL5, 8, 6),
DIV(none, "div_mmc4", "mout_mmc4", DIV_FSYS3, 0, 4), DIV(none, "div_mmc4", "mout_mmc4", DIV_FSYS3, 0, 4),
DIV(none, "div_mmc_pre4", "div_mmc4", DIV_FSYS3, 8, 8), DIV_F(none, "div_mmc_pre4", "div_mmc4", DIV_FSYS3, 8, 8,
CLK_SET_RATE_PARENT, 0),
DIV(none, "div_uart0", "mout_uart0", DIV_PERIL0, 0, 4), DIV(none, "div_uart0", "mout_uart0", DIV_PERIL0, 0, 4),
DIV(none, "div_uart1", "mout_uart1", DIV_PERIL0, 4, 4), DIV(none, "div_uart1", "mout_uart1", DIV_PERIL0, 4, 4),
DIV(none, "div_uart2", "mout_uart2", DIV_PERIL0, 8, 4), DIV(none, "div_uart2", "mout_uart2", DIV_PERIL0, 8, 4),