Merge 785510ce71 on remote branch

Change-Id: I443fb398e9c54bd7353a29cf474b5e44e54e69bc

arch/arm/boot/dts/qcom/Makefile

@@ -289,7 +289,10 @@ dtb-$(CONFIG_ARCH_SDM630) += sdm630-rumi.dtb \
 	sdm630-headset-jacktype-no-cdp.dtb \
 	sdm630-headset-jacktype-no-rcm.dtb \
 	sdm630-pm660a-headset-jacktype-no-cdp.dtb \
-	sdm630-pm660a-headset-jacktype-no-rcm.dtb
+	sdm630-pm660a-headset-jacktype-no-rcm.dtb \
+	sdm455-mtp.dtb \
+	sdm455-qrd.dtb \
+	sdm455-cdp.dtb
 
 ifeq ($(CONFIG_ARM64),y)
 always          := $(dtb-y)

arch/arm/boot/dts/qcom/sdm455-cdp.dts

@@ -0,0 +1,37 @@
+/* Copyright (c) 2018, The Linux Foundation. All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 and
+ * only version 2 as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ */
+
+
+/dts-v1/;
+
+#include "sdm455.dtsi"
+#include "sdm455-cdp.dtsi"
+#include "sdm660-external-codec.dtsi"
+
+/ {
+	model = "Qualcomm Technologies, Inc. SDM 455 PM660 + PM660L CDP";
+	compatible = "qcom,sdm455-cdp", "qcom,sdm455", "qcom,cdp";
+	qcom,board-id = <1 0>;
+	qcom,pmic-id = <0x0001001b 0x0101011a 0x0 0x0>,
+			<0x0001001b 0x0201011a 0x0 0x0>,
+			<0x0001001b 0x0102001a 0x0 0x0>;
+};
+
+&tavil_snd {
+	qcom,msm-mbhc-hphl-swh = <0>;
+	qcom,msm-mbhc-gnd-swh = <0>;
+};
+
+&tasha_snd {
+	qcom,msm-mbhc-hphl-swh = <0>;
+	qcom,msm-mbhc-gnd-swh = <0>;
+};

arch/arm/boot/dts/qcom/sdm455-cdp.dtsi

@@ -0,0 +1,13 @@
+/* Copyright (c) 2018, The Linux Foundation. All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 and
+ * only version 2 as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ */
+
+#include "sdm630-cdp.dtsi"

arch/arm/boot/dts/qcom/sdm455-mtp.dts

@@ -0,0 +1,31 @@
+/* Copyright (c) 2018, The Linux Foundation. All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 and
+ * only version 2 as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ */
+
+
+/dts-v1/;
+
+#include "sdm455.dtsi"
+#include "sdm630-mtp.dtsi"
+#include "sdm660-external-codec.dtsi"
+
+/ {
+	model = "Qualcomm Technologies, Inc. SDM 455 PM660 + PM660L MTP";
+	compatible = "qcom,sdm455-mtp", "qcom,sdm455", "qcom,mtp";
+	qcom,board-id = <8 0>;
+	qcom,pmic-id = <0x0001001b 0x0101011a 0x0 0x0>,
+			<0x0001001b 0x0201011a 0x0 0x0>,
+			<0x0001001b 0x0102001a 0x0 0x0>;
+};
+
+&tavil_snd {
+	qcom,msm-mbhc-moist-cfg = <0>, <0>, <3>;
+};

arch/arm/boot/dts/qcom/sdm455-mtp.dtsi

@@ -0,0 +1,13 @@
+/* Copyright (c) 2018, The Linux Foundation. All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 and
+ * only version 2 as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ */
+
+#include "sdm630-mtp.dtsi"

arch/arm/boot/dts/qcom/sdm455-qrd.dts

@@ -0,0 +1,87 @@
+/* Copyright (c) 2018, The Linux Foundation. All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 and
+ * only version 2 as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ */
+
+
+/dts-v1/;
+
+#include "sdm455.dtsi"
+#include "sdm455-qrd.dtsi"
+#include "msm-pm660a.dtsi"
+#include "sdm660-internal-codec.dtsi"
+
+/ {
+	model = "Qualcomm Technologies, Inc. SDM 455 PM660 + PM660A QRD";
+	compatible = "qcom,sdm455-qrd", "qcom,sdm455", "qcom,qrd";
+	qcom,board-id = <0x0002000b 0x00>;
+	qcom,pmic-id = <0x0001001b 0x0001011a 0x0 0x0>,
+			<0x0001001b 0x0002001a 0x0 0x0>,
+			<0x0001001b 0x0202001a 0x0 0x0>;
+};
+
+&int_codec {
+	qcom,model = "sdm660-snd-card-skush";
+	/delete-property/ qcom,us-euro-gpios;
+	qcom,audio-routing =
+		"RX_BIAS", "INT_MCLK0",
+		"SPK_RX_BIAS", "INT_MCLK0",
+		"INT_LDO_H", "INT_MCLK0",
+		"MIC BIAS External2", "Headset Mic",
+		"AMIC2", "MIC BIAS External2",
+		"MIC BIAS External", "Digital Mic1",
+		"DMIC1", "MIC BIAS External",
+		"MIC BIAS External", "Digital Mic3",
+		"DMIC3", "MIC BIAS External",
+		"MIC BIAS External", "Digital Mic4",
+		"DMIC4", "MIC BIAS External",
+		"SpkrLeft IN", "SPK1 OUT",
+		"PDM_IN_RX1", "PDM_OUT_RX1",
+		"PDM_IN_RX2", "PDM_OUT_RX2",
+		"PDM_IN_RX3", "PDM_OUT_RX3",
+		"ADC1_IN", "ADC1_OUT",
+		"ADC2_IN", "ADC2_OUT",
+		"ADC3_IN", "ADC3_OUT";
+	qcom,wsa-max-devs = <1>;
+	qcom,wsa-devs = <&wsa881x_211_en>, <&wsa881x_213_en>;
+	qcom,wsa-aux-dev-prefix = "SpkrLeft", "SpkrLeft";
+};
+
+&pm660a_oledb {
+	status = "okay";
+	qcom,oledb-default-voltage-mv = <6400>;
+};
+
+&mdss_mdp {
+	qcom,mdss-pref-prim-intf = "dsi";
+};
+
+&mdss_dsi {
+	hw-config = "single_dsi";
+};
+
+&mdss_dsi0 {
+	qcom,dsi-pref-prim-pan = <&dsi_rm67195_amoled_fhd_cmd>;
+	pinctrl-names = "mdss_default", "mdss_sleep";
+	pinctrl-0 = <&mdss_dsi_active &mdss_te_active>;
+	pinctrl-1 = <&mdss_dsi_suspend &mdss_te_suspend>;
+	oledb-supply = <&pm660a_oledb>;
+	lab-supply = <&lab_regulator>;
+	ibb-supply = <&ibb_regulator>;
+	qcom,platform-reset-gpio = <&tlmm 53 0>;
+	qcom,platform-te-gpio = <&tlmm 59 0>;
+};
+
+&dsi_rm67195_amoled_fhd_cmd {
+	qcom,mdss-dsi-bl-pmic-control-type = "bl_ctrl_dcs";
+	qcom,mdss-dsi-bl-min-level = <1>;
+	qcom,mdss-dsi-bl-max-level = <255>;
+	qcom,panel-supply-entries = <&dsi_panel_pwr_supply_labibb_amoled>;
+};

arch/arm/boot/dts/qcom/sdm455-qrd.dtsi

@@ -0,0 +1,13 @@
+/* Copyright (c) 2018, The Linux Foundation. All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 and
+ * only version 2 as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ */
+
+#include "sdm630-qrd.dtsi"

arch/arm/boot/dts/qcom/sdm455.dtsi

@@ -0,0 +1,45 @@
+/* Copyright (c) 2018, The Linux Foundation. All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 and
+ * only version 2 as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ */
+
+#include "sdm630.dtsi"
+
+/ {
+	model = "Qualcomm Technologies, Inc. SDM455";
+	compatible = "qcom,sdm455";
+	qcom,msm-id = <385 0x0>;
+	qcom,msm-name = "SDM455";
+};
+
+&soc {
+	mdss_dp_ctrl: qcom,dp_ctrl@c990000 {
+		status = "disabled";
+	};
+
+	mdss_dp_pll: qcom,mdss_dp_pll@c011000 {
+		status = "disabled";
+	};
+};
+
+&mdss_mdp {
+
+	/delete-property/ qcom,mdss-ad-off;
+	/delete-property/ qcom,max-dest-scaler-input-width;
+	/delete-property/ qcom,max-dest-scaler-output-width;
+	qcom,mdss-scaler-offsets {
+		qcom,mdss-vig-scaler-off = <0xa00>;
+		qcom,mdss-vig-scaler-lut-off = <0xb00>;
+		/delete-property/ qcom,mdss-has-dest-scaler;
+		/delete-property/ qcom,mdss-dest-block-off;
+		/delete-property/ qcom,mdss-dest-scaler-off;
+		/delete-property/ qcom,mdss-dest-scaler-lut-off;
+	};
+};

arch/arm/kernel/module.c

@@ -40,8 +40,15 @@
 #ifdef CONFIG_MMU
 void *module_alloc(unsigned long size)
 {
-	void *p = __vmalloc_node_range(size, 1, MODULES_VADDR, MODULES_END,
+	gfp_t gfp_mask = GFP_KERNEL;
-				GFP_KERNEL, PAGE_KERNEL_EXEC, 0, NUMA_NO_NODE,
+	void *p;
+
+	/* Silence the initial allocation */
+	if (IS_ENABLED(CONFIG_ARM_MODULE_PLTS))
+		gfp_mask |= __GFP_NOWARN;
+
+	p = __vmalloc_node_range(size, 1, MODULES_VADDR, MODULES_END,
+				gfp_mask, PAGE_KERNEL_EXEC, 0, NUMA_NO_NODE,
 				__builtin_return_address(0));
 	if (!IS_ENABLED(CONFIG_ARM_MODULE_PLTS) || p)
 		return p;

arch/arm64/configs/msmcortex_defconfig

@@ -1,4 +1,5 @@
 # CONFIG_LOCALVERSION_AUTO is not set
+# CONFIG_USELIB is not set
 CONFIG_AUDIT=y
 # CONFIG_AUDITSYSCALL is not set
 CONFIG_NO_HZ=y
@@ -104,6 +105,7 @@ CONFIG_NET_IPVTI=y
 CONFIG_INET_AH=y
 CONFIG_INET_ESP=y
 CONFIG_INET_IPCOMP=y
+# CONFIG_INET_LRO is not set
 CONFIG_INET_UDP_DIAG=y
 CONFIG_INET_DIAG_DESTROY=y
 CONFIG_IPV6_ROUTER_PREF=y
@@ -322,6 +324,8 @@ CONFIG_INPUT_STMVL53L0=y
 # CONFIG_SERIO_SERPORT is not set
 # CONFIG_VT is not set
 # CONFIG_LEGACY_PTYS is not set
+# CONFIG_DEVMEM is not set
+# CONFIG_DEVKMEM is not set
 CONFIG_SERIAL_MSM=y
 CONFIG_SERIAL_MSM_CONSOLE=y
 CONFIG_SERIAL_MSM_HS=y

arch/arm64/configs/sdm660-perf_defconfig

@@ -106,6 +106,7 @@ CONFIG_NET_IPVTI=y
 CONFIG_INET_AH=y
 CONFIG_INET_ESP=y
 CONFIG_INET_IPCOMP=y
+# CONFIG_INET_LRO is not set
 CONFIG_INET_UDP_DIAG=y
 CONFIG_INET_DIAG_DESTROY=y
 CONFIG_IPV6_ROUTER_PREF=y

arch/arm64/configs/sdm660_defconfig

@@ -106,6 +106,7 @@ CONFIG_NET_IPVTI=y
 CONFIG_INET_AH=y
 CONFIG_INET_ESP=y
 CONFIG_INET_IPCOMP=y
+# CONFIG_INET_LRO is not set
 CONFIG_INET_UDP_DIAG=y
 CONFIG_INET_DIAG_DESTROY=y
 CONFIG_IPV6_ROUTER_PREF=y

arch/arm64/kernel/module.c

@@ -32,11 +32,16 @@
 
 void *module_alloc(unsigned long size)
 {
+	gfp_t gfp_mask = GFP_KERNEL;
 	void *p;
 
+	/* Silence the initial allocation */
+	if (IS_ENABLED(CONFIG_ARM64_MODULE_PLTS))
+		gfp_mask |= __GFP_NOWARN;
+
 	p = __vmalloc_node_range(size, MODULE_ALIGN, module_alloc_base,
 				module_alloc_base + MODULES_VSIZE,
-				GFP_KERNEL, PAGE_KERNEL_EXEC, 0,
+				gfp_mask, PAGE_KERNEL_EXEC, 0,
 				NUMA_NO_NODE, __builtin_return_address(0));
 
 	if (!p && IS_ENABLED(CONFIG_ARM64_MODULE_PLTS) &&

drivers/clk/qcom/clk-rcg2.c

@@ -313,6 +313,39 @@ static int clk_rcg2_determine_rate(struct clk_hw *hw,
 	return _freq_tbl_determine_rate(hw, rcg->freq_tbl, req);
 }
 
+static bool clk_rcg2_current_config(struct clk_rcg2 *rcg,
+				    const struct freq_tbl *f)
+{
+	struct clk_hw *hw = &rcg->clkr.hw;
+	u32 cfg, mask, new_cfg;
+	int index;
+
+	if (rcg->mnd_width) {
+		mask = BIT(rcg->mnd_width) - 1;
+		regmap_read(rcg->clkr.regmap, rcg->cmd_rcgr + M_REG, &cfg);
+		if ((cfg & mask) != (f->m & mask))
+			return false;
+
+		regmap_read(rcg->clkr.regmap, rcg->cmd_rcgr + N_REG, &cfg);
+		if ((cfg & mask) != (~(f->n - f->m) & mask))
+			return false;
+	}
+
+	mask = (BIT(rcg->hid_width) - 1) | CFG_SRC_SEL_MASK;
+
+	index = qcom_find_src_index(hw, rcg->parent_map, f->src);
+
+	new_cfg = ((f->pre_div << CFG_SRC_DIV_SHIFT) |
+		(rcg->parent_map[index].cfg << CFG_SRC_SEL_SHIFT)) & mask;
+
+	regmap_read(rcg->clkr.regmap, rcg->cmd_rcgr + CFG_REG, &cfg);
+
+	if (new_cfg != (cfg & mask))
+		return false;
+
+	return true;
+}
+
 static int clk_rcg2_configure(struct clk_rcg2 *rcg, const struct freq_tbl *f)
 {
 	u32 cfg, mask, old_cfg;
@@ -984,6 +1017,8 @@ static int clk_byte2_set_rate(struct clk_hw *hw, unsigned long rate,
 	for (i = 0; i < num_parents; i++) {
 		if (cfg == rcg->parent_map[i].cfg) {
 			f.src = rcg->parent_map[i].src;
+			if (clk_rcg2_current_config(rcg, &f))
+				return 0;
 			return clk_rcg2_configure(rcg, &f);
 		}
 	}

drivers/crypto/msm/qce50.c

@@ -1,6 +1,6 @@
 /* Qualcomm Crypto Engine driver.
  *
- * Copyright (c) 2012-2017, The Linux Foundation. All rights reserved.
+ * Copyright (c) 2012-2018, The Linux Foundation. All rights reserved.
  *
  * This program is free software; you can redistribute it and/or modify
  * it under the terms of the GNU General Public License version 2 and
@@ -2440,6 +2440,9 @@ static int _qce_sps_add_sg_data(struct qce_device *pce_dev,
 	struct sps_iovec *iovec = sps_bam_pipe->iovec +
 						sps_bam_pipe->iovec_count;
 
+	if (!sg_src)
+		return -ENOENT;
+
 	while (nbytes > 0) {
 		len = min(nbytes, sg_dma_len(sg_src));
 		nbytes -= len;

drivers/misc/qseecom.c

@@ -8743,11 +8743,11 @@ static int qseecom_remove(struct platform_device *pdev)
 		&qseecom.registered_kclient_list_head, list) {
 
 		/* Break the loop if client handle is NULL */
-		if (!kclient->handle)
+		if (!kclient->handle) {
-			goto exit_free_kclient;
+			list_del(&kclient->list);
-
+			kzfree(kclient);
-		if (list_empty(&kclient->list))
+			break;
-			goto exit_free_kc_handle;
+		}
 
 		list_del(&kclient->list);
 		mutex_lock(&app_access_lock);
@@ -8760,11 +8760,6 @@ static int qseecom_remove(struct platform_device *pdev)
 		}
 	}
 
-exit_free_kc_handle:
-	kzfree(kclient->handle);
-exit_free_kclient:
-	kzfree(kclient);
-
 	spin_unlock_irqrestore(&qseecom.registered_kclient_list_lock, flags);
 
 	if (qseecom.qseos_version > QSEEE_VERSION_00)

drivers/net/wireless/cnss2/main.c

@@ -952,8 +952,8 @@ static int cnss_do_recovery(struct cnss_plat_data *plat_priv,
 			goto self_recovery;
 		break;
 	case CNSS_REASON_RDDM:
-		clear_bit(CNSS_DEV_ERR_NOTIFY, &plat_priv->driver_state);
 		cnss_bus_collect_dump_info(plat_priv);
+		clear_bit(CNSS_DEV_ERR_NOTIFY, &plat_priv->driver_state);
 		break;
 	case CNSS_REASON_DEFAULT:
 	case CNSS_REASON_TIMEOUT:

drivers/soc/qcom/glink_smem_native_xprt.c

@@ -831,24 +831,31 @@ static bool get_rx_fifo(struct edge_info *einfo)
  */
 static void tx_wakeup_worker(struct edge_info *einfo)
 {
+	struct glink_transport_if xprt_if = einfo->xprt_if;
 	bool trigger_wakeup = false;
+	bool trigger_resume = false;
 	unsigned long flags;
 
 	if (einfo->in_ssr)
 		return;
-	if (einfo->tx_resume_needed && fifo_write_avail(einfo)) {
+
-		einfo->tx_resume_needed = false;
-		einfo->xprt_if.glink_core_if_ptr->tx_resume(
-						&einfo->xprt_if);
-	}
 	spin_lock_irqsave(&einfo->write_lock, flags);
+	if (fifo_write_avail(einfo)) {
+		if (einfo->tx_blocked_signal_sent)
+			einfo->tx_blocked_signal_sent = false;
+		if (einfo->tx_resume_needed) {
+			einfo->tx_resume_needed = false;
+			trigger_resume = true;
+		}
+	}
 	if (waitqueue_active(&einfo->tx_blocked_queue)) { /* tx waiting ?*/
-		einfo->tx_blocked_signal_sent = false;
 		trigger_wakeup = true;
 	}
 	spin_unlock_irqrestore(&einfo->write_lock, flags);
 	if (trigger_wakeup)
 		wake_up_all(&einfo->tx_blocked_queue);
+	if (trigger_resume)
+		xprt_if.glink_core_if_ptr->tx_resume(&xprt_if);
 }
 
 /**

drivers/soc/qcom/hab/hab_qvm.c

@@ -147,9 +147,8 @@ static int create_dispatcher(struct physical_channel *pchan)
 
 	pr_debug("request_irq: irq = %d, pchan name = %s",
 			dev->irq, pchan->name);
-	ret = request_irq(dev->irq, shm_irq_handler, IRQF_SHARED,
+	ret = request_irq(dev->irq, shm_irq_handler, IRQF_SHARED |
-		pchan->name, pchan);
+			IRQF_NO_SUSPEND, pchan->name, pchan);
-
 	if (ret)
 		pr_err("request_irq for %s failed: %d\n",
 			pchan->name, ret);

drivers/soc/qcom/scm_qcpe.c

@@ -723,7 +723,7 @@ bool is_scm_armv8(void)
 
 	ret = scm_call_qcpe(x0 | SMC64_MASK, &desc);
 
-	ret1 = desc.arginfo;
+	ret1 = desc.ret[0];
 
 	if (ret || !ret1) {
 		/* Try SMC32 call */
@@ -1009,7 +1009,7 @@ s32 scm_call_atomic1_1(u32 svc, u32 cmd, u32 arg1, u32 *ret1)
 	if (ret < 0)
 		return scm_remap_error(ret);
 
-	*ret1 = desc.arginfo;
+	*ret1 = desc.ret[0];
 
 	return 0;
 }
@@ -1117,8 +1117,8 @@ s32 scm_call_atomic4_3(u32 svc, u32 cmd, u32 arg1, u32 arg2,
 	if (ret < 0)
 		return scm_remap_error(ret);
 
-	*ret1 = desc.arginfo;
+	*ret1 = desc.ret[0];
-	*ret2 = desc.args[0];
+	*ret2 = desc.ret[1];
 
 	return 0;
 }
@@ -1169,9 +1169,9 @@ s32 scm_call_atomic5_3(u32 svc, u32 cmd, u32 arg1, u32 arg2,
 	if (ret < 0)
 		return scm_remap_error(ret);
 
-	*ret1 = desc.arginfo;
+	*ret1 = desc.ret[0];
-	*ret2 = desc.args[0];
+	*ret2 = desc.ret[1];
-	*ret3 = desc.args[1];
+	*ret3 = desc.ret[2];
 
 	return 0;
 }
@@ -1201,7 +1201,7 @@ u32 scm_get_version(void)
 
 	ret = scm_call_qcpe(x0, &desc);
 
-	version = desc.arginfo;
+	version = desc.ret[0];
 
 	mutex_unlock(&scm_lock);
 

include/linux/diagchar.h

@@ -145,10 +145,10 @@ the appropriate macros. */
 /* This needs to be modified manually now, when we add
  a new RANGE of SSIDs to the msg_mask_tbl */
 #define MSG_MASK_TBL_CNT		26
-#define APPS_EVENT_LAST_ID		0xC7A
+#define APPS_EVENT_LAST_ID		0xC85
 
 #define MSG_SSID_0			0
-#define MSG_SSID_0_LAST			125
+#define MSG_SSID_0_LAST			129
 #define MSG_SSID_1			500
 #define MSG_SSID_1_LAST			506
 #define MSG_SSID_2			1000
@@ -164,7 +164,7 @@ the appropriate macros. */
 #define MSG_SSID_7			4600
 #define MSG_SSID_7_LAST			4616
 #define MSG_SSID_8			5000
-#define MSG_SSID_8_LAST			5034
+#define MSG_SSID_8_LAST			5036
 #define MSG_SSID_9			5500
 #define MSG_SSID_9_LAST			5516
 #define MSG_SSID_10			6000
@@ -218,7 +218,7 @@ static const uint32_t msg_bld_masks_0[] = {
 	MSG_LVL_MED,
 	MSG_LVL_HIGH,
 	MSG_LVL_HIGH,
-	MSG_LVL_LOW|MSG_MASK_5|MSG_MASK_6|MSG_MASK_7|MSG_MASK_8,
+	MSG_LVL_MED | MSG_MASK_5 | MSG_MASK_6 | MSG_MASK_7 | MSG_MASK_8,
 	MSG_LVL_LOW,
 	MSG_LVL_ERROR,
 	MSG_LVL_LOW,
@@ -342,6 +342,10 @@ static const uint32_t msg_bld_masks_0[] = {
 	MSG_LVL_HIGH,
 	MSG_LVL_LOW,
 	MSG_LVL_LOW|MSG_LVL_MED|MSG_LVL_HIGH|MSG_LVL_ERROR|MSG_LVL_FATAL,
+	MSG_LVL_HIGH,
+	MSG_LVL_LOW,
+	MSG_LVL_MED,
+	MSG_LVL_MED,
 	MSG_LVL_HIGH
 };
 
@@ -413,81 +417,91 @@ static const uint32_t msg_bld_masks_5[] = {
 };
 
 static const uint32_t msg_bld_masks_6[] = {
-	MSG_LVL_LOW,
+	MSG_LVL_LOW | MSG_MASK_5,
-	MSG_LVL_LOW,
+	MSG_LVL_LOW | MSG_MASK_5,
-	MSG_LVL_LOW,
+	MSG_LVL_LOW | MSG_MASK_5,
-	MSG_LVL_LOW,
+	MSG_LVL_LOW | MSG_MASK_5,
-	MSG_LVL_LOW,
+	MSG_LVL_LOW | MSG_MASK_5,
-	MSG_LVL_LOW,
+	MSG_LVL_LOW | MSG_MASK_5,
-	MSG_LVL_LOW,
+	MSG_LVL_LOW | MSG_MASK_5,
-	MSG_LVL_LOW,
+	MSG_LVL_LOW | MSG_MASK_5,
-	MSG_LVL_LOW,
+	MSG_LVL_LOW | MSG_MASK_5,
-	MSG_LVL_LOW,
+	MSG_LVL_LOW | MSG_MASK_5,
-	MSG_LVL_LOW,
+	MSG_LVL_LOW | MSG_MASK_5,
-	MSG_LVL_LOW,
+	MSG_LVL_LOW | MSG_MASK_5,
-	MSG_LVL_LOW,
+	MSG_LVL_LOW | MSG_MASK_5,
-	MSG_LVL_LOW,
+	MSG_LVL_LOW | MSG_MASK_5,
-	MSG_LVL_LOW,
+	MSG_LVL_LOW | MSG_MASK_5,
-	MSG_LVL_LOW,
+	MSG_LVL_LOW | MSG_MASK_5,
-	MSG_LVL_LOW,
+	MSG_LVL_LOW | MSG_MASK_5,
-	MSG_LVL_LOW,
+	MSG_LVL_LOW | MSG_MASK_5,
-	MSG_LVL_LOW,
+	MSG_LVL_LOW | MSG_MASK_5,
-	MSG_LVL_LOW,
+	MSG_LVL_LOW | MSG_MASK_5,
-	MSG_LVL_LOW,
+	MSG_LVL_LOW | MSG_MASK_5,
-	MSG_LVL_LOW,
+	MSG_LVL_LOW | MSG_MASK_5,
-	MSG_LVL_LOW,
+	MSG_LVL_LOW | MSG_MASK_5,
-	MSG_LVL_LOW,
+	MSG_LVL_LOW | MSG_MASK_5,
-	MSG_LVL_LOW,
+	MSG_LVL_LOW | MSG_MASK_5,
-	MSG_LVL_LOW,
+	MSG_LVL_LOW | MSG_MASK_5,
-	MSG_LVL_LOW,
+	MSG_LVL_LOW | MSG_MASK_5,
-	MSG_LVL_LOW,
+	MSG_LVL_LOW | MSG_MASK_5,
-	MSG_LVL_LOW,
+	MSG_LVL_LOW | MSG_MASK_5,
-	MSG_LVL_LOW,
+	MSG_LVL_LOW | MSG_MASK_5,
-	MSG_LVL_LOW,
+	MSG_LVL_LOW | MSG_MASK_5,
-	MSG_LVL_LOW,
+	MSG_LVL_LOW | MSG_MASK_5,
-	MSG_LVL_LOW,
+	MSG_LVL_LOW | MSG_MASK_5,
-	MSG_LVL_LOW,
+	MSG_LVL_LOW | MSG_MASK_5,
-	MSG_LVL_LOW,
+	MSG_LVL_LOW | MSG_MASK_5,
-	MSG_LVL_LOW,
+	MSG_LVL_LOW | MSG_MASK_5,
-	MSG_LVL_LOW,
+	MSG_LVL_LOW | MSG_MASK_5,
-	MSG_LVL_LOW,
+	MSG_LVL_LOW | MSG_MASK_5,
-	MSG_LVL_LOW,
+	MSG_LVL_LOW | MSG_MASK_5,
-	MSG_LVL_LOW,
+	MSG_LVL_LOW | MSG_MASK_5,
-	MSG_LVL_LOW,
+	MSG_LVL_LOW | MSG_MASK_5,
-	MSG_LVL_LOW,
+	MSG_LVL_LOW | MSG_MASK_5,
-	MSG_LVL_LOW,
+	MSG_LVL_LOW | MSG_MASK_5,
-	MSG_LVL_LOW,
+	MSG_LVL_LOW | MSG_MASK_5,
-	MSG_LVL_LOW,
+	MSG_LVL_LOW | MSG_MASK_5,
-	MSG_LVL_LOW,
+	MSG_LVL_LOW | MSG_MASK_5,
-	MSG_LVL_LOW,
+	MSG_LVL_LOW | MSG_MASK_5,
-	MSG_LVL_LOW,
+	MSG_LVL_LOW | MSG_MASK_5,
-	MSG_LVL_LOW,
+	MSG_LVL_LOW | MSG_MASK_5,
-	MSG_LVL_LOW,
+	MSG_LVL_LOW | MSG_MASK_5,
-	MSG_LVL_LOW,
+	MSG_LVL_LOW | MSG_MASK_5,
-	MSG_LVL_LOW,
+	MSG_LVL_LOW | MSG_MASK_5,
-	MSG_LVL_LOW,
+	MSG_LVL_LOW | MSG_MASK_5,
-	MSG_LVL_LOW,
+	MSG_LVL_LOW | MSG_MASK_5,
-	MSG_LVL_LOW,
+	MSG_LVL_LOW | MSG_MASK_5,
-	MSG_LVL_LOW,
+	MSG_LVL_LOW | MSG_MASK_5,
-	MSG_LVL_LOW,
+	MSG_LVL_LOW | MSG_MASK_5,
-	MSG_LVL_LOW,
+	MSG_LVL_LOW | MSG_MASK_5,
-	MSG_LVL_LOW,
+	MSG_LVL_LOW | MSG_MASK_5,
-	MSG_LVL_LOW,
+	MSG_LVL_LOW | MSG_MASK_5,
-	MSG_LVL_LOW,
+	MSG_LVL_LOW | MSG_MASK_5,
-	MSG_LVL_LOW,
+	MSG_LVL_LOW | MSG_MASK_5,
-	MSG_LVL_LOW,
+	MSG_LVL_LOW | MSG_MASK_5,
-	MSG_LVL_LOW,
+	MSG_LVL_LOW | MSG_MASK_5,
-	MSG_LVL_LOW,
+	MSG_LVL_LOW | MSG_MASK_5,
-	MSG_LVL_LOW,
+	MSG_LVL_LOW | MSG_MASK_5,
-	MSG_LVL_LOW,
+	MSG_LVL_LOW | MSG_MASK_5,
-	MSG_LVL_LOW,
+	MSG_LVL_LOW | MSG_MASK_5,
-	MSG_LVL_LOW,
+	MSG_LVL_LOW | MSG_MASK_5,
-	MSG_LVL_LOW,
+	MSG_LVL_LOW | MSG_MASK_5,
-	MSG_LVL_LOW,
+	MSG_LVL_LOW | MSG_MASK_5,
-	MSG_LVL_LOW,
+	MSG_LVL_LOW | MSG_MASK_5,
-	MSG_LVL_LOW,
+	MSG_LVL_LOW | MSG_MASK_5,
-	MSG_LVL_LOW,
+	MSG_LVL_LOW | MSG_MASK_5,
-	MSG_LVL_LOW
+	MSG_LVL_LOW | MSG_MASK_5,
+	MSG_LVL_LOW | MSG_MASK_5,
+	MSG_LVL_LOW | MSG_MASK_5,
+	MSG_LVL_LOW | MSG_MASK_5,
+	MSG_LVL_LOW | MSG_MASK_5,
+	MSG_LVL_LOW | MSG_MASK_5,
+	MSG_LVL_LOW | MSG_MASK_5,
+	MSG_LVL_LOW | MSG_MASK_5,
+	MSG_LVL_LOW | MSG_MASK_5,
+	MSG_LVL_LOW | MSG_MASK_5,
+	MSG_LVL_LOW | MSG_MASK_5,
 };
 
 static const uint32_t msg_bld_masks_7[] = {
@@ -545,7 +559,9 @@ static const uint32_t msg_bld_masks_8[] = {
 	MSG_LVL_MED,
 	MSG_LVL_MED,
 	MSG_LVL_MED,
-	MSG_LVL_HIGH,
+	MSG_LVL_MED,
+	MSG_LVL_MED,
+	MSG_LVL_MED,
 	MSG_LVL_HIGH
 };
 
@@ -771,18 +787,22 @@ static const uint32_t msg_bld_masks_17[] =  {
 
 static const uint32_t msg_bld_masks_18[] = {
 	MSG_LVL_LOW,
-	MSG_LVL_LOW | MSG_MASK_8 | MSG_MASK_9 | MSG_MASK_10 | \
+	MSG_LVL_MED | MSG_MASK_8 | MSG_MASK_9 | MSG_MASK_10 | MSG_MASK_11 |
-		MSG_MASK_11|MSG_MASK_12|MSG_MASK_13|MSG_MASK_14|MSG_MASK_15 | \
+		MSG_MASK_12 | MSG_MASK_13 | MSG_MASK_14 | MSG_MASK_15 |
-		MSG_MASK_16|MSG_MASK_17|MSG_MASK_18|MSG_MASK_19|MSG_MASK_20,
+		MSG_MASK_16 | MSG_MASK_17 | MSG_MASK_18 | MSG_MASK_19 |
-	MSG_LVL_LOW | MSG_MASK_5 | MSG_MASK_6,
+		MSG_MASK_20,
-	MSG_LVL_LOW | MSG_MASK_5,
+	MSG_LVL_MED | MSG_MASK_5 | MSG_MASK_6,
-	MSG_LVL_LOW | MSG_MASK_5 | MSG_MASK_6,
+	MSG_LVL_MED | MSG_MASK_5,
-	MSG_LVL_LOW,
+	MSG_LVL_MED | MSG_MASK_5 | MSG_MASK_6,
-	MSG_LVL_LOW | MSG_MASK_5 | \
-		MSG_MASK_6 | MSG_MASK_7 | MSG_MASK_8 | MSG_MASK_9,
 	MSG_LVL_LOW,
+	MSG_LVL_MED | MSG_MASK_5 | MSG_MASK_6 | MSG_MASK_7 | MSG_MASK_8 |
+		MSG_MASK_9,
 	MSG_LVL_LOW,
 	MSG_LVL_LOW,
+	MSG_LVL_MED | MSG_MASK_5 | MSG_MASK_6 | MSG_MASK_7 | MSG_MASK_8 |
+		MSG_MASK_9 | MSG_MASK_10 | MSG_MASK_11 | MSG_MASK_12 |
+		MSG_MASK_13 | MSG_MASK_14 | MSG_MASK_15 | MSG_MASK_16 |
+		MSG_MASK_20 | MSG_MASK_21 | MSG_MASK_22,
 	MSG_LVL_LOW
 };
 
@@ -881,7 +901,7 @@ static const uint32_t msg_bld_masks_25[] = {
 /* LOG CODES */
 static const uint32_t log_code_last_tbl[] = {
 	0x0,	/* EQUIP ID 0 */
-	0x1C6A,	/* EQUIP ID 1 */
+	0x1C7B,	/* EQUIP ID 1 */
 	0x0,	/* EQUIP ID 2 */
 	0x0,	/* EQUIP ID 3 */
 	0x4910,	/* EQUIP ID 4 */

mm/vmalloc.c

@@ -521,7 +521,7 @@ overflow:
 		purged = 1;
 		goto retry;
 	}
-	if (printk_ratelimit())
+	if (!(gfp_mask & __GFP_NOWARN) && printk_ratelimit())
 		pr_warn("vmap allocation for size %lu failed: use vmalloc=<size> to increase size\n",
 			size);
 	kfree(va);