evie/android_kernel_oneplus_msm8998
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stmmac: add CSR Clock range selection

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This patch adds the CSR Clock range selection.

Original patch from Johannes Stezenbach fixed the CSR
in the stmmac_mdio. We agreed to provide this through
the platform instead of.
Also thanks to Johannes for having tested it on ARM.

Signed-off-by: Giuseppe Cavallaro <peppe.cavallaro@st.com>
Signed-off-by: Johannes Stezenbach <js@sig21.net>
Signed-off-by: David S. Miller <davem@davemloft.net>
This commit is contained in:
Giuseppe CAVALLARO 2010-09-17 03:23:39 +00:00 • committed by David S. Miller
parent 67c9660831
commit dfb8fb96ae
4 changed files with 6 additions and 2 deletions
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1
drivers/net/stmmac/stmmac.h
View file

@ -78,6 +78,7 @@ struct stmmac_priv {
unsigned int flow_ctrl; unsigned int flow_ctrl;
unsigned int pause; unsigned int pause;
struct mii_bus *mii; struct mii_bus *mii;
int mii_clk_csr;
u32 msg_enable; u32 msg_enable;
spinlock_t lock; spinlock_t lock;

1
drivers/net/stmmac/stmmac_main.c
View file

@ -1704,6 +1704,7 @@ static int stmmac_dvr_probe(struct platform_device *pdev)
plat_dat = pdev->dev.platform_data; plat_dat = pdev->dev.platform_data;
priv->bus_id = plat_dat->bus_id; priv->bus_id = plat_dat->bus_id;
priv->pbl = plat_dat->pbl; /* TLI */ priv->pbl = plat_dat->pbl; /* TLI */
priv->mii_clk_csr = plat_dat->clk_csr;
priv->is_gmac = plat_dat->has_gmac; /* GMAC is on board */ priv->is_gmac = plat_dat->has_gmac; /* GMAC is on board */
priv->enh_desc = plat_dat->enh_desc; priv->enh_desc = plat_dat->enh_desc;
priv->ioaddr = addr; priv->ioaddr = addr;

5
drivers/net/stmmac/stmmac_mdio.c
View file

@ -53,7 +53,7 @@ static int stmmac_mdio_read(struct mii_bus *bus, int phyaddr, int phyreg)
int data; int data;
u16 regValue = (((phyaddr << 11) & (0x0000F800)) | u16 regValue = (((phyaddr << 11) & (0x0000F800)) |
((phyreg << 6) & (0x000007C0))); ((phyreg << 6) & (0x000007C0)));
regValue |= MII_BUSY; /* in case of GMAC */ regValue |= MII_BUSY | ((priv->mii_clk_csr & 7) << 2);
do {} while (((readl(priv->ioaddr + mii_address)) & MII_BUSY) == 1); do {} while (((readl(priv->ioaddr + mii_address)) & MII_BUSY) == 1);
writel(regValue, priv->ioaddr + mii_address); writel(regValue, priv->ioaddr + mii_address);
@ -85,7 +85,8 @@ static int stmmac_mdio_write(struct mii_bus *bus, int phyaddr, int phyreg,
(((phyaddr << 11) & (0x0000F800)) | ((phyreg << 6) & (0x000007C0))) (((phyaddr << 11) & (0x0000F800)) | ((phyreg << 6) & (0x000007C0)))
| MII_WRITE; | MII_WRITE;
value |= MII_BUSY; value |= MII_BUSY | ((priv->mii_clk_csr & 7) << 2);
/* Wait until any existing MII operation is complete */ /* Wait until any existing MII operation is complete */
do {} while (((readl(priv->ioaddr + mii_address)) & MII_BUSY) == 1); do {} while (((readl(priv->ioaddr + mii_address)) & MII_BUSY) == 1);

1
include/linux/stmmac.h
View file

@ -32,6 +32,7 @@
struct plat_stmmacenet_data { struct plat_stmmacenet_data {
int bus_id; int bus_id;
int pbl; int pbl;
int clk_csr;
int has_gmac; int has_gmac;
int enh_desc; int enh_desc;
void (*fix_mac_speed)(void *priv, unsigned int speed); void (*fix_mac_speed)(void *priv, unsigned int speed);