brcm80211: fmac: move chip drive strength related code to sdio_chip.c
This patch is part of the abstracting chip backplane handle code series. Reviewed-by: Arend van Spriel <arend@broadcom.com> Signed-off-by: Franky Lin <frankyl@broadcom.com> Signed-off-by: Arend van Spriel <arend@broadcom.com> Signed-off-by: John W. Linville <linville@tuxdriver.com>
This commit is contained in:
Franky Lin
John W. Linville
parent
a8a6c04586
commit
e12afb6c5d
3 changed files with 117 additions and 115 deletions
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@ -3704,120 +3704,6 @@ fail:
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return false;
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}
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/* SDIO Pad drive strength to select value mappings */
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struct sdiod_drive_str {
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u8 strength; /* Pad Drive Strength in mA */
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u8 sel; /* Chip-specific select value */
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};
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/* SDIO Drive Strength to sel value table for PMU Rev 1 */
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static const struct sdiod_drive_str sdiod_drive_strength_tab1[] = {
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{
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4, 0x2}, {
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2, 0x3}, {
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1, 0x0}, {
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0, 0x0}
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};
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/* SDIO Drive Strength to sel value table for PMU Rev 2, 3 */
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static const struct sdiod_drive_str sdiod_drive_strength_tab2[] = {
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{
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12, 0x7}, {
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10, 0x6}, {
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8, 0x5}, {
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6, 0x4}, {
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4, 0x2}, {
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2, 0x1}, {
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0, 0x0}
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};
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/* SDIO Drive Strength to sel value table for PMU Rev 8 (1.8V) */
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static const struct sdiod_drive_str sdiod_drive_strength_tab3[] = {
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{
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32, 0x7}, {
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26, 0x6}, {
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22, 0x5}, {
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16, 0x4}, {
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12, 0x3}, {
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8, 0x2}, {
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4, 0x1}, {
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0, 0x0}
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};
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#define SDIOD_DRVSTR_KEY(chip, pmu) (((chip) << 16) | (pmu))
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static char *brcmf_chipname(uint chipid, char *buf, uint len)
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{
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const char *fmt;
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fmt = ((chipid > 0xa000) || (chipid < 0x4000)) ? "%d" : "%x";
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snprintf(buf, len, fmt, chipid);
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return buf;
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}
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static void brcmf_sdbrcm_sdiod_drive_strength_init(struct brcmf_bus *bus,
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u32 drivestrength) {
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struct sdiod_drive_str *str_tab = NULL;
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u32 str_mask = 0;
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u32 str_shift = 0;
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char chn[8];
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if (!(bus->ci->cccaps & CC_CAP_PMU))
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return;
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switch (SDIOD_DRVSTR_KEY(bus->ci->chip, bus->ci->pmurev)) {
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case SDIOD_DRVSTR_KEY(BCM4325_CHIP_ID, 1):
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str_tab = (struct sdiod_drive_str *)&sdiod_drive_strength_tab1;
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str_mask = 0x30000000;
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str_shift = 28;
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break;
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case SDIOD_DRVSTR_KEY(BCM4325_CHIP_ID, 2):
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case SDIOD_DRVSTR_KEY(BCM4325_CHIP_ID, 3):
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str_tab = (struct sdiod_drive_str *)&sdiod_drive_strength_tab2;
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str_mask = 0x00003800;
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str_shift = 11;
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break;
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case SDIOD_DRVSTR_KEY(BCM4336_CHIP_ID, 8):
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str_tab = (struct sdiod_drive_str *)&sdiod_drive_strength_tab3;
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str_mask = 0x00003800;
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str_shift = 11;
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break;
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default:
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brcmf_dbg(ERROR, "No SDIO Drive strength init done for chip %s rev %d pmurev %d\n",
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brcmf_chipname(bus->ci->chip, chn, 8),
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bus->ci->chiprev, bus->ci->pmurev);
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break;
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}
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if (str_tab != NULL) {
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u32 drivestrength_sel = 0;
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u32 cc_data_temp;
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int i;
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for (i = 0; str_tab[i].strength != 0; i++) {
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if (drivestrength >= str_tab[i].strength) {
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drivestrength_sel = str_tab[i].sel;
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break;
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}
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}
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brcmf_sdcard_reg_write(bus->sdiodev,
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CORE_CC_REG(bus->ci->cccorebase, chipcontrol_addr),
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4, 1);
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cc_data_temp = brcmf_sdcard_reg_read(bus->sdiodev,
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CORE_CC_REG(bus->ci->cccorebase, chipcontrol_addr), 4);
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cc_data_temp &= ~str_mask;
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drivestrength_sel <<= str_shift;
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cc_data_temp |= drivestrength_sel;
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brcmf_sdcard_reg_write(bus->sdiodev,
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CORE_CC_REG(bus->ci->cccorebase, chipcontrol_addr),
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4, cc_data_temp);
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brcmf_dbg(INFO, "SDIO: %dmA drive strength selected, set to 0x%08x\n",
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drivestrength, cc_data_temp);
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}
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}
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static bool
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brcmf_sdbrcm_probe_attach(struct brcmf_bus *bus, u32 regsva)
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{
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@ -3867,7 +3753,8 @@ brcmf_sdbrcm_probe_attach(struct brcmf_bus *bus, u32 regsva)
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goto fail;
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}
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brcmf_sdbrcm_sdiod_drive_strength_init(bus, SDIO_DRIVE_STRENGTH);
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brcmf_sdio_chip_drivestrengthinit(bus->sdiodev, bus->ci,
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SDIO_DRIVE_STRENGTH);
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/* Get info on the SOCRAM cores... */
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bus->ramsize = bus->ci->ramsize;
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@ -52,6 +52,44 @@
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#define SBIDH_VC_MASK 0xffff0000 /* vendor code */
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#define SBIDH_VC_SHIFT 16
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#define SDIOD_DRVSTR_KEY(chip, pmu) (((chip) << 16) | (pmu))
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/* SDIO Pad drive strength to select value mappings */
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struct sdiod_drive_str {
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u8 strength; /* Pad Drive Strength in mA */
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u8 sel; /* Chip-specific select value */
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};
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/* SDIO Drive Strength to sel value table for PMU Rev 1 */
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static const struct sdiod_drive_str sdiod_drive_strength_tab1[] = {
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{
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4, 0x2}, {
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2, 0x3}, {
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1, 0x0}, {
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0, 0x0}
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};
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/* SDIO Drive Strength to sel value table for PMU Rev 2, 3 */
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static const struct sdiod_drive_str sdiod_drive_strength_tab2[] = {
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{
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12, 0x7}, {
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10, 0x6}, {
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8, 0x5}, {
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6, 0x4}, {
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4, 0x2}, {
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2, 0x1}, {
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0, 0x0}
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};
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/* SDIO Drive Strength to sel value table for PMU Rev 8 (1.8V) */
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static const struct sdiod_drive_str sdiod_drive_strength_tab3[] = {
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{
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32, 0x7}, {
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26, 0x6}, {
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22, 0x5}, {
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16, 0x4}, {
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12, 0x3}, {
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8, 0x2}, {
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4, 0x1}, {
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0, 0x0}
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};
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static u32
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brcmf_sdio_chip_corerev(struct brcmf_sdio_dev *sdiodev,
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u32 corebase)
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@ -363,3 +401,77 @@ brcmf_sdio_chip_detach(struct chip_info **ci_ptr)
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kfree(*ci_ptr);
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*ci_ptr = NULL;
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}
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static char *brcmf_sdio_chip_name(uint chipid, char *buf, uint len)
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{
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const char *fmt;
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fmt = ((chipid > 0xa000) || (chipid < 0x4000)) ? "%d" : "%x";
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snprintf(buf, len, fmt, chipid);
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return buf;
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}
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void
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brcmf_sdio_chip_drivestrengthinit(struct brcmf_sdio_dev *sdiodev,
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struct chip_info *ci, u32 drivestrength)
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{
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struct sdiod_drive_str *str_tab = NULL;
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u32 str_mask = 0;
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u32 str_shift = 0;
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char chn[8];
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if (!(ci->cccaps & CC_CAP_PMU))
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return;
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switch (SDIOD_DRVSTR_KEY(ci->chip, ci->pmurev)) {
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case SDIOD_DRVSTR_KEY(BCM4325_CHIP_ID, 1):
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str_tab = (struct sdiod_drive_str *)&sdiod_drive_strength_tab1;
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str_mask = 0x30000000;
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str_shift = 28;
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break;
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case SDIOD_DRVSTR_KEY(BCM4325_CHIP_ID, 2):
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case SDIOD_DRVSTR_KEY(BCM4325_CHIP_ID, 3):
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str_tab = (struct sdiod_drive_str *)&sdiod_drive_strength_tab2;
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str_mask = 0x00003800;
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str_shift = 11;
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break;
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case SDIOD_DRVSTR_KEY(BCM4336_CHIP_ID, 8):
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str_tab = (struct sdiod_drive_str *)&sdiod_drive_strength_tab3;
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str_mask = 0x00003800;
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str_shift = 11;
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break;
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default:
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brcmf_dbg(ERROR, "No SDIO Drive strength init done for chip %s rev %d pmurev %d\n",
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brcmf_sdio_chip_name(ci->chip, chn, 8),
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ci->chiprev, ci->pmurev);
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break;
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}
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if (str_tab != NULL) {
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u32 drivestrength_sel = 0;
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u32 cc_data_temp;
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int i;
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for (i = 0; str_tab[i].strength != 0; i++) {
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if (drivestrength >= str_tab[i].strength) {
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drivestrength_sel = str_tab[i].sel;
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break;
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}
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}
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brcmf_sdcard_reg_write(sdiodev,
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CORE_CC_REG(ci->cccorebase, chipcontrol_addr),
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4, 1);
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cc_data_temp = brcmf_sdcard_reg_read(sdiodev,
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CORE_CC_REG(ci->cccorebase, chipcontrol_addr), 4);
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cc_data_temp &= ~str_mask;
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drivestrength_sel <<= str_shift;
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cc_data_temp |= drivestrength_sel;
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brcmf_sdcard_reg_write(sdiodev,
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CORE_CC_REG(ci->cccorebase, chipcontrol_addr),
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4, cc_data_temp);
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brcmf_dbg(INFO, "SDIO: %dmA drive strength selected, set to 0x%08x\n",
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drivestrength, cc_data_temp);
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}
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}
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@ -142,5 +142,8 @@ extern void brcmf_sdio_chip_coredisable(struct brcmf_sdio_dev *sdiodev,
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extern int brcmf_sdio_chip_attach(struct brcmf_sdio_dev *sdiodev,
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struct chip_info **ci_ptr, u32 regs);
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extern void brcmf_sdio_chip_detach(struct chip_info **ci_ptr);
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extern void brcmf_sdio_chip_drivestrengthinit(struct brcmf_sdio_dev *sdiodev,
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struct chip_info *ci,
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u32 drivestrength);
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#endif /* _BRCMFMAC_SDIO_CHIP_H_ */
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