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ARM: dts: msm: Add support for Lpass PIL on msmfalcon

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Add support for Lpass PIL which facilitates the loading of Lpass
firmware, authentication and bringing it out of reset.

Change-Id: I587b39bc302449591cc0c71ff15b740374a8af4d
Signed-off-by: Gaurav Kohli <gkohli@codeaurora.org>
This commit is contained in:
Gaurav Kohli 2016-09-02 12:40:40 +05:30 • committed by Gerrit - the friendly Code Review server
parent 773f15cdab
commit e1c41fb41b
2 changed files with 55 additions and 0 deletions
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23
arch/arm/boot/dts/qcom/msmfalcon-smp2p.dtsi
View file

@ -172,4 +172,27 @@
compatible = "qcom,smp2pgpio_test_smp2p_5_out";
gpios = <&smp2pgpio_smp2p_5_out 0 0>;
};
/* ssr - inbound entry from lpass */
smp2pgpio_ssr_smp2p_2_in: qcom,smp2pgpio-ssr-smp2p-2-in {
compatible = "qcom,smp2pgpio";
qcom,entry-name = "slave-kernel";
qcom,remote-pid = <2>;
qcom,is-inbound;
gpio-controller;
#gpio-cells = <2>;
interrupt-controller;
#interrupt-cells = <2>;
};
/* ssr - outbound entry to lpass */
smp2pgpio_ssr_smp2p_2_out: qcom,smp2pgpio-ssr-smp2p-2-out {
compatible = "qcom,smp2pgpio";
qcom,entry-name = "master-kernel";
qcom,remote-pid = <2>;
gpio-controller;
#gpio-cells = <2>;
interrupt-controller;
#interrupt-cells = <2>;
};
};

32
arch/arm/boot/dts/qcom/msmfalcon.dtsi
View file

@ -670,6 +670,38 @@
<0 425 0>; /* CE11 */
qcom,wlan-msa-memory = <0x100000>;
};
qcom,lpass@15700000 {
compatible = "qcom,pil-tz-generic";
reg = <0x15700000 0x00100>;
interrupts = <0 162 1>;
vdd_cx-supply = <&pmfalcon_s3b_level>;
qcom,proxy-reg-names = "vdd_cx";
qcom,vdd_cx-uV-uA = <RPM_SMD_REGULATOR_LEVEL_TURBO 100000>;
clocks = <&clock_rpmcc CXO_PIL_LPASS_CLK>;
clock-names = "xo";
qcom,proxy-clock-names = "xo";
qcom,pas-id = <1>;
qcom,proxy-timeout-ms = <10000>;
qcom,smem-id = <423>;
qcom,sysmon-id = <1>;
qcom,ssctl-instance-id = <0x14>;
qcom,firmware-name = "adsp";
memory-region = <&adsp_fw_mem>;
/* GPIO inputs from lpass */
qcom,gpio-err-fatal = <&smp2pgpio_ssr_smp2p_2_in 0 0>;
qcom,gpio-proxy-unvote = <&smp2pgpio_ssr_smp2p_2_in 2 0>;
qcom,gpio-err-ready = <&smp2pgpio_ssr_smp2p_2_in 1 0>;
qcom,gpio-stop-ack = <&smp2pgpio_ssr_smp2p_2_in 3 0>;
/* GPIO output to lpass */
qcom,gpio-force-stop = <&smp2pgpio_ssr_smp2p_2_out 0 0>;
status = "ok";
};
};
#include "msmfalcon-ion.dtsi"