From e4348b5975cb3cfb515056083284ea84c3007eb1 Mon Sep 17 00:00:00 2001 From: Mitchel Humpherys Date: Wed, 29 Oct 2014 12:45:21 -0700 Subject: [PATCH] iommu/arm-smmu: correct the physical address mask during ATOS We're currently taking the upper 52 bits from the CB_PAR register and using them for the output physical address. That doesn't make sense for a few reasons, not the least of which is the fact that physical addresses are only 48 bits on ARM64 and even less on ARM32. Also, when using V7L and V8 descriptor formats the top byte of the CB_PAR register contains the memory attributes for the translation. Fix this by masking out everything above the valid physical address bits with PHYS_MASK. Change-Id: I96096a6515dc42025d3134933a90b072e5153968 Signed-off-by: Mitchel Humpherys --- drivers/iommu/arm-smmu.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/iommu/arm-smmu.c b/drivers/iommu/arm-smmu.c index 8cb2fec5636c..78918d9cf1bf 100644 --- a/drivers/iommu/arm-smmu.c +++ b/drivers/iommu/arm-smmu.c @@ -1858,7 +1858,7 @@ static phys_addr_t arm_smmu_iova_to_phys_hard(struct iommu_domain *domain, dev_err(dev, "PAR = 0x%llx\n", phys); phys = 0; } else { - phys = (phys & 0xfffffff000ULL) | (iova & 0x00000fff); + phys = (phys & (PHYS_MASK & ~0xfffULL)) | (iova & 0xfff); } arm_smmu_disable_clocks(smmu);