From e5de360e6f33eaa30f1c1d1016e54a6720d919ac Mon Sep 17 00:00:00 2001
From: Jordan Crouse <jcrouse@codeaurora.org>
Date: Mon, 13 Feb 2017 10:14:33 -0700
Subject: [PATCH] drm/msm: Come out of secure before executing GPMU
 initialization

There isn't any need to be in secure mode when executing the GPMU
initalization so swap out to eliminate it as a variable when
GPMU init goes broken.

Change-Id: Ic0dedbad07b8cde80e257f71999002e9cbc47c24
Signed-off-by: Jordan Crouse <jcrouse@codeaurora.org>
---
 drivers/gpu/drm/msm/adreno/a5xx_gpu.c   | 10 ++++++----
 drivers/gpu/drm/msm/adreno/a5xx_power.c | 13 +++++++------
 2 files changed, 13 insertions(+), 10 deletions(-)

diff --git a/drivers/gpu/drm/msm/adreno/a5xx_gpu.c b/drivers/gpu/drm/msm/adreno/a5xx_gpu.c
index a49a7b247547..9049bf2aa68b 100644
--- a/drivers/gpu/drm/msm/adreno/a5xx_gpu.c
+++ b/drivers/gpu/drm/msm/adreno/a5xx_gpu.c
@@ -744,10 +744,6 @@ static int a5xx_hw_init(struct msm_gpu *gpu)
 	if (ret)
 		return ret;
 
-	ret = a5xx_power_init(gpu);
-	if (ret)
-		return ret;
-
 	/*
 	 * Send a pipeline event stat to get misbehaving counters to start
 	 * ticking correctly
@@ -785,6 +781,12 @@ static int a5xx_hw_init(struct msm_gpu *gpu)
 		gpu_write(gpu, REG_A5XX_RBBM_SECVID_TRUST_CNTL, 0x0);
 	}
 
+	/* Next, start the power */
+	ret = a5xx_power_init(gpu);
+	if (ret)
+		return ret;
+
+
 	/* Last step - yield the ringbuffer */
 	a5xx_preempt_start(gpu);
 
diff --git a/drivers/gpu/drm/msm/adreno/a5xx_power.c b/drivers/gpu/drm/msm/adreno/a5xx_power.c
index 2040b18f731f..e77592e2272b 100644
--- a/drivers/gpu/drm/msm/adreno/a5xx_power.c
+++ b/drivers/gpu/drm/msm/adreno/a5xx_power.c
@@ -1,4 +1,4 @@
-/* Copyright (c) 2016 The Linux Foundation. All rights reserved.
+/* Copyright (c) 2016-2017 The Linux Foundation. All rights reserved.
  *
  * This program is free software; you can redistribute it and/or modify
  * it under the terms of the GNU General Public License version 2 and
@@ -250,8 +250,9 @@ static int a5xx_gpmu_init(struct msm_gpu *gpu)
 
 	gpu->funcs->flush(gpu, ring);
 
+	/* This is "fatal" because the CP is left in a bad state */
 	if (!a5xx_idle(gpu, ring)) {
-		DRM_ERROR("%s: Unable to load GPMU firmware. GPMU will not be active\n",
+		DRM_ERROR("%s: Unable to load GPMU firmwaren",
 			gpu->name);
 		return -EINVAL;
 	}
@@ -268,18 +269,18 @@ static int a5xx_gpmu_init(struct msm_gpu *gpu)
 	 * won't have advanced power collapse.
 	 */
 	if (spin_usecs(gpu, 25, REG_A5XX_GPMU_GENERAL_0, 0xFFFFFFFF,
-		0xBABEFACE))
+		0xBABEFACE)) {
 		DRM_ERROR("%s: GPMU firmware initialization timed out\n",
 			gpu->name);
+		return 0;
+	}
 
 	if (!adreno_is_a530(adreno_gpu)) {
 		u32 val = gpu_read(gpu, REG_A5XX_GPMU_GENERAL_1);
 
-		if (val) {
+		if (val)
 			DRM_ERROR("%s: GPMU firmare initialization failed: %d\n",
 				gpu->name, val);
-			return -EIO;
-		}
 	}
 
 	/* FIXME: Clear GPMU interrupts? */