msm: mdss: add support to set the minimum mdp transfer time

For command mode panels current code calculations adjust the mdp
clock rate based on the minimum dsi pixel clock rate. This is
wrong and can lead to power issues since this rate considers
the blanking times which are not required for the mdp clock
calculations.
This change optimize the calculations by only considering the worst
width that could be processed by the mdp without blanking periods
and consider the time expected for the transfer by adjusting
the mdp clock in order to meet the performance requested; this
time can be tuned through the panel configuration.

Change-Id: Ib25df0e8f749d3ffc1d9059d5d7eac27e0f0b81e
Signed-off-by: Ingrid Gallardo <ingridg@codeaurora.org>

Documentation/devicetree/bindings/fb/mdss-dsi-panel.txt

@@ -253,6 +253,20 @@ Optional properties:
 					60 = 60 frames per second (default)
 - qcom,mdss-dsi-panel-clockrate:	A 64 bit value specifies the panel clock speed in Hz.
 					0 = default value.
+- qcom,mdss-mdp-transfer-time-us:	Specifies the dsi transfer time for command mode
+					panels in microseconds. Driver uses this number to adjust
+					the clock rate according to the expected transfer time.
+					Increasing this value would slow down the mdp processing
+					and can result in slower performance.
+					Decreasing this value can speed up the mdp processing,
+					but this can also impact power consumption.
+					As a rule this time should not be higher than the time
+					that would be expected with the processing at the
+					dsi link rate since anyways this would be the maximum
+					transfer time that could be achieved.
+					If ping pong split enabled, this time should not be higher
+					than two times the dsi link rate time.
+					14000 = default value.
 - qcom,mdss-dsi-on-command-state:	String that specifies the ctrl state for sending ON commands.
 					"dsi_lp_mode" = DSI low power mode (default)
 					"dsi_hs_mode" = DSI high speed mode
@@ -489,6 +503,7 @@ Example:
 		qcom,mdss-dsi-dma-trigger = <0>;
 		qcom,mdss-dsi-panel-framerate = <60>;
 		qcom,mdss-dsi-panel-clockrate = <424000000>;
+		qcom,mdss-mdp-transfer-time-us = <12500>;
 		qcom,mdss-dsi-panel-timings = [7d 25 1d 00 37 33
 					22 27 1e 03 04 00];
                 qcom,mdss-dsi-panel-timings-8996 = [23 20 06 09 05 03 04 a0

drivers/video/fbdev/msm/mdss_dsi_panel.c

@@ -26,6 +26,7 @@
 
 #define DT_CMD_HDR 6
 #define MIN_REFRESH_RATE 30
+#define DEFAULT_MDP_TRANSFER_TIME 14000
 
 #define CEIL(x, y)		(((x) + ((y)-1)) / (y))
 
@@ -2021,9 +2022,14 @@ static int mdss_panel_parse_dt(struct device_node *np,
 
 	rc = of_property_read_u32(np, "qcom,mdss-dsi-panel-framerate", &tmp);
 	pinfo->mipi.frame_rate = (!rc ? tmp : 60);
+
 	pinfo->clk_rate = 0;
 	of_property_read_u64(np, "qcom,mdss-dsi-panel-clockrate",
 		&pinfo->clk_rate);
+
+	rc = of_property_read_u32(np, "qcom,mdss-mdp-transfer-time-us", &tmp);
+	pinfo->mdp_transfer_time_us = (!rc ? tmp : DEFAULT_MDP_TRANSFER_TIME);
+
 	data = of_get_property(np, "qcom,mdss-dsi-panel-timings", &len);
 	if ((!data) || (len != 12)) {
 		pr_err("%s:%d, Unable to read Phy timing settings",

drivers/video/fbdev/msm/mdss_mdp_ctl.c

@@ -903,14 +903,14 @@ static void mdss_mdp_perf_calc_mixer(struct mdss_mdp_mixer *mixer,
 						&mixer->ctl->dst_comp_ratio);
 
 		} else if (pinfo->type == MIPI_CMD_PANEL) {
-			/* for cmd mode, run as fast as the link allows us */
-			u32 dsi_pclk_rate = pinfo->mipi.dsi_pclk_rate;
+			u32 dsi_transfer_rate = mixer->width * v_total;
 
-			if (is_pingpong_split(mixer->ctl->mfd))
-				dsi_pclk_rate *= 2;
+			/* adjust transfer time from micro seconds */
+			dsi_transfer_rate = mult_frac(dsi_transfer_rate,
+				1000000, pinfo->mdp_transfer_time_us);
 
-			if (dsi_pclk_rate > perf->mdp_clk_rate)
-				perf->mdp_clk_rate = dsi_pclk_rate;
+			if (dsi_transfer_rate > perf->mdp_clk_rate)
+				perf->mdp_clk_rate = dsi_transfer_rate;
 		}
 	}
 

drivers/video/fbdev/msm/mdss_panel.h

@@ -488,6 +488,7 @@ struct mdss_panel_info {
 	u64 clk_rate;
 	u32 clk_min;
 	u64 clk_max;
+	u32 mdp_transfer_time_us;
 	u32 frame_count;
 	u32 is_3d_panel;
 	u32 out_format;