arm: cpu: read all address cells in dt for cpuid

For v8/arm64 platforms the number of address-cells can be 2.
If the same device tree is used on 32-bit platforms,it is
currently reading only one cell of 32-bits.

Fix this by reading both cells for getting the hwid.

Change-Id: Id281b6b8ac3c9312848c39e11019284f970caced
Signed-off-by: Srinivas Ramana <sramana@codeaurora.org>
This commit is contained in:
Srinivas Ramana 2016-05-13 12:58:08 +05:30 committed by Kyle Yan
parent 5f47a78399
commit e6855ed3fe

View file

@ -88,6 +88,7 @@ void __init arm_dt_init_cpu_maps(void)
for_each_child_of_node(cpus, cpu) { for_each_child_of_node(cpus, cpu) {
u32 hwid; u32 hwid;
const __be32 *cell;
if (of_node_cmp(cpu->type, "cpu")) if (of_node_cmp(cpu->type, "cpu"))
continue; continue;
@ -98,13 +99,13 @@ void __init arm_dt_init_cpu_maps(void)
* properties is considered invalid to build the * properties is considered invalid to build the
* cpu_logical_map. * cpu_logical_map.
*/ */
if (of_property_read_u32(cpu, "reg", &hwid)) { cell = of_get_property(cpu, "reg", NULL);
pr_debug(" * %s missing reg property\n", if (!cell) {
cpu->full_name); pr_err("%s: missing reg property\n", cpu->full_name);
of_node_put(cpu); of_node_put(cpu);
return; return;
} }
hwid = of_read_number(cell, of_n_addr_cells(cpu));
/* /*
* 8 MSBs must be set to 0 in the DT since the reg property * 8 MSBs must be set to 0 in the DT since the reg property
* defines the MPIDR[23:0]. * defines the MPIDR[23:0].