evie/android_kernel_oneplus_msm8998
1
0
Fork 0
Code Issues Pull requests Projects Releases Packages Wiki Activity Actions

Add support of the IOMMU_DEVICE flag.

Browse source 
This flag is used for specifying access to device memory. SMMU would apply
device memory attributes for a DMA transaction. This is required for setting
access to GIC registers, for generating message interrupts. This would ensure that
transactions targetting device memory are not gathered or reordered.

CRs-Fixed: 792402
Change-Id: Ief623e16e4f2dfc99ef6745459777269f1ab7ac6
Signed-off-by: Varun Sethi <Varun.Sethi@freescale.com>
Patch-mainline: iommu @ 10/06/14 @ 10:28
Signed-off-by: Neeti Desai <neetid@codeaurora.org>
This commit is contained in:
Varun Sethi 2014-10-06 11:28:00 +01:00 • committed by David Keitel
parent aa92e1c073
commit e8ecda16e0
1 changed files with 7 additions and 0 deletions
Show stats Download patch file Download diff file Expand all files Collapse all files

7
drivers/iommu/arm-smmu.c
View file

@ -1690,6 +1690,10 @@ static int arm_smmu_alloc_init_pte(struct arm_smmu_domain *smmu_domain,
if (prot & IOMMU_CACHE)
pteval |= (MAIR_ATTR_IDX_CACHE <<
ARM_SMMU_PTE_ATTRINDX_SHIFT);
if (prot & IOMMU_DEVICE)
pteval |= (MAIR_ATTR_IDX_DEV <<
ARM_SMMU_PTE_ATTRINDX_SHIFT);
} else {
pteval |= ARM_SMMU_PTE_HAP_FAULT;
if (prot & IOMMU_READ && !(prot & IOMMU_PRIV))
@ -1700,6 +1704,9 @@ static int arm_smmu_alloc_init_pte(struct arm_smmu_domain *smmu_domain,
pteval |= ARM_SMMU_PTE_MEMATTR_OIWB;
else
pteval |= ARM_SMMU_PTE_MEMATTR_NC;
if (prot & IOMMU_DEVICE)
pteval |= ARM_SMMU_PTE_MEMATTR_DEV;
}
/* If no access, create a faulting entry to avoid TLB fills */