iwlagn: remove hw_rev
The hw_rev variable is used only during init, so there's no need to keep it around. Signed-off-by: Johannes Berg <johannes.berg@intel.com> Signed-off-by: Wey-Yi Guy <wey-yi.w.guy@intel.com> Signed-off-by: John W. Linville <linville@tuxdriver.com>
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bc25593063
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e98a130259
4 changed files with 11 additions and 11 deletions
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@ -3685,11 +3685,11 @@ struct ieee80211_ops iwlagn_hw_ops = {
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.offchannel_tx_cancel_wait = iwl_mac_offchannel_tx_cancel_wait,
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};
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static void iwl_hw_detect(struct iwl_priv *priv)
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static u32 iwl_hw_detect(struct iwl_priv *priv)
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{
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priv->hw_rev = _iwl_read32(priv, CSR_HW_REV);
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priv->rev_id = priv->pci_dev->revision;
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IWL_DEBUG_INFO(priv, "HW Revision ID = 0x%X\n", priv->rev_id);
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return _iwl_read32(priv, CSR_HW_REV);
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}
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static int iwl_set_hw_params(struct iwl_priv *priv)
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@ -3740,6 +3740,7 @@ static int iwl_pci_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
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struct iwl_cfg *cfg = (struct iwl_cfg *)(ent->driver_data);
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unsigned long flags;
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u16 pci_cmd, num_mac;
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u32 hw_rev;
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/************************
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* 1. Allocating HW data
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@ -3885,9 +3886,9 @@ static int iwl_pci_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
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*/
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iwl_write32(priv, CSR_RESET, CSR_RESET_REG_FLAG_NEVO_RESET);
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iwl_hw_detect(priv);
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hw_rev = iwl_hw_detect(priv);
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IWL_INFO(priv, "Detected %s, REV=0x%X\n",
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priv->cfg->name, priv->hw_rev);
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priv->cfg->name, hw_rev);
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/* We disable the RETRY_TIMEOUT register (0x41) to keep
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* PCI Tx retries from interfering with C3 CPU state */
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@ -3903,7 +3904,7 @@ static int iwl_pci_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
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* 4. Read EEPROM
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*****************/
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/* Read the EEPROM */
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err = iwl_eeprom_init(priv);
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err = iwl_eeprom_init(priv, hw_rev);
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if (err) {
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IWL_ERR(priv, "Unable to init EEPROM\n");
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goto out_iounmap;
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@ -1253,7 +1253,6 @@ struct iwl_priv {
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/* pci hardware address support */
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void __iomem *hw_base;
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u32 hw_rev;
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u8 rev_id;
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/* microcode/device supports multiple contexts */
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@ -188,13 +188,13 @@ static void iwl_set_otp_access(struct iwl_priv *priv, enum iwl_access_mode mode)
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CSR_OTP_GP_REG_OTP_ACCESS_MODE);
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}
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static int iwlcore_get_nvm_type(struct iwl_priv *priv)
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static int iwlcore_get_nvm_type(struct iwl_priv *priv, u32 hw_rev)
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{
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u32 otpgp;
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int nvm_type;
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/* OTP only valid for CP/PP and after */
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switch (priv->hw_rev & CSR_HW_REV_TYPE_MSK) {
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switch (hw_rev & CSR_HW_REV_TYPE_MSK) {
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case CSR_HW_REV_TYPE_NONE:
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IWL_ERR(priv, "Unknown hardware type\n");
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return -ENOENT;
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@ -394,7 +394,7 @@ u16 iwl_eeprom_query16(const struct iwl_priv *priv, size_t offset)
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*
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* NOTE: This routine uses the non-debug IO access functions.
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*/
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int iwl_eeprom_init(struct iwl_priv *priv)
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int iwl_eeprom_init(struct iwl_priv *priv, u32 hw_rev)
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{
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__le16 *e;
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u32 gp = iwl_read32(priv, CSR_EEPROM_GP);
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@ -404,7 +404,7 @@ int iwl_eeprom_init(struct iwl_priv *priv)
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u16 validblockaddr = 0;
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u16 cache_addr = 0;
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priv->nvm_device_type = iwlcore_get_nvm_type(priv);
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priv->nvm_device_type = iwlcore_get_nvm_type(priv, hw_rev);
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if (priv->nvm_device_type == -ENOENT)
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return -ENOENT;
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/* allocate eeprom */
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@ -302,7 +302,7 @@ struct iwl_eeprom_ops {
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};
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int iwl_eeprom_init(struct iwl_priv *priv);
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int iwl_eeprom_init(struct iwl_priv *priv, u32 hw_rev);
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void iwl_eeprom_free(struct iwl_priv *priv);
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int iwl_eeprom_check_version(struct iwl_priv *priv);
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int iwl_eeprom_check_sku(struct iwl_priv *priv);
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