soc: qcom: rpm: Use GENMASK APIs to generate bit masks

The bit mask macro GEN_FIELD(24,8) causes overflow as it tries to shift by
32 bits. Using kernel's builtin GENMASK macro to avoid such overflows.

Change-Id: I614a68eb009eb8b223a4da45349124a70c0a8134
Signed-off-by: Mahesh Sivasubramanian <msivasub@codeaurora.org>
This commit is contained in:
Mahesh Sivasubramanian 2017-01-17 11:19:21 -07:00
parent 4b3736890b
commit e9e57fce9e

View file

@ -108,9 +108,7 @@ static struct glink_apps_rpm_data *glink_data;
#define RPM_DATA_LEN_SIZE 16
#define RPM_HDR_SIZE ((rpm_msg_fmt_ver == RPM_MSG_V0_FMT) ?\
sizeof(struct rpm_v0_hdr) : sizeof(struct rpm_v1_hdr))
#define GET_FIELD(offset, size) (((1U << (offset + size)) - 1) - \
((1U << offset) - 1))
#define CLEAR_FIELD(offset, size) (~GET_FIELD(offset, size))
#define CLEAR_FIELD(offset, size) (~GENMASK(offset + size - 1, offset))
static ATOMIC_NOTIFIER_HEAD(msm_rpm_sleep_notifier);
static bool standalone;
@ -223,7 +221,7 @@ static uint32_t msm_rpm_get_next_msg_id(void);
static inline uint32_t get_offset_value(uint32_t val, uint32_t offset,
uint32_t size)
{
return (((val) & GET_FIELD(offset, size))
return (((val) & GENMASK(offset + size - 1, offset))
>> offset);
}