dwc3-msm: Add delay between consecutive register reads in while loop

Add some delay between two consecutive register reads in while loop
so that to avoid traffic congestion on NOCs.

Change-Id: I6efb8c91e0d07160ccce593a23898b2259cb1ebf
Signed-off-by: Vijayavardhan Vennapusa <vvreddy@codeaurora.org>
This commit is contained in:
Vijayavardhan Vennapusa 2017-07-28 11:23:47 +05:30
parent e29d253ecf
commit e9ee6bea1e

View file

@ -1239,7 +1239,7 @@ static void gsi_set_clear_dbell(struct usb_ep *ep,
*/ */
static bool gsi_check_ready_to_suspend(struct usb_ep *ep, bool f_suspend) static bool gsi_check_ready_to_suspend(struct usb_ep *ep, bool f_suspend)
{ {
u32 timeout = 1500; u32 timeout = 500;
u32 reg = 0; u32 reg = 0;
struct dwc3_ep *dep = to_dwc3_ep(ep); struct dwc3_ep *dep = to_dwc3_ep(ep);
struct dwc3 *dwc = dep->dwc; struct dwc3 *dwc = dep->dwc;
@ -1252,6 +1252,7 @@ static bool gsi_check_ready_to_suspend(struct usb_ep *ep, bool f_suspend)
"Unable to suspend GSI ch. WR_CTRL_STATE != 0\n"); "Unable to suspend GSI ch. WR_CTRL_STATE != 0\n");
return false; return false;
} }
usleep_range(20, 22);
} }
/* Check for U3 only if we are not handling Function Suspend */ /* Check for U3 only if we are not handling Function Suspend */
if (!f_suspend) { if (!f_suspend) {
@ -1933,6 +1934,7 @@ static int dwc3_msm_prepare_suspend(struct dwc3_msm *mdwc)
reg = dwc3_msm_read_reg(mdwc->base, PWR_EVNT_IRQ_STAT_REG); reg = dwc3_msm_read_reg(mdwc->base, PWR_EVNT_IRQ_STAT_REG);
if (reg & PWR_EVNT_LPM_IN_L2_MASK) if (reg & PWR_EVNT_LPM_IN_L2_MASK)
break; break;
usleep_range(20, 30);
} }
if (!(reg & PWR_EVNT_LPM_IN_L2_MASK)) if (!(reg & PWR_EVNT_LPM_IN_L2_MASK))
dev_err(mdwc->dev, "could not transition HS PHY to L2\n"); dev_err(mdwc->dev, "could not transition HS PHY to L2\n");