KVM: x86: Emulate MSR_IA32_ARCH_CAPABILITIES on AMD hosts
commit 0cf9135b773bf32fba9dd8e6699c1b331ee4b749 upstream. The CPUID flag ARCH_CAPABILITIES is unconditioinally exposed to host userspace for all x86 hosts, i.e. KVM advertises ARCH_CAPABILITIES regardless of hardware support under the pretense that KVM fully emulates MSR_IA32_ARCH_CAPABILITIES. Unfortunately, only VMX hosts handle accesses to MSR_IA32_ARCH_CAPABILITIES (despite KVM_GET_MSRS also reporting MSR_IA32_ARCH_CAPABILITIES for all hosts). Move the MSR_IA32_ARCH_CAPABILITIES handling to common x86 code so that it's emulated on AMD hosts. Fixes: 1eaafe91a0df4 ("kvm: x86: IA32_ARCH_CAPABILITIES is always supported") Cc: stable@vger.kernel.org Reported-by: Xiaoyao Li <xiaoyao.li@linux.intel.com> Cc: Jim Mattson <jmattson@google.com> Signed-off-by: Sean Christopherson <sean.j.christopherson@intel.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org> [bwh: Backported to 4.4: adjust context] Signed-off-by: Ben Hutchings <ben@decadent.org.uk> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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3 changed files with 13 additions and 14 deletions
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@ -408,6 +408,7 @@ struct kvm_vcpu_arch {
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u64 smbase;
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bool tpr_access_reporting;
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u64 ia32_xss;
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u64 arch_capabilities;
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/*
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* Paging state of the vcpu
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@ -546,7 +546,6 @@ struct vcpu_vmx {
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u64 msr_guest_kernel_gs_base;
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#endif
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u64 arch_capabilities;
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u64 spec_ctrl;
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u32 vm_entry_controls_shadow;
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@ -2866,12 +2865,6 @@ static int vmx_get_msr(struct kvm_vcpu *vcpu, struct msr_data *msr_info)
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msr_info->data = to_vmx(vcpu)->spec_ctrl;
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break;
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case MSR_IA32_ARCH_CAPABILITIES:
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if (!msr_info->host_initiated &&
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!guest_cpuid_has_arch_capabilities(vcpu))
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return 1;
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msr_info->data = to_vmx(vcpu)->arch_capabilities;
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break;
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case MSR_IA32_SYSENTER_CS:
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msr_info->data = vmcs_read32(GUEST_SYSENTER_CS);
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break;
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@ -3028,11 +3021,6 @@ static int vmx_set_msr(struct kvm_vcpu *vcpu, struct msr_data *msr_info)
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vmx_disable_intercept_for_msr(vmx->vmcs01.msr_bitmap, MSR_IA32_PRED_CMD,
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MSR_TYPE_W);
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break;
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case MSR_IA32_ARCH_CAPABILITIES:
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if (!msr_info->host_initiated)
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return 1;
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vmx->arch_capabilities = data;
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break;
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case MSR_IA32_CR_PAT:
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if (vmcs_config.vmentry_ctrl & VM_ENTRY_LOAD_IA32_PAT) {
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if (!kvm_mtrr_valid(vcpu, MSR_IA32_CR_PAT, data))
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@ -5079,8 +5067,6 @@ static int vmx_vcpu_setup(struct vcpu_vmx *vmx)
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++vmx->nmsrs;
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}
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vmx->arch_capabilities = kvm_get_arch_capabilities();
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vm_exit_controls_init(vmx, vmcs_config.vmexit_ctrl);
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/* 22.2.1, 20.8.1 */
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@ -2080,6 +2080,11 @@ int kvm_set_msr_common(struct kvm_vcpu *vcpu, struct msr_data *msr_info)
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case MSR_AMD64_BU_CFG2:
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break;
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case MSR_IA32_ARCH_CAPABILITIES:
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if (!msr_info->host_initiated)
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return 1;
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vcpu->arch.arch_capabilities = data;
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break;
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case MSR_EFER:
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return set_efer(vcpu, msr_info);
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case MSR_K7_HWCR:
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@ -2354,6 +2359,12 @@ int kvm_get_msr_common(struct kvm_vcpu *vcpu, struct msr_data *msr_info)
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case MSR_IA32_UCODE_REV:
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msr_info->data = 0x100000000ULL;
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break;
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case MSR_IA32_ARCH_CAPABILITIES:
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if (!msr_info->host_initiated &&
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!guest_cpuid_has_arch_capabilities(vcpu))
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return 1;
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msr_info->data = vcpu->arch.arch_capabilities;
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break;
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case MSR_MTRRcap:
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case 0x200 ... 0x2ff:
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return kvm_mtrr_get_msr(vcpu, msr_info->index, &msr_info->data);
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@ -7402,6 +7413,7 @@ int kvm_arch_vcpu_setup(struct kvm_vcpu *vcpu)
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{
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int r;
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vcpu->arch.arch_capabilities = kvm_get_arch_capabilities();
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kvm_vcpu_mtrr_init(vcpu);
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r = vcpu_load(vcpu);
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if (r)
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