MIPS: lantiq: the detection of the gpe clock is broken
The code to detect unfused SoCs was broken due to missing register masking. Signed-off-by: Thomas Langer <thomas.langer@lantiq.com> Signed-off-by: John Crispin <blogic@openwrt.org> Patchwork: http://patchwork.linux-mips.org/patch/8049/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
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1 changed files with 4 additions and 5 deletions
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@ -147,12 +147,11 @@ static void falcon_gpe_enable(void)
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if (status & (1 << (GPPC_OFFSET + 1)))
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if (status & (1 << (GPPC_OFFSET + 1)))
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return;
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return;
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if (status_r32(STATUS_CONFIG) == 0)
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freq = (status_r32(STATUS_CONFIG) &
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GPEFREQ_MASK) >>
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GPEFREQ_OFFSET;
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if (freq == 0)
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freq = 1; /* use 625MHz on unfused chip */
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freq = 1; /* use 625MHz on unfused chip */
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else
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freq = (status_r32(STATUS_CONFIG) &
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GPEFREQ_MASK) >>
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GPEFREQ_OFFSET;
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/* apply new frequency */
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/* apply new frequency */
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sysctl_w32_mask(SYSCTL_SYS1, 7 << (GPPC_OFFSET + 1),
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sysctl_w32_mask(SYSCTL_SYS1, 7 << (GPPC_OFFSET + 1),
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