From ec61fa0e6f4553a14d82c0ff4f6ce39bfa58306c Mon Sep 17 00:00:00 2001
From: Sudheer Papothi <spapothi@codeaurora.org>
Date: Mon, 8 Jun 2015 22:50:08 +0530
Subject: [PATCH] ARM: dts: msm: Add pinctrl for codec reset and interrupt on
 8996

Change reset and interrupt lines of codec from gpio to pinctrl
on 8996 target to control the drive strength of the pins.

Change-Id: Ie95b80699f1726c2b2e27c1b8e5f51f7ccdd5417
Signed-off-by: Sudheer Papothi <spapothi@codeaurora.org>
---
 arch/arm/boot/dts/qcom/msm8996-pinctrl.dtsi | 43 +++++++++++++++++++++
 arch/arm/boot/dts/qcom/msm8996.dtsi         |  5 +++
 2 files changed, 48 insertions(+)

diff --git a/arch/arm/boot/dts/qcom/msm8996-pinctrl.dtsi b/arch/arm/boot/dts/qcom/msm8996-pinctrl.dtsi
index a5ee06b62b0b..4ac6ec7d44b1 100644
--- a/arch/arm/boot/dts/qcom/msm8996-pinctrl.dtsi
+++ b/arch/arm/boot/dts/qcom/msm8996-pinctrl.dtsi
@@ -1283,6 +1283,49 @@
 			};
 		};
 
+		wcd9xxx_intr {
+			wcd_intr_default: wcd_intr_default{
+				mux {
+					pins = "gpio54";
+					function = "gpio";
+				};
+
+				config {
+					pins = "gpio54";
+					drive-strength = <2>; /* 2 mA */
+					bias-pull-down; /* pull down */
+					input-enable;
+				};
+			};
+		};
+
+		cdc_reset_ctrl {
+			cdc_reset_sleep: cdc_reset_sleep {
+				mux {
+					pins = "gpio64";
+					function = "gpio";
+				};
+				config {
+					pins = "gpio64";
+					drive-strength = <16>;
+					bias-disable;
+					output-low;
+				};
+			};
+			cdc_reset_active:cdc_reset_active {
+				mux {
+					pins = "gpio64";
+					function = "gpio";
+				};
+				config {
+					pins = "gpio64";
+					drive-strength = <16>;
+					bias-pull-down;
+					output-high;
+				};
+			};
+		};
+
 		pri_aux_pcm {
 			pri_aux_pcm_sleep: pri_aux_pcm_sleep {
 				mux {
diff --git a/arch/arm/boot/dts/qcom/msm8996.dtsi b/arch/arm/boot/dts/qcom/msm8996.dtsi
index a5298af71bf8..fc71cab82287 100644
--- a/arch/arm/boot/dts/qcom/msm8996.dtsi
+++ b/arch/arm/boot/dts/qcom/msm8996.dtsi
@@ -849,6 +849,8 @@
 		#interrupt-cells = <1>;
 		interrupt-parent = <&tlmm>;
 		qcom,gpio-connect = <&tlmm 54 0>;
+		pinctrl-names = "default";
+		pinctrl-0 = <&wcd_intr_default>;
 	};
 
 	clock_audio: audio_ext_clk {
@@ -939,6 +941,9 @@
 				      30>;
 
 			qcom,cdc-reset-gpio = <&tlmm 64 0>;
+			pinctrl-names = "default", "idle";
+			pinctrl-0 = <&cdc_reset_active>;
+			pinctrl-1 = <&cdc_reset_sleep>;
 
 			clock-names = "wcd_clk", "wcd_native_clk";
 			clocks = <&clock_audio clk_audio_pmi_clk>,