cnss2: msm: Enable WLAN over PCIe for GVM

The hypervisor does not support PCI_MSM, and uses PCI_HOST_GENERIC
instead.  After this change, the cnss2/PCIe for WLAN in metal case
depends on PCI_MSM, while in GVM case depends on PCI_HOST_GENERIC.

Currently, the WLAN chip is powered up by hypervisor.  So, just
bypass power related code.

Change-Id: Icf13fb11c5e18f6e48746fe82f1b4392559dd5b0
Signed-off-by: Ferry Zhou <tianguiz@codeaurora.org>
This commit is contained in:
Ferry Zhou 2018-01-22 16:11:58 +08:00
parent 70a1e9b625
commit eceef732d8
6 changed files with 124 additions and 20 deletions

View file

@ -1,10 +1,12 @@
config CNSS2
tristate "CNSS2 Platform Driver for Wi-Fi Module"
depends on !CNSS && PCI_MSM
depends on !CNSS && (PCI_MSM || PCI_HOST_GENERIC)
select CNSS_UTILS
---help---
This module adds the support for Connectivity Subsystem (CNSS) used
for PCIe based Wi-Fi devices with QCA6174/QCA6290 chipsets.
This module in metal case depends on PCI_MSM, while in GVM case
depends on PCI_HOST_GENERIC.
This driver also adds support to integrate WLAN module to subsystem
restart framework.

View file

@ -1,4 +1,4 @@
/* Copyright (c) 2016-2017, The Linux Foundation. All rights reserved.
/* Copyright (c) 2016-2018, The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
@ -213,8 +213,21 @@ int cnss_driver_event_post(struct cnss_plat_data *plat_priv,
u32 flags, void *data);
int cnss_get_vreg(struct cnss_plat_data *plat_priv);
int cnss_get_pinctrl(struct cnss_plat_data *plat_priv);
#ifndef CONFIG_MSM_GVM_QUIN
int cnss_power_on_device(struct cnss_plat_data *plat_priv);
void cnss_power_off_device(struct cnss_plat_data *plat_priv);
#else /* CONFIG_MSM_GVM_QUIN */
static inline int cnss_power_on_device(struct cnss_plat_data *plat_priv)
{
return 0;
}
static inline void cnss_power_off_device(struct cnss_plat_data *plat_priv)
{
}
#endif /* CONFIG_MSM_GVM_QUIN */
int cnss_register_subsys(struct cnss_plat_data *plat_priv);
void cnss_unregister_subsys(struct cnss_plat_data *plat_priv);
int cnss_register_ramdump(struct cnss_plat_data *plat_priv);

View file

@ -44,7 +44,9 @@
#define MAX_M3_FILE_NAME_LENGTH 13
#define DEFAULT_M3_FILE_NAME "m3.bin"
#ifdef CONFIG_PCI_MSM
static DEFINE_SPINLOCK(pci_link_down_lock);
#endif
static unsigned int pci_link_down_panic;
module_param(pci_link_down_panic, uint, 0600);
@ -91,6 +93,7 @@ static int cnss_set_pci_config_space(struct cnss_pci_data *pci_priv, bool save)
return 0;
}
#ifdef CONFIG_PCI_MSM
static int cnss_set_pci_link(struct cnss_pci_data *pci_priv, bool link_up)
{
int ret = 0;
@ -217,6 +220,13 @@ int cnss_pci_link_down(struct device *dev)
}
EXPORT_SYMBOL(cnss_pci_link_down);
#else /* CONFIG_PCI_MSM */
static int cnss_set_pci_link(struct cnss_pci_data *pci_priv, bool link_up)
{
return 0;
}
#endif /* CONFIG_PCI_MSM */
static int cnss_pci_init_smmu(struct cnss_pci_data *pci_priv)
{
int ret = 0;
@ -277,6 +287,7 @@ static void cnss_pci_deinit_smmu(struct cnss_pci_data *pci_priv)
pci_priv->smmu_mapping = NULL;
}
#ifdef CONFIG_PCI_MSM
static void cnss_pci_event_cb(struct msm_pcie_notify *notify)
{
unsigned long flags;
@ -595,6 +606,17 @@ int cnss_wlan_pm_control(struct device *dev, bool vote)
}
EXPORT_SYMBOL(cnss_wlan_pm_control);
#else /* CONFIG_PCI_MSM */
static int cnss_reg_pci_event(struct cnss_pci_data *pci_priv)
{
return 0;
}
static void cnss_dereg_pci_event(struct cnss_pci_data *pci_priv)
{
}
#endif /* CONFIG_PCI_MSM */
int cnss_auto_suspend(struct device *dev)
{
int ret = 0;
@ -952,6 +974,31 @@ void cnss_get_msi_address(struct device *dev, u32 *msi_addr_low,
}
EXPORT_SYMBOL(cnss_get_msi_address);
#ifdef CONFIG_PCI_MSM
static inline int cnss_pci_set_dma_mask(struct pci_dev *pci_dev)
{
int ret;
ret = pci_set_dma_mask(pci_dev, DMA_BIT_MASK(PCI_DMA_MASK));
if (ret) {
cnss_pr_err("PCI DMA mask: %d, err: %d\n", PCI_DMA_MASK, ret);
return ret;
}
ret = pci_set_consistent_dma_mask(pci_dev, DMA_BIT_MASK(PCI_DMA_MASK));
if (ret)
cnss_pr_err("PCI consistent DMA mask: %d, err: %d\n",
PCI_DMA_MASK, ret);
return ret;
}
#else /* CONFIG_PCI_MSM */
static inline int cnss_pci_set_dma_mask(struct pci_dev *pci_dev)
{
return 0;
}
#endif /* CONFIG_PCI_MSM */
static int cnss_pci_enable_bus(struct cnss_pci_data *pci_priv)
{
int ret = 0;
@ -984,19 +1031,9 @@ static int cnss_pci_enable_bus(struct cnss_pci_data *pci_priv)
goto disable_device;
}
ret = pci_set_dma_mask(pci_dev, DMA_BIT_MASK(PCI_DMA_MASK));
if (ret) {
cnss_pr_err("Failed to set PCI DMA mask (%d), err = %d\n",
ret, PCI_DMA_MASK);
ret = cnss_pci_set_dma_mask(pci_dev);
if (ret)
goto release_region;
}
ret = pci_set_consistent_dma_mask(pci_dev, DMA_BIT_MASK(PCI_DMA_MASK));
if (ret) {
cnss_pr_err("Failed to set PCI consistent DMA mask (%d), err = %d\n",
ret, PCI_DMA_MASK);
goto release_region;
}
pci_set_master(pci_dev);
@ -1565,6 +1602,7 @@ static const struct pci_device_id cnss_pci_id_table[] = {
};
MODULE_DEVICE_TABLE(pci, cnss_pci_id_table);
#ifdef CONFIG_PCI_MSM
static const struct dev_pm_ops cnss_pm_ops = {
SET_SYSTEM_SLEEP_PM_OPS(cnss_pci_suspend, cnss_pci_resume)
SET_NOIRQ_SYSTEM_SLEEP_PM_OPS(cnss_pci_suspend_noirq,
@ -1572,20 +1610,24 @@ static const struct dev_pm_ops cnss_pm_ops = {
SET_RUNTIME_PM_OPS(cnss_pci_runtime_suspend, cnss_pci_runtime_resume,
cnss_pci_runtime_idle)
};
#endif
struct pci_driver cnss_pci_driver = {
.name = "cnss_pci",
.id_table = cnss_pci_id_table,
.probe = cnss_pci_probe,
.remove = cnss_pci_remove,
#ifdef CONFIG_PCI_MSM
.driver = {
.pm = &cnss_pm_ops,
},
#endif
};
int cnss_pci_init(struct cnss_plat_data *plat_priv)
#ifdef CONFIG_PCI_MSM
static inline int cnss_msm_pcie_enumerate(struct cnss_plat_data *plat_priv)
{
int ret = 0;
int ret;
struct device *dev = &plat_priv->plat_dev->dev;
u32 rc_num;
@ -1602,6 +1644,25 @@ int cnss_pci_init(struct cnss_plat_data *plat_priv)
goto out;
}
return 0;
out:
return ret;
}
#else /* CONFIG_PCI_MSM */
static inline int cnss_msm_pcie_enumerate(struct cnss_plat_data *plat_priv)
{
return 0;
}
#endif /* CONFIG_PCI_MSM */
int cnss_pci_init(struct cnss_plat_data *plat_priv)
{
int ret;
ret = cnss_msm_pcie_enumerate(plat_priv);
if (ret)
goto out;
ret = pci_register_driver(&cnss_pci_driver);
if (ret) {
cnss_pr_err("Failed to register to PCI framework, err = %d\n",

View file

@ -1,4 +1,4 @@
/* Copyright (c) 2016-2017, The Linux Foundation. All rights reserved.
/* Copyright (c) 2016-2018, The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
@ -124,8 +124,21 @@ static inline int cnss_pci_get_auto_suspended(void *bus_priv)
return atomic_read(&pci_priv->auto_suspended);
}
#ifdef CONFIG_PCI_MSM
int cnss_suspend_pci_link(struct cnss_pci_data *pci_priv);
int cnss_resume_pci_link(struct cnss_pci_data *pci_priv);
#else /* CONFIG_PCI_MSM */
static inline int cnss_suspend_pci_link(struct cnss_pci_data *pci_priv)
{
return 0;
}
static inline int cnss_resume_pci_link(struct cnss_pci_data *pci_priv)
{
return 0;
}
#endif /* CONFIG_PCI_MSM */
int cnss_pci_init(struct cnss_plat_data *plat_priv);
void cnss_pci_deinit(struct cnss_plat_data *plat_priv);
int cnss_pci_alloc_fw_mem(struct cnss_pci_data *pci_priv);

View file

@ -1,4 +1,4 @@
/* Copyright (c) 2016-2017, The Linux Foundation. All rights reserved.
/* Copyright (c) 2016-2018, The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
@ -110,6 +110,7 @@ out:
return ret;
}
#ifndef CONFIG_MSM_GVM_QUIN
static int cnss_vreg_on(struct cnss_plat_data *plat_priv)
{
int ret = 0;
@ -229,6 +230,7 @@ static int cnss_vreg_off(struct cnss_plat_data *plat_priv)
return ret;
}
#endif /* CONFIG_MSM_GVM_QUIN */
int cnss_get_pinctrl(struct cnss_plat_data *plat_priv)
{
@ -285,6 +287,7 @@ out:
return ret;
}
#ifndef CONFIG_MSM_GVM_QUIN
static int cnss_select_pinctrl_state(struct cnss_plat_data *plat_priv,
bool state)
{
@ -368,6 +371,7 @@ void cnss_power_off_device(struct cnss_plat_data *plat_priv)
cnss_select_pinctrl_state(plat_priv, false);
cnss_vreg_off(plat_priv);
}
#endif /* CONFIG_MSM_GVM_QUIN */
void cnss_set_pin_connect_status(struct cnss_plat_data *plat_priv)
{

View file

@ -1,4 +1,4 @@
/* Copyright (c) 2016-2017, The Linux Foundation. All rights reserved.
/* Copyright (c) 2016-2018, The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
@ -146,7 +146,19 @@ enum cnss_recovery_reason {
extern int cnss_wlan_register_driver(struct cnss_wlan_driver *driver);
extern void cnss_wlan_unregister_driver(struct cnss_wlan_driver *driver);
extern void cnss_device_crashed(struct device *dev);
#ifdef CONFIG_PCI_MSM
extern int cnss_pci_link_down(struct device *dev);
extern int cnss_wlan_pm_control(struct device *dev, bool vote);
#else /* CONFIG_PCI_MSM */
static inline int cnss_pci_link_down(struct device *dev)
{
return 0;
}
static inline int cnss_wlan_pm_control(struct device *dev, bool vote)
{
return 0;
}
#endif /* CONFIG_PCI_MSM */
extern void cnss_schedule_recovery(struct device *dev,
enum cnss_recovery_reason reason);
extern int cnss_self_recovery(struct device *dev,
@ -166,7 +178,6 @@ extern void cnss_request_pm_qos(struct device *dev, u32 qos_val);
extern void cnss_remove_pm_qos(struct device *dev);
extern void cnss_lock_pm_sem(struct device *dev);
extern void cnss_release_pm_sem(struct device *dev);
extern int cnss_wlan_pm_control(struct device *dev, bool vote);
extern int cnss_auto_suspend(struct device *dev);
extern int cnss_auto_resume(struct device *dev);
extern int cnss_get_user_msi_assignment(struct device *dev, char *user_name,