From ef0049eefdf23ca90a53205ee0fd0482795a063c Mon Sep 17 00:00:00 2001 From: Skylar Chang Date: Mon, 6 Jun 2016 09:29:44 -0700 Subject: [PATCH] ARM: dts: msm: put ipa3 in smmu s1-bypass on msmcobalt Enable SMMU on IPA3 and put in stage1-bypass mode to not do the memory mapping. Change-Id: Id2811c67a423c82201993b3119647a3d4caf4517 Acked-by: Ady Abraham Signed-off-by: Skylar Chang --- arch/arm/boot/dts/qcom/msmcobalt.dtsi | 25 +++++++++++++++++++++++-- 1 file changed, 23 insertions(+), 2 deletions(-) diff --git a/arch/arm/boot/dts/qcom/msmcobalt.dtsi b/arch/arm/boot/dts/qcom/msmcobalt.dtsi index e748783b0c7d..b87d9bce84ec 100644 --- a/arch/arm/boot/dts/qcom/msmcobalt.dtsi +++ b/arch/arm/boot/dts/qcom/msmcobalt.dtsi @@ -966,8 +966,12 @@ qcom,do-not-use-ch-gsi-20; qcom,ipa-wdi2; qcom,use-64-bit-dma-mask; - clock-names = "core_clk"; - clocks = <&clock_gcc clk_ipa_clk>; + clocks = <&clock_gcc clk_ipa_clk>, + <&clock_gcc clk_aggre2_noc_clk>; + clock-names = "core_clk", "smmu_clk"; + qcom,arm-smmu; + qcom,smmu-disable-htw; + qcom,smmu-s1-bypass; qcom,msm-bus,name = "ipa"; qcom,msm-bus,num-cases = <4>; qcom,msm-bus,num-paths = <3>; @@ -1074,6 +1078,23 @@ compatible = "qcom,smp2pgpio-map-ipa-1-in"; gpios = <&smp2pgpio_ipa_1_in 0 0>; }; + + ipa_smmu_ap: ipa_smmu_ap { + compatible = "qcom,ipa-smmu-ap-cb"; + iommus = <&anoc2_smmu 0x18e0>; + qcom,iova-mapping = <0x10000000 0x40000000>; + }; + + ipa_smmu_wlan: ipa_smmu_wlan { + compatible = "qcom,ipa-smmu-wlan-cb"; + iommus = <&anoc2_smmu 0x18e1>; + }; + + ipa_smmu_uc: ipa_smmu_uc { + compatible = "qcom,ipa-smmu-uc-cb"; + iommus = <&anoc2_smmu 0x18e2>; + qcom,iova-mapping = <0x40000000 0x20000000>; + }; }; qcom,ipa_fws@1e08000 {