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ARM: dts: msm: Add support for pwr/perf supply for sdm660

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OSM cpu clocks would require the supply rails on which power and perf
clusters are connected, so add the same.

Change-Id: Ie5e50dff1c3c5b06585d03abb45ff493779f029d
Signed-off-by: Taniya Das <tdas@codeaurora.org>
This commit is contained in:
Taniya Das 2016-12-26 14:19:03 +05:30 • committed by Gerrit - the friendly Code Review server
parent 2116b44bd3
commit ef366c8b57
1 changed files with 2 additions and 14 deletions
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16
arch/arm/boot/dts/qcom/sdm660.dtsi
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@ -1094,7 +1094,8 @@
reg-names = "osm", "pwrcl_pll", "perfcl_pll",
"apcs_common", "perfcl_efuse";
/* ToDo: Add power and perf supply rails */
vdd-pwrcl-supply = <&apc0_pwrcl_vreg>;
vdd-perfcl-supply = <&apc1_perfcl_vreg>;
interrupts = <GIC_SPI 35 IRQ_TYPE_EDGE_RISING>,
<GIC_SPI 36 IRQ_TYPE_EDGE_RISING>;
@ -1160,19 +1161,6 @@
qcom,wfx-fsm-en;
qcom,pc-fsm-en;
qcom,pwrcl-apcs-mem-acc-cfg =
<0x179d1360 0x179d1364 0x179d1364>;
qcom,perfcl-apcs-mem-acc-cfg =
<0x179d1368 0x179d136C 0x179d1370>;
qcom,pwrcl-apcs-mem-acc-val =
<0x00000000 0x80000000 0x80000000>,
<0x00000000 0x00000000 0x00000000>,
<0x00000000 0x00000001 0x00000001>;
qcom,perfcl-apcs-mem-acc-val =
<0x00000000 0x00000000 0x80000000>,
<0x00000000 0x00000000 0x00000000>,
<0x00000000 0x00000000 0x00000001>;
clock-names = "aux_clk", "xo_a";
clocks = <&clock_gcc HMSS_GPLL0_CLK_SRC>,
<&clock_rpmcc RPM_XO_A_CLK_SRC>;