Changes to pinctrl-single to allow handling the wake-up
interrupts that most omaps have in each pinctrl register. As I need these merged also into the omap tree, it was agreed that I set them up into a separate branch for both pinctrl tree and linux-omap tree to merge as needed. -----BEGIN PGP SIGNATURE----- Version: GnuPG v1.4.14 (GNU/Linux) iQIcBAABAgAGBQJSVysQAAoJEBvUPslcq6VzsB8P/00JYw579L/YcFUSIFX5GVVA uevnOAKuOadLp5v8Z86ImJervxfof+jBgD67OgR9sGxVKH+uHmuAiDYBlBHMLQxO HZS7Ssajx1kXIi5QWSHdJNv8TZ2CPBmEmcMDbU9oKuMNgnhhFMTBOP1qGhFBZefr qbc/Pt3FKK7lIj9j+dfz2rkhdqnk2bdu1rtBWb7MxfFR1BP/HCfr9rLj9tlfZE6q R5BVIBQm9ZnN2k9OdiWrIvI90h3fo89zmI8gBdaQEVkezkybDXgoPT9lCBSjfA0l ivTRacP4L0b/PU/pJ6aCfp/kAB9y4nzrmxoYWdJBuq7uuAEcUgr6otQTFuzAJrDV lbslje/Y88mxVEE9eXAJnnB/+zmEfU6Lr/i3DmCKyOBewLVlz61P6u0F+i7G4t9E RUzSUKiIfRg5cLEoBQYd2C7Z/XylvGeZI8DypVHEy64gbDeY9LnyyDtBz+neKzVN QnwEHOFk+cAF81sGqKzJ7w+vNGvHsAXCF+AqJYvPeax2q+eCmriWzrwLwEsZnlZd goaVpjcBG/959CQG7l5+vVAQ/je0XYIb6df8cyjIaxudOybUrNsR/Vn37Qr+yQMc K+rzgth4JTHOtzXGNi2YVOmjsVYVUU1u7t+NxtSDP2MMvcC/1a9eCPnzLvr7nza6 wT8qRzE2g8ewouVlZlhT =vqC2 -----END PGP SIGNATURE----- Merge tag 'pinctrl-single-for-linus-for-v3.13-signed' into omap-for-v3.13/quirk Changes to pinctrl-single to allow handling the wake-up interrupts that most omaps have in each pinctrl register. As I need these merged also into the omap tree, it was agreed that I set them up into a separate branch for both pinctrl tree and linux-omap tree to merge as needed.
This commit is contained in:
Tony Lindgren
commit
f1ca221888
538 changed files with 5579 additions and 3018 deletions
3
CREDITS
3
CREDITS
|
|
@ -2808,8 +2808,7 @@ S: Ottawa, Ontario
|
|||
S: Canada K2P 0X8
|
||||
|
||||
N: Mikael Pettersson
|
||||
E: mikpe@it.uu.se
|
||||
W: http://user.it.uu.se/~mikpe/linux/
|
||||
E: mikpelinux@gmail.com
|
||||
D: Miscellaneous fixes
|
||||
|
||||
N: Reed H. Petty
|
||||
|
|
|
|||
|
|
@ -6,6 +6,8 @@ capability.txt
|
|||
- Generic Block Device Capability (/sys/block/<device>/capability)
|
||||
cfq-iosched.txt
|
||||
- CFQ IO scheduler tunables
|
||||
cmdline-partition.txt
|
||||
- how to specify block device partitions on kernel command line
|
||||
data-integrity.txt
|
||||
- Block data integrity
|
||||
deadline-iosched.txt
|
||||
|
|
|
|||
|
|
@ -1,9 +1,9 @@
|
|||
Embedded device command line partition
|
||||
Embedded device command line partition parsing
|
||||
=====================================================================
|
||||
|
||||
Read block device partition table from command line.
|
||||
The partition used for fixed block device (eMMC) embedded device.
|
||||
It is no MBR, save storage space. Bootloader can be easily accessed
|
||||
Support for reading the block device partition table from the command line.
|
||||
It is typically used for fixed block (eMMC) embedded devices.
|
||||
It has no MBR, so saves storage space. Bootloader can be easily accessed
|
||||
by absolute address of data on the block device.
|
||||
Users can easily change the partition.
|
||||
|
||||
|
|
|
|||
|
|
@ -1,11 +1,11 @@
|
|||
* Samsung Exynos specific extensions to the Synopsis Designware Mobile
|
||||
* Samsung Exynos specific extensions to the Synopsys Designware Mobile
|
||||
Storage Host Controller
|
||||
|
||||
The Synopsis designware mobile storage host controller is used to interface
|
||||
The Synopsys designware mobile storage host controller is used to interface
|
||||
a SoC with storage medium such as eMMC or SD/MMC cards. This file documents
|
||||
differences between the core Synopsis dw mshc controller properties described
|
||||
by synopsis-dw-mshc.txt and the properties used by the Samsung Exynos specific
|
||||
extensions to the Synopsis Designware Mobile Storage Host Controller.
|
||||
differences between the core Synopsys dw mshc controller properties described
|
||||
by synopsys-dw-mshc.txt and the properties used by the Samsung Exynos specific
|
||||
extensions to the Synopsys Designware Mobile Storage Host Controller.
|
||||
|
||||
Required Properties:
|
||||
|
||||
|
|
|
|||
|
|
@ -1,11 +1,11 @@
|
|||
* Rockchip specific extensions to the Synopsis Designware Mobile
|
||||
* Rockchip specific extensions to the Synopsys Designware Mobile
|
||||
Storage Host Controller
|
||||
|
||||
The Synopsis designware mobile storage host controller is used to interface
|
||||
The Synopsys designware mobile storage host controller is used to interface
|
||||
a SoC with storage medium such as eMMC or SD/MMC cards. This file documents
|
||||
differences between the core Synopsis dw mshc controller properties described
|
||||
by synopsis-dw-mshc.txt and the properties used by the Rockchip specific
|
||||
extensions to the Synopsis Designware Mobile Storage Host Controller.
|
||||
differences between the core Synopsys dw mshc controller properties described
|
||||
by synopsys-dw-mshc.txt and the properties used by the Rockchip specific
|
||||
extensions to the Synopsys Designware Mobile Storage Host Controller.
|
||||
|
||||
Required Properties:
|
||||
|
||||
|
|
|
|||
|
|
@ -1,14 +1,14 @@
|
|||
* Synopsis Designware Mobile Storage Host Controller
|
||||
* Synopsys Designware Mobile Storage Host Controller
|
||||
|
||||
The Synopsis designware mobile storage host controller is used to interface
|
||||
The Synopsys designware mobile storage host controller is used to interface
|
||||
a SoC with storage medium such as eMMC or SD/MMC cards. This file documents
|
||||
differences between the core mmc properties described by mmc.txt and the
|
||||
properties used by the Synopsis Designware Mobile Storage Host Controller.
|
||||
properties used by the Synopsys Designware Mobile Storage Host Controller.
|
||||
|
||||
Required Properties:
|
||||
|
||||
* compatible: should be
|
||||
- snps,dw-mshc: for controllers compliant with synopsis dw-mshc.
|
||||
- snps,dw-mshc: for controllers compliant with synopsys dw-mshc.
|
||||
* #address-cells: should be 1.
|
||||
* #size-cells: should be 0.
|
||||
|
||||
|
|
@ -9,12 +9,15 @@ compulsory and any optional properties, common to all SD/MMC drivers, as
|
|||
described in mmc.txt, can be used. Additionally the following tmio_mmc-specific
|
||||
optional bindings can be used.
|
||||
|
||||
Required properties:
|
||||
- compatible: "renesas,sdhi-shmobile" - a generic sh-mobile SDHI unit
|
||||
"renesas,sdhi-sh7372" - SDHI IP on SH7372 SoC
|
||||
"renesas,sdhi-sh73a0" - SDHI IP on SH73A0 SoC
|
||||
"renesas,sdhi-r8a73a4" - SDHI IP on R8A73A4 SoC
|
||||
"renesas,sdhi-r8a7740" - SDHI IP on R8A7740 SoC
|
||||
"renesas,sdhi-r8a7778" - SDHI IP on R8A7778 SoC
|
||||
"renesas,sdhi-r8a7779" - SDHI IP on R8A7779 SoC
|
||||
"renesas,sdhi-r8a7790" - SDHI IP on R8A7790 SoC
|
||||
|
||||
Optional properties:
|
||||
- toshiba,mmc-wrprotect-disable: write-protect detection is unavailable
|
||||
|
||||
When used with Renesas SDHI hardware, the following compatibility strings
|
||||
configure various model-specific properties:
|
||||
|
||||
"renesas,sh7372-sdhi": (default) compatible with SH7372
|
||||
"renesas,r8a7740-sdhi": compatible with R8A7740: certain MMC/SD commands have to
|
||||
wait for the interface to become idle.
|
||||
|
|
|
|||
|
|
@ -86,6 +86,7 @@ General Properties:
|
|||
|
||||
Clock Properties:
|
||||
|
||||
- fsl,cksel Timer reference clock source.
|
||||
- fsl,tclk-period Timer reference clock period in nanoseconds.
|
||||
- fsl,tmr-prsc Prescaler, divides the output clock.
|
||||
- fsl,tmr-add Frequency compensation value.
|
||||
|
|
@ -97,7 +98,7 @@ Clock Properties:
|
|||
clock. You must choose these carefully for the clock to work right.
|
||||
Here is how to figure good values:
|
||||
|
||||
TimerOsc = system clock MHz
|
||||
TimerOsc = selected reference clock MHz
|
||||
tclk_period = desired clock period nanoseconds
|
||||
NominalFreq = 1000 / tclk_period MHz
|
||||
FreqDivRatio = TimerOsc / NominalFreq (must be greater that 1.0)
|
||||
|
|
@ -114,6 +115,20 @@ Clock Properties:
|
|||
Pulse Per Second (PPS) signal, since this will be offered to the PPS
|
||||
subsystem to synchronize the Linux clock.
|
||||
|
||||
Reference clock source is determined by the value, which is holded
|
||||
in CKSEL bits in TMR_CTRL register. "fsl,cksel" property keeps the
|
||||
value, which will be directly written in those bits, that is why,
|
||||
according to reference manual, the next clock sources can be used:
|
||||
|
||||
<0> - external high precision timer reference clock (TSEC_TMR_CLK
|
||||
input is used for this purpose);
|
||||
<1> - eTSEC system clock;
|
||||
<2> - eTSEC1 transmit clock;
|
||||
<3> - RTC clock input.
|
||||
|
||||
When this attribute is not used, eTSEC system clock will serve as
|
||||
IEEE 1588 timer reference clock.
|
||||
|
||||
Example:
|
||||
|
||||
ptp_clock@24E00 {
|
||||
|
|
@ -121,6 +136,7 @@ Example:
|
|||
reg = <0x24E00 0xB0>;
|
||||
interrupts = <12 0x8 13 0x8>;
|
||||
interrupt-parent = < &ipic >;
|
||||
fsl,cksel = <1>;
|
||||
fsl,tclk-period = <10>;
|
||||
fsl,tmr-prsc = <100>;
|
||||
fsl,tmr-add = <0x999999A4>;
|
||||
|
|
|
|||
|
|
@ -1,4 +1,4 @@
|
|||
* Synopsis Designware PCIe interface
|
||||
* Synopsys Designware PCIe interface
|
||||
|
||||
Required properties:
|
||||
- compatible: should contain "snps,dw-pcie" to identify the
|
||||
|
|
|
|||
|
|
@ -72,6 +72,13 @@ Optional properties:
|
|||
/* pin base, nr pins & gpio function */
|
||||
pinctrl-single,gpio-range = <&range 0 3 0 &range 3 9 1>;
|
||||
|
||||
- interrupt-controller : standard interrupt controller binding if using
|
||||
interrupts for wake-up events for example. In this case pinctrl-single
|
||||
is set up as a chained interrupt controller and the wake-up interrupts
|
||||
can be requested by the drivers using request_irq().
|
||||
|
||||
- #interrupt-cells : standard interrupt binding if using interrupts
|
||||
|
||||
This driver assumes that there is only one register for each pin (unless the
|
||||
pinctrl-single,bit-per-mux is set), and uses the common pinctrl bindings as
|
||||
specified in the pinctrl-bindings.txt document in this directory.
|
||||
|
|
@ -121,6 +128,8 @@ pmx_core: pinmux@4a100040 {
|
|||
reg = <0x4a100040 0x0196>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
#interrupt-cells = <1>;
|
||||
interrupt-controller;
|
||||
pinctrl-single,register-width = <16>;
|
||||
pinctrl-single,function-mask = <0xffff>;
|
||||
};
|
||||
|
|
@ -131,6 +140,8 @@ pmx_wkup: pinmux@4a31e040 {
|
|||
reg = <0x4a31e040 0x0038>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
#interrupt-cells = <1>;
|
||||
interrupt-controller;
|
||||
pinctrl-single,register-width = <16>;
|
||||
pinctrl-single,function-mask = <0xffff>;
|
||||
};
|
||||
|
|
|
|||
|
|
@ -480,6 +480,10 @@ bytes respectively. Such letter suffixes can also be entirely omitted.
|
|||
Format: <io>,<irq>,<mode>
|
||||
See header of drivers/net/hamradio/baycom_ser_hdx.c.
|
||||
|
||||
blkdevparts= Manual partition parsing of block device(s) for
|
||||
embedded devices based on command line input.
|
||||
See Documentation/block/cmdline-partition.txt
|
||||
|
||||
boot_delay= Milliseconds to delay each printk during boot.
|
||||
Values larger than 10 seconds (10000) are changed to
|
||||
no delay (0).
|
||||
|
|
@ -1357,7 +1361,7 @@ bytes respectively. Such letter suffixes can also be entirely omitted.
|
|||
pages. In the event, a node is too small to have both
|
||||
kernelcore and Movable pages, kernelcore pages will
|
||||
take priority and other nodes will have a larger number
|
||||
of kernelcore pages. The Movable zone is used for the
|
||||
of Movable pages. The Movable zone is used for the
|
||||
allocation of pages that may be reclaimed or moved
|
||||
by the page migration subsystem. This means that
|
||||
HugeTLB pages may not be allocated from this zone.
|
||||
|
|
@ -3485,6 +3489,10 @@ bytes respectively. Such letter suffixes can also be entirely omitted.
|
|||
the unplug protocol
|
||||
never -- do not unplug even if version check succeeds
|
||||
|
||||
xen_nopvspin [X86,XEN]
|
||||
Disables the ticketlock slowpath using Xen PV
|
||||
optimizations.
|
||||
|
||||
xirc2ps_cs= [NET,PCMCIA]
|
||||
Format:
|
||||
<irq>,<irq_mask>,<io>,<full_duplex>,<do_sound>,<lockup_hack>[,<irq2>[,<irq3>[,<irq4>]]]
|
||||
|
|
|
|||
|
|
@ -296,6 +296,12 @@ Cirrus Logic CS4206/4207
|
|||
imac27 IMac 27 Inch
|
||||
auto BIOS setup (default)
|
||||
|
||||
Cirrus Logic CS4208
|
||||
===================
|
||||
mba6 MacBook Air 6,1 and 6,2
|
||||
gpio0 Enable GPIO 0 amp
|
||||
auto BIOS setup (default)
|
||||
|
||||
VIA VT17xx/VT18xx/VT20xx
|
||||
========================
|
||||
auto BIOS setup (default)
|
||||
|
|
|
|||
40
MAINTAINERS
40
MAINTAINERS
|
|
@ -824,15 +824,21 @@ S: Maintained
|
|||
F: arch/arm/mach-gemini/
|
||||
|
||||
ARM/CSR SIRFPRIMA2 MACHINE SUPPORT
|
||||
M: Barry Song <baohua.song@csr.com>
|
||||
M: Barry Song <baohua@kernel.org>
|
||||
L: linux-arm-kernel@lists.infradead.org (moderated for non-subscribers)
|
||||
T: git git://git.kernel.org/pub/scm/linux/kernel/git/baohua/linux.git
|
||||
S: Maintained
|
||||
F: arch/arm/mach-prima2/
|
||||
F: drivers/clk/clk-prima2.c
|
||||
F: drivers/clocksource/timer-prima2.c
|
||||
F: drivers/clocksource/timer-marco.c
|
||||
F: drivers/dma/sirf-dma.c
|
||||
F: drivers/i2c/busses/i2c-sirf.c
|
||||
F: drivers/input/misc/sirfsoc-onkey.c
|
||||
F: drivers/irqchip/irq-sirfsoc.c
|
||||
F: drivers/mmc/host/sdhci-sirf.c
|
||||
F: drivers/pinctrl/sirf/
|
||||
F: drivers/rtc/rtc-sirfsoc.c
|
||||
F: drivers/spi/spi-sirf.c
|
||||
|
||||
ARM/EBSA110 MACHINE SUPPORT
|
||||
|
|
@ -1812,7 +1818,8 @@ S: Supported
|
|||
F: drivers/net/ethernet/broadcom/bnx2x/
|
||||
|
||||
BROADCOM BCM281XX/BCM11XXX ARM ARCHITECTURE
|
||||
M: Christian Daudt <csd@broadcom.com>
|
||||
M: Christian Daudt <bcm@fixthebug.org>
|
||||
L: bcm-kernel-feedback-list@broadcom.com
|
||||
T: git git://git.github.com/broadcom/bcm11351
|
||||
S: Maintained
|
||||
F: arch/arm/mach-bcm/
|
||||
|
|
@ -2639,6 +2646,18 @@ F: include/linux/device-mapper.h
|
|||
F: include/linux/dm-*.h
|
||||
F: include/uapi/linux/dm-*.h
|
||||
|
||||
DIGI NEO AND CLASSIC PCI PRODUCTS
|
||||
M: Lidza Louina <lidza.louina@gmail.com>
|
||||
L: driverdev-devel@linuxdriverproject.org
|
||||
S: Maintained
|
||||
F: drivers/staging/dgnc/
|
||||
|
||||
DIGI EPCA PCI PRODUCTS
|
||||
M: Lidza Louina <lidza.louina@gmail.com>
|
||||
L: driverdev-devel@linuxdriverproject.org
|
||||
S: Maintained
|
||||
F: drivers/staging/dgap/
|
||||
|
||||
DIOLAN U2C-12 I2C DRIVER
|
||||
M: Guenter Roeck <linux@roeck-us.net>
|
||||
L: linux-i2c@vger.kernel.org
|
||||
|
|
@ -4457,6 +4476,13 @@ L: linux-serial@vger.kernel.org
|
|||
S: Maintained
|
||||
F: drivers/tty/serial/ioc3_serial.c
|
||||
|
||||
IOMMU DRIVERS
|
||||
M: Joerg Roedel <joro@8bytes.org>
|
||||
L: iommu@lists.linux-foundation.org
|
||||
T: git git://git.kernel.org/pub/scm/linux/kernel/git/joro/iommu.git
|
||||
S: Maintained
|
||||
F: drivers/iommu/
|
||||
|
||||
IP MASQUERADING
|
||||
M: Juanjo Ciarlante <jjciarla@raiz.uncu.edu.ar>
|
||||
S: Maintained
|
||||
|
|
@ -6595,7 +6621,7 @@ S: Obsolete
|
|||
F: drivers/net/wireless/prism54/
|
||||
|
||||
PROMISE SATA TX2/TX4 CONTROLLER LIBATA DRIVER
|
||||
M: Mikael Pettersson <mikpe@it.uu.se>
|
||||
M: Mikael Pettersson <mikpelinux@gmail.com>
|
||||
L: linux-ide@vger.kernel.org
|
||||
S: Maintained
|
||||
F: drivers/ata/sata_promise.*
|
||||
|
|
@ -7258,9 +7284,9 @@ F: include/linux/sched.h
|
|||
F: include/uapi/linux/sched.h
|
||||
|
||||
SCORE ARCHITECTURE
|
||||
M: Chen Liqin <liqin.chen@sunplusct.com>
|
||||
M: Chen Liqin <liqin.linux@gmail.com>
|
||||
M: Lennox Wu <lennox.wu@gmail.com>
|
||||
W: http://www.sunplusct.com
|
||||
W: http://www.sunplus.com
|
||||
S: Supported
|
||||
F: arch/score/
|
||||
|
||||
|
|
@ -8724,9 +8750,8 @@ F: Documentation/hid/hiddev.txt
|
|||
F: drivers/hid/usbhid/
|
||||
|
||||
USB/IP DRIVERS
|
||||
M: Matt Mooney <mfm@muteddisk.com>
|
||||
L: linux-usb@vger.kernel.org
|
||||
S: Maintained
|
||||
S: Orphan
|
||||
F: drivers/staging/usbip/
|
||||
|
||||
USB ISP116X DRIVER
|
||||
|
|
@ -9366,6 +9391,7 @@ F: arch/arm64/include/asm/xen/
|
|||
|
||||
XEN NETWORK BACKEND DRIVER
|
||||
M: Ian Campbell <ian.campbell@citrix.com>
|
||||
M: Wei Liu <wei.liu2@citrix.com>
|
||||
L: xen-devel@lists.xenproject.org (moderated for non-subscribers)
|
||||
L: netdev@vger.kernel.org
|
||||
S: Supported
|
||||
|
|
|
|||
2
Makefile
2
Makefile
|
|
@ -1,7 +1,7 @@
|
|||
VERSION = 3
|
||||
PATCHLEVEL = 12
|
||||
SUBLEVEL = 0
|
||||
EXTRAVERSION = -rc2
|
||||
EXTRAVERSION = -rc4
|
||||
NAME = One Giant Leap for Frogkind
|
||||
|
||||
# *DOCUMENTATION*
|
||||
|
|
|
|||
|
|
@ -286,9 +286,6 @@ config HAVE_PERF_USER_STACK_DUMP
|
|||
config HAVE_ARCH_JUMP_LABEL
|
||||
bool
|
||||
|
||||
config HAVE_ARCH_MUTEX_CPU_RELAX
|
||||
bool
|
||||
|
||||
config HAVE_RCU_TABLE_FREE
|
||||
bool
|
||||
|
||||
|
|
|
|||
|
|
@ -45,7 +45,14 @@ static inline int arch_spin_trylock(arch_spinlock_t *lock)
|
|||
|
||||
static inline void arch_spin_unlock(arch_spinlock_t *lock)
|
||||
{
|
||||
lock->slock = __ARCH_SPIN_LOCK_UNLOCKED__;
|
||||
unsigned int tmp = __ARCH_SPIN_LOCK_UNLOCKED__;
|
||||
|
||||
__asm__ __volatile__(
|
||||
" ex %0, [%1] \n"
|
||||
: "+r" (tmp)
|
||||
: "r"(&(lock->slock))
|
||||
: "memory");
|
||||
|
||||
smp_mb();
|
||||
}
|
||||
|
||||
|
|
|
|||
|
|
@ -53,7 +53,7 @@
|
|||
*
|
||||
*/
|
||||
#define __user_ok(addr, sz) (((sz) <= TASK_SIZE) && \
|
||||
(((addr)+(sz)) <= get_fs()))
|
||||
((addr) <= (get_fs() - (sz))))
|
||||
#define __access_ok(addr, sz) (unlikely(__kernel_ok) || \
|
||||
likely(__user_ok((addr), (sz))))
|
||||
|
||||
|
|
|
|||
|
|
@ -101,7 +101,6 @@ SYSCALL_DEFINE0(rt_sigreturn)
|
|||
{
|
||||
struct rt_sigframe __user *sf;
|
||||
unsigned int magic;
|
||||
int err;
|
||||
struct pt_regs *regs = current_pt_regs();
|
||||
|
||||
/* Always make any pending restarted system calls return -EINTR */
|
||||
|
|
@ -119,15 +118,16 @@ SYSCALL_DEFINE0(rt_sigreturn)
|
|||
if (!access_ok(VERIFY_READ, sf, sizeof(*sf)))
|
||||
goto badframe;
|
||||
|
||||
err = restore_usr_regs(regs, sf);
|
||||
err |= __get_user(magic, &sf->sigret_magic);
|
||||
if (err)
|
||||
if (__get_user(magic, &sf->sigret_magic))
|
||||
goto badframe;
|
||||
|
||||
if (unlikely(is_do_ss_needed(magic)))
|
||||
if (restore_altstack(&sf->uc.uc_stack))
|
||||
goto badframe;
|
||||
|
||||
if (restore_usr_regs(regs, sf))
|
||||
goto badframe;
|
||||
|
||||
/* Don't restart from sigreturn */
|
||||
syscall_wont_restart(regs);
|
||||
|
||||
|
|
@ -190,6 +190,15 @@ setup_rt_frame(int signo, struct k_sigaction *ka, siginfo_t *info,
|
|||
if (!sf)
|
||||
return 1;
|
||||
|
||||
/*
|
||||
* w/o SA_SIGINFO, struct ucontext is partially populated (only
|
||||
* uc_mcontext/uc_sigmask) for kernel's normal user state preservation
|
||||
* during signal handler execution. This works for SA_SIGINFO as well
|
||||
* although the semantics are now overloaded (the same reg state can be
|
||||
* inspected by userland: but are they allowed to fiddle with it ?
|
||||
*/
|
||||
err |= stash_usr_regs(sf, regs, set);
|
||||
|
||||
/*
|
||||
* SA_SIGINFO requires 3 args to signal handler:
|
||||
* #1: sig-no (common to any handler)
|
||||
|
|
@ -213,14 +222,6 @@ setup_rt_frame(int signo, struct k_sigaction *ka, siginfo_t *info,
|
|||
magic = MAGIC_SIGALTSTK;
|
||||
}
|
||||
|
||||
/*
|
||||
* w/o SA_SIGINFO, struct ucontext is partially populated (only
|
||||
* uc_mcontext/uc_sigmask) for kernel's normal user state preservation
|
||||
* during signal handler execution. This works for SA_SIGINFO as well
|
||||
* although the semantics are now overloaded (the same reg state can be
|
||||
* inspected by userland: but are they allowed to fiddle with it ?
|
||||
*/
|
||||
err |= stash_usr_regs(sf, regs, set);
|
||||
err |= __put_user(magic, &sf->sigret_magic);
|
||||
if (err)
|
||||
return err;
|
||||
|
|
|
|||
|
|
@ -227,12 +227,9 @@ void __attribute__((weak)) arc_local_timer_setup(unsigned int cpu)
|
|||
{
|
||||
struct clock_event_device *clk = &per_cpu(arc_clockevent_device, cpu);
|
||||
|
||||
clockevents_calc_mult_shift(clk, arc_get_core_freq(), 5);
|
||||
|
||||
clk->max_delta_ns = clockevent_delta2ns(ARC_TIMER_MAX, clk);
|
||||
clk->cpumask = cpumask_of(cpu);
|
||||
|
||||
clockevents_register_device(clk);
|
||||
clockevents_config_and_register(clk, arc_get_core_freq(),
|
||||
0, ARC_TIMER_MAX);
|
||||
|
||||
/*
|
||||
* setup the per-cpu timer IRQ handler - for all cpus
|
||||
|
|
|
|||
|
|
@ -245,6 +245,12 @@ int misaligned_fixup(unsigned long address, struct pt_regs *regs,
|
|||
regs->status32 &= ~STATUS_DE_MASK;
|
||||
} else {
|
||||
regs->ret += state.instr_len;
|
||||
|
||||
/* handle zero-overhead-loop */
|
||||
if ((regs->ret == regs->lp_end) && (regs->lp_count)) {
|
||||
regs->ret = regs->lp_start;
|
||||
regs->lp_count--;
|
||||
}
|
||||
}
|
||||
|
||||
return 0;
|
||||
|
|
|
|||
|
|
@ -2217,8 +2217,7 @@ config NEON
|
|||
|
||||
config KERNEL_MODE_NEON
|
||||
bool "Support for NEON in kernel mode"
|
||||
default n
|
||||
depends on NEON
|
||||
depends on NEON && AEABI
|
||||
help
|
||||
Say Y to include support for NEON in kernel mode.
|
||||
|
||||
|
|
|
|||
|
|
@ -41,6 +41,8 @@ dtb-$(CONFIG_ARCH_AT91) += sama5d33ek.dtb
|
|||
dtb-$(CONFIG_ARCH_AT91) += sama5d34ek.dtb
|
||||
dtb-$(CONFIG_ARCH_AT91) += sama5d35ek.dtb
|
||||
|
||||
dtb-$(CONFIG_ARCH_ATLAS6) += atlas6-evb.dtb
|
||||
|
||||
dtb-$(CONFIG_ARCH_BCM2835) += bcm2835-rpi-b.dtb
|
||||
dtb-$(CONFIG_ARCH_BCM) += bcm11351-brt.dtb \
|
||||
bcm28155-ap.dtb
|
||||
|
|
|
|||
|
|
@ -27,6 +27,25 @@
|
|||
};
|
||||
|
||||
soc {
|
||||
ranges = <MBUS_ID(0xf0, 0x01) 0 0xd0000000 0x100000
|
||||
MBUS_ID(0x01, 0xe0) 0 0xfff00000 0x100000>;
|
||||
|
||||
pcie-controller {
|
||||
status = "okay";
|
||||
|
||||
/* Connected to Marvell SATA controller */
|
||||
pcie@1,0 {
|
||||
/* Port 0, Lane 0 */
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
/* Connected to FL1009 USB 3.0 controller */
|
||||
pcie@2,0 {
|
||||
/* Port 1, Lane 0 */
|
||||
status = "okay";
|
||||
};
|
||||
};
|
||||
|
||||
internal-regs {
|
||||
serial@12000 {
|
||||
clock-frequency = <200000000>;
|
||||
|
|
@ -57,6 +76,11 @@
|
|||
marvell,pins = "mpp56";
|
||||
marvell,function = "gpio";
|
||||
};
|
||||
|
||||
poweroff: poweroff {
|
||||
marvell,pins = "mpp8";
|
||||
marvell,function = "gpio";
|
||||
};
|
||||
};
|
||||
|
||||
mdio {
|
||||
|
|
@ -89,22 +113,6 @@
|
|||
pwm_polarity = <0>;
|
||||
};
|
||||
};
|
||||
|
||||
pcie-controller {
|
||||
status = "okay";
|
||||
|
||||
/* Connected to Marvell SATA controller */
|
||||
pcie@1,0 {
|
||||
/* Port 0, Lane 0 */
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
/* Connected to FL1009 USB 3.0 controller */
|
||||
pcie@2,0 {
|
||||
/* Port 1, Lane 0 */
|
||||
status = "okay";
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
|
|
@ -160,7 +168,7 @@
|
|||
button@1 {
|
||||
label = "Power Button";
|
||||
linux,code = <116>; /* KEY_POWER */
|
||||
gpios = <&gpio1 30 1>;
|
||||
gpios = <&gpio1 30 0>;
|
||||
};
|
||||
|
||||
button@2 {
|
||||
|
|
@ -176,4 +184,11 @@
|
|||
};
|
||||
};
|
||||
|
||||
gpio_poweroff {
|
||||
compatible = "gpio-poweroff";
|
||||
pinctrl-0 = <&poweroff>;
|
||||
pinctrl-names = "default";
|
||||
gpios = <&gpio0 8 1>;
|
||||
};
|
||||
|
||||
};
|
||||
|
|
|
|||
|
|
@ -70,6 +70,8 @@
|
|||
|
||||
timer@20300 {
|
||||
compatible = "marvell,armada-xp-timer";
|
||||
clocks = <&coreclk 2>, <&refclk>;
|
||||
clock-names = "nbclk", "fixed";
|
||||
};
|
||||
|
||||
coreclk: mvebu-sar@18230 {
|
||||
|
|
@ -169,4 +171,13 @@
|
|||
};
|
||||
};
|
||||
};
|
||||
|
||||
clocks {
|
||||
/* 25 MHz reference crystal */
|
||||
refclk: oscillator {
|
||||
compatible = "fixed-clock";
|
||||
#clock-cells = <0>;
|
||||
clock-frequency = <25000000>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
|
|
|||
|
|
@ -190,12 +190,12 @@
|
|||
AT91_PIOA 8 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PA8 periph A */
|
||||
};
|
||||
|
||||
pinctrl_uart2_rts: uart2_rts-0 {
|
||||
pinctrl_usart2_rts: usart2_rts-0 {
|
||||
atmel,pins =
|
||||
<AT91_PIOB 0 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PB0 periph B */
|
||||
};
|
||||
|
||||
pinctrl_uart2_cts: uart2_cts-0 {
|
||||
pinctrl_usart2_cts: usart2_cts-0 {
|
||||
atmel,pins =
|
||||
<AT91_PIOB 1 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PB1 periph B */
|
||||
};
|
||||
|
|
@ -556,6 +556,7 @@
|
|||
interrupts = <12 IRQ_TYPE_LEVEL_HIGH 0>;
|
||||
dmas = <&dma0 1 AT91_DMA_CFG_PER_ID(0)>;
|
||||
dma-names = "rxtx";
|
||||
pinctrl-names = "default";
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
status = "disabled";
|
||||
|
|
@ -567,6 +568,7 @@
|
|||
interrupts = <26 IRQ_TYPE_LEVEL_HIGH 0>;
|
||||
dmas = <&dma1 1 AT91_DMA_CFG_PER_ID(0)>;
|
||||
dma-names = "rxtx";
|
||||
pinctrl-names = "default";
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
status = "disabled";
|
||||
|
|
|
|||
|
|
@ -181,6 +181,8 @@
|
|||
interrupts = <17>;
|
||||
fifosize = <128>;
|
||||
clocks = <&clks 13>;
|
||||
sirf,uart-dma-rx-channel = <21>;
|
||||
sirf,uart-dma-tx-channel = <2>;
|
||||
};
|
||||
|
||||
uart1: uart@b0060000 {
|
||||
|
|
@ -199,6 +201,8 @@
|
|||
interrupts = <19>;
|
||||
fifosize = <128>;
|
||||
clocks = <&clks 15>;
|
||||
sirf,uart-dma-rx-channel = <6>;
|
||||
sirf,uart-dma-tx-channel = <7>;
|
||||
};
|
||||
|
||||
usp0: usp@b0080000 {
|
||||
|
|
@ -206,7 +210,10 @@
|
|||
compatible = "sirf,prima2-usp";
|
||||
reg = <0xb0080000 0x10000>;
|
||||
interrupts = <20>;
|
||||
fifosize = <128>;
|
||||
clocks = <&clks 28>;
|
||||
sirf,usp-dma-rx-channel = <17>;
|
||||
sirf,usp-dma-tx-channel = <18>;
|
||||
};
|
||||
|
||||
usp1: usp@b0090000 {
|
||||
|
|
@ -214,7 +221,10 @@
|
|||
compatible = "sirf,prima2-usp";
|
||||
reg = <0xb0090000 0x10000>;
|
||||
interrupts = <21>;
|
||||
fifosize = <128>;
|
||||
clocks = <&clks 29>;
|
||||
sirf,usp-dma-rx-channel = <14>;
|
||||
sirf,usp-dma-tx-channel = <15>;
|
||||
};
|
||||
|
||||
dmac0: dma-controller@b00b0000 {
|
||||
|
|
@ -237,6 +247,8 @@
|
|||
compatible = "sirf,prima2-vip";
|
||||
reg = <0xb00C0000 0x10000>;
|
||||
clocks = <&clks 31>;
|
||||
interrupts = <14>;
|
||||
sirf,vip-dma-rx-channel = <16>;
|
||||
};
|
||||
|
||||
spi0: spi@b00d0000 {
|
||||
|
|
|
|||
|
|
@ -13,6 +13,7 @@
|
|||
cpu@0 {
|
||||
device_type = "cpu";
|
||||
compatible = "marvell,feroceon";
|
||||
reg = <0>;
|
||||
clocks = <&core_clk 1>, <&core_clk 3>, <&gate_clk 11>;
|
||||
clock-names = "cpu_clk", "ddrclk", "powersave";
|
||||
};
|
||||
|
|
@ -167,7 +168,7 @@
|
|||
xor@60900 {
|
||||
compatible = "marvell,orion-xor";
|
||||
reg = <0x60900 0x100
|
||||
0xd0B00 0x100>;
|
||||
0x60B00 0x100>;
|
||||
status = "okay";
|
||||
clocks = <&gate_clk 16>;
|
||||
|
||||
|
|
|
|||
|
|
@ -171,7 +171,8 @@
|
|||
compatible = "simple-bus";
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
ranges = <0xb0000000 0xb0000000 0x180000>;
|
||||
ranges = <0xb0000000 0xb0000000 0x180000>,
|
||||
<0x56000000 0x56000000 0x1b00000>;
|
||||
|
||||
timer@b0020000 {
|
||||
compatible = "sirf,prima2-tick";
|
||||
|
|
@ -196,25 +197,32 @@
|
|||
uart0: uart@b0050000 {
|
||||
cell-index = <0>;
|
||||
compatible = "sirf,prima2-uart";
|
||||
reg = <0xb0050000 0x10000>;
|
||||
reg = <0xb0050000 0x1000>;
|
||||
interrupts = <17>;
|
||||
fifosize = <128>;
|
||||
clocks = <&clks 13>;
|
||||
sirf,uart-dma-rx-channel = <21>;
|
||||
sirf,uart-dma-tx-channel = <2>;
|
||||
};
|
||||
|
||||
uart1: uart@b0060000 {
|
||||
cell-index = <1>;
|
||||
compatible = "sirf,prima2-uart";
|
||||
reg = <0xb0060000 0x10000>;
|
||||
reg = <0xb0060000 0x1000>;
|
||||
interrupts = <18>;
|
||||
fifosize = <32>;
|
||||
clocks = <&clks 14>;
|
||||
};
|
||||
|
||||
uart2: uart@b0070000 {
|
||||
cell-index = <2>;
|
||||
compatible = "sirf,prima2-uart";
|
||||
reg = <0xb0070000 0x10000>;
|
||||
reg = <0xb0070000 0x1000>;
|
||||
interrupts = <19>;
|
||||
fifosize = <128>;
|
||||
clocks = <&clks 15>;
|
||||
sirf,uart-dma-rx-channel = <6>;
|
||||
sirf,uart-dma-tx-channel = <7>;
|
||||
};
|
||||
|
||||
usp0: usp@b0080000 {
|
||||
|
|
@ -222,7 +230,10 @@
|
|||
compatible = "sirf,prima2-usp";
|
||||
reg = <0xb0080000 0x10000>;
|
||||
interrupts = <20>;
|
||||
fifosize = <128>;
|
||||
clocks = <&clks 28>;
|
||||
sirf,usp-dma-rx-channel = <17>;
|
||||
sirf,usp-dma-tx-channel = <18>;
|
||||
};
|
||||
|
||||
usp1: usp@b0090000 {
|
||||
|
|
@ -230,7 +241,10 @@
|
|||
compatible = "sirf,prima2-usp";
|
||||
reg = <0xb0090000 0x10000>;
|
||||
interrupts = <21>;
|
||||
fifosize = <128>;
|
||||
clocks = <&clks 29>;
|
||||
sirf,usp-dma-rx-channel = <14>;
|
||||
sirf,usp-dma-tx-channel = <15>;
|
||||
};
|
||||
|
||||
usp2: usp@b00a0000 {
|
||||
|
|
@ -238,7 +252,10 @@
|
|||
compatible = "sirf,prima2-usp";
|
||||
reg = <0xb00a0000 0x10000>;
|
||||
interrupts = <22>;
|
||||
fifosize = <128>;
|
||||
clocks = <&clks 30>;
|
||||
sirf,usp-dma-rx-channel = <10>;
|
||||
sirf,usp-dma-tx-channel = <11>;
|
||||
};
|
||||
|
||||
dmac0: dma-controller@b00b0000 {
|
||||
|
|
@ -261,6 +278,8 @@
|
|||
compatible = "sirf,prima2-vip";
|
||||
reg = <0xb00C0000 0x10000>;
|
||||
clocks = <&clks 31>;
|
||||
interrupts = <14>;
|
||||
sirf,vip-dma-rx-channel = <16>;
|
||||
};
|
||||
|
||||
spi0: spi@b00d0000 {
|
||||
|
|
|
|||
|
|
@ -193,7 +193,7 @@
|
|||
};
|
||||
|
||||
sdhi0: sdhi@ee100000 {
|
||||
compatible = "renesas,r8a73a4-sdhi";
|
||||
compatible = "renesas,sdhi-r8a73a4";
|
||||
reg = <0 0xee100000 0 0x100>;
|
||||
interrupt-parent = <&gic>;
|
||||
interrupts = <0 165 4>;
|
||||
|
|
@ -202,7 +202,7 @@
|
|||
};
|
||||
|
||||
sdhi1: sdhi@ee120000 {
|
||||
compatible = "renesas,r8a73a4-sdhi";
|
||||
compatible = "renesas,sdhi-r8a73a4";
|
||||
reg = <0 0xee120000 0 0x100>;
|
||||
interrupt-parent = <&gic>;
|
||||
interrupts = <0 166 4>;
|
||||
|
|
@ -211,7 +211,7 @@
|
|||
};
|
||||
|
||||
sdhi2: sdhi@ee140000 {
|
||||
compatible = "renesas,r8a73a4-sdhi";
|
||||
compatible = "renesas,sdhi-r8a73a4";
|
||||
reg = <0 0xee140000 0 0x100>;
|
||||
interrupt-parent = <&gic>;
|
||||
interrupts = <0 167 4>;
|
||||
|
|
|
|||
|
|
@ -96,6 +96,5 @@
|
|||
pfc: pfc@fffc0000 {
|
||||
compatible = "renesas,pfc-r8a7778";
|
||||
reg = <0xfffc000 0x118>;
|
||||
#gpio-range-cells = <3>;
|
||||
};
|
||||
};
|
||||
|
|
|
|||
|
|
@ -188,7 +188,6 @@
|
|||
pfc: pfc@fffc0000 {
|
||||
compatible = "renesas,pfc-r8a7779";
|
||||
reg = <0xfffc0000 0x23c>;
|
||||
#gpio-range-cells = <3>;
|
||||
};
|
||||
|
||||
thermal@ffc48000 {
|
||||
|
|
|
|||
|
|
@ -148,11 +148,10 @@
|
|||
pfc: pfc@e6060000 {
|
||||
compatible = "renesas,pfc-r8a7790";
|
||||
reg = <0 0xe6060000 0 0x250>;
|
||||
#gpio-range-cells = <3>;
|
||||
};
|
||||
|
||||
sdhi0: sdhi@ee100000 {
|
||||
compatible = "renesas,r8a7790-sdhi";
|
||||
compatible = "renesas,sdhi-r8a7790";
|
||||
reg = <0 0xee100000 0 0x100>;
|
||||
interrupt-parent = <&gic>;
|
||||
interrupts = <0 165 4>;
|
||||
|
|
@ -161,7 +160,7 @@
|
|||
};
|
||||
|
||||
sdhi1: sdhi@ee120000 {
|
||||
compatible = "renesas,r8a7790-sdhi";
|
||||
compatible = "renesas,sdhi-r8a7790";
|
||||
reg = <0 0xee120000 0 0x100>;
|
||||
interrupt-parent = <&gic>;
|
||||
interrupts = <0 166 4>;
|
||||
|
|
@ -170,7 +169,7 @@
|
|||
};
|
||||
|
||||
sdhi2: sdhi@ee140000 {
|
||||
compatible = "renesas,r8a7790-sdhi";
|
||||
compatible = "renesas,sdhi-r8a7790";
|
||||
reg = <0 0xee140000 0 0x100>;
|
||||
interrupt-parent = <&gic>;
|
||||
interrupts = <0 167 4>;
|
||||
|
|
@ -179,7 +178,7 @@
|
|||
};
|
||||
|
||||
sdhi3: sdhi@ee160000 {
|
||||
compatible = "renesas,r8a7790-sdhi";
|
||||
compatible = "renesas,sdhi-r8a7790";
|
||||
reg = <0 0xee160000 0 0x100>;
|
||||
interrupt-parent = <&gic>;
|
||||
interrupts = <0 168 4>;
|
||||
|
|
|
|||
|
|
@ -196,7 +196,7 @@
|
|||
};
|
||||
|
||||
sdhi0: sdhi@ee100000 {
|
||||
compatible = "renesas,r8a7740-sdhi";
|
||||
compatible = "renesas,sdhi-r8a7740";
|
||||
reg = <0xee100000 0x100>;
|
||||
interrupt-parent = <&gic>;
|
||||
interrupts = <0 83 4
|
||||
|
|
@ -208,7 +208,7 @@
|
|||
|
||||
/* SDHI1 and SDHI2 have no CD pins, no need for CD IRQ */
|
||||
sdhi1: sdhi@ee120000 {
|
||||
compatible = "renesas,r8a7740-sdhi";
|
||||
compatible = "renesas,sdhi-r8a7740";
|
||||
reg = <0xee120000 0x100>;
|
||||
interrupt-parent = <&gic>;
|
||||
interrupts = <0 88 4
|
||||
|
|
@ -219,7 +219,7 @@
|
|||
};
|
||||
|
||||
sdhi2: sdhi@ee140000 {
|
||||
compatible = "renesas,r8a7740-sdhi";
|
||||
compatible = "renesas,sdhi-r8a7740";
|
||||
reg = <0xee140000 0x100>;
|
||||
interrupt-parent = <&gic>;
|
||||
interrupts = <0 104 4
|
||||
|
|
|
|||
|
|
@ -269,6 +269,11 @@ static const struct edmacc_param dummy_paramset = {
|
|||
.ccnt = 1,
|
||||
};
|
||||
|
||||
static const struct of_device_id edma_of_ids[] = {
|
||||
{ .compatible = "ti,edma3", },
|
||||
{}
|
||||
};
|
||||
|
||||
/*****************************************************************************/
|
||||
|
||||
static void map_dmach_queue(unsigned ctlr, unsigned ch_no,
|
||||
|
|
@ -560,8 +565,32 @@ static int reserve_contiguous_slots(int ctlr, unsigned int id,
|
|||
static int prepare_unused_channel_list(struct device *dev, void *data)
|
||||
{
|
||||
struct platform_device *pdev = to_platform_device(dev);
|
||||
int i, ctlr;
|
||||
int i, count, ctlr;
|
||||
struct of_phandle_args dma_spec;
|
||||
|
||||
if (dev->of_node) {
|
||||
count = of_property_count_strings(dev->of_node, "dma-names");
|
||||
if (count < 0)
|
||||
return 0;
|
||||
for (i = 0; i < count; i++) {
|
||||
if (of_parse_phandle_with_args(dev->of_node, "dmas",
|
||||
"#dma-cells", i,
|
||||
&dma_spec))
|
||||
continue;
|
||||
|
||||
if (!of_match_node(edma_of_ids, dma_spec.np)) {
|
||||
of_node_put(dma_spec.np);
|
||||
continue;
|
||||
}
|
||||
|
||||
clear_bit(EDMA_CHAN_SLOT(dma_spec.args[0]),
|
||||
edma_cc[0]->edma_unused);
|
||||
of_node_put(dma_spec.np);
|
||||
}
|
||||
return 0;
|
||||
}
|
||||
|
||||
/* For non-OF case */
|
||||
for (i = 0; i < pdev->num_resources; i++) {
|
||||
if ((pdev->resource[i].flags & IORESOURCE_DMA) &&
|
||||
(int)pdev->resource[i].start >= 0) {
|
||||
|
|
@ -1762,11 +1791,6 @@ static int edma_probe(struct platform_device *pdev)
|
|||
return 0;
|
||||
}
|
||||
|
||||
static const struct of_device_id edma_of_ids[] = {
|
||||
{ .compatible = "ti,edma3", },
|
||||
{}
|
||||
};
|
||||
|
||||
static struct platform_driver edma_driver = {
|
||||
.driver = {
|
||||
.name = "edma",
|
||||
|
|
|
|||
|
|
@ -135,6 +135,7 @@ CONFIG_MMC=y
|
|||
CONFIG_MMC_ARMMMCI=y
|
||||
CONFIG_MMC_SDHCI=y
|
||||
CONFIG_MMC_SDHCI_PLTFM=y
|
||||
CONFIG_MMC_SDHCI_ESDHC_IMX=y
|
||||
CONFIG_MMC_SDHCI_TEGRA=y
|
||||
CONFIG_MMC_SDHCI_SPEAR=y
|
||||
CONFIG_MMC_OMAP=y
|
||||
|
|
|
|||
|
|
@ -148,7 +148,7 @@ AES_Te:
|
|||
@ const AES_KEY *key) {
|
||||
.align 5
|
||||
ENTRY(AES_encrypt)
|
||||
sub r3,pc,#8 @ AES_encrypt
|
||||
adr r3,AES_encrypt
|
||||
stmdb sp!,{r1,r4-r12,lr}
|
||||
mov r12,r0 @ inp
|
||||
mov r11,r2
|
||||
|
|
@ -381,7 +381,7 @@ _armv4_AES_encrypt:
|
|||
.align 5
|
||||
ENTRY(private_AES_set_encrypt_key)
|
||||
_armv4_AES_set_encrypt_key:
|
||||
sub r3,pc,#8 @ AES_set_encrypt_key
|
||||
adr r3,_armv4_AES_set_encrypt_key
|
||||
teq r0,#0
|
||||
moveq r0,#-1
|
||||
beq .Labrt
|
||||
|
|
@ -843,7 +843,7 @@ AES_Td:
|
|||
@ const AES_KEY *key) {
|
||||
.align 5
|
||||
ENTRY(AES_decrypt)
|
||||
sub r3,pc,#8 @ AES_decrypt
|
||||
adr r3,AES_decrypt
|
||||
stmdb sp!,{r1,r4-r12,lr}
|
||||
mov r12,r0 @ inp
|
||||
mov r11,r2
|
||||
|
|
|
|||
|
|
@ -19,6 +19,13 @@
|
|||
#include <asm/unified.h>
|
||||
#include <asm/compiler.h>
|
||||
|
||||
#if __LINUX_ARM_ARCH__ < 6
|
||||
#include <asm-generic/uaccess-unaligned.h>
|
||||
#else
|
||||
#define __get_user_unaligned __get_user
|
||||
#define __put_user_unaligned __put_user
|
||||
#endif
|
||||
|
||||
#define VERIFY_READ 0
|
||||
#define VERIFY_WRITE 1
|
||||
|
||||
|
|
|
|||
|
|
@ -442,10 +442,10 @@ local_restart:
|
|||
ldrcc pc, [tbl, scno, lsl #2] @ call sys_* routine
|
||||
|
||||
add r1, sp, #S_OFF
|
||||
cmp scno, #(__ARM_NR_BASE - __NR_SYSCALL_BASE)
|
||||
2: cmp scno, #(__ARM_NR_BASE - __NR_SYSCALL_BASE)
|
||||
eor r0, scno, #__NR_SYSCALL_BASE @ put OS number back
|
||||
bcs arm_syscall
|
||||
2: mov why, #0 @ no longer a real syscall
|
||||
mov why, #0 @ no longer a real syscall
|
||||
b sys_ni_syscall @ not private func
|
||||
|
||||
#if defined(CONFIG_OABI_COMPAT) || !defined(CONFIG_AEABI)
|
||||
|
|
|
|||
|
|
@ -329,10 +329,10 @@
|
|||
#ifdef CONFIG_CONTEXT_TRACKING
|
||||
.if \save
|
||||
stmdb sp!, {r0-r3, ip, lr}
|
||||
bl user_exit
|
||||
bl context_tracking_user_exit
|
||||
ldmia sp!, {r0-r3, ip, lr}
|
||||
.else
|
||||
bl user_exit
|
||||
bl context_tracking_user_exit
|
||||
.endif
|
||||
#endif
|
||||
.endm
|
||||
|
|
@ -341,10 +341,10 @@
|
|||
#ifdef CONFIG_CONTEXT_TRACKING
|
||||
.if \save
|
||||
stmdb sp!, {r0-r3, ip, lr}
|
||||
bl user_enter
|
||||
bl context_tracking_user_enter
|
||||
ldmia sp!, {r0-r3, ip, lr}
|
||||
.else
|
||||
bl user_enter
|
||||
bl context_tracking_user_enter
|
||||
.endif
|
||||
#endif
|
||||
.endm
|
||||
|
|
|
|||
|
|
@ -58,14 +58,14 @@ static const struct kvm_irq_level a15_vtimer_irq = {
|
|||
*/
|
||||
int kvm_reset_vcpu(struct kvm_vcpu *vcpu)
|
||||
{
|
||||
struct kvm_regs *cpu_reset;
|
||||
struct kvm_regs *reset_regs;
|
||||
const struct kvm_irq_level *cpu_vtimer_irq;
|
||||
|
||||
switch (vcpu->arch.target) {
|
||||
case KVM_ARM_TARGET_CORTEX_A15:
|
||||
if (vcpu->vcpu_id > a15_max_cpu_idx)
|
||||
return -EINVAL;
|
||||
cpu_reset = &a15_regs_reset;
|
||||
reset_regs = &a15_regs_reset;
|
||||
vcpu->arch.midr = read_cpuid_id();
|
||||
cpu_vtimer_irq = &a15_vtimer_irq;
|
||||
break;
|
||||
|
|
@ -74,7 +74,7 @@ int kvm_reset_vcpu(struct kvm_vcpu *vcpu)
|
|||
}
|
||||
|
||||
/* Reset core registers */
|
||||
memcpy(&vcpu->arch.regs, cpu_reset, sizeof(vcpu->arch.regs));
|
||||
memcpy(&vcpu->arch.regs, reset_regs, sizeof(vcpu->arch.regs));
|
||||
|
||||
/* Reset CP15 registers */
|
||||
kvm_reset_coprocs(vcpu);
|
||||
|
|
|
|||
|
|
@ -93,7 +93,7 @@ static irqreturn_t at91rm9200_timer_interrupt(int irq, void *dev_id)
|
|||
|
||||
static struct irqaction at91rm9200_timer_irq = {
|
||||
.name = "at91_tick",
|
||||
.flags = IRQF_SHARED | IRQF_DISABLED | IRQF_TIMER | IRQF_IRQPOLL,
|
||||
.flags = IRQF_SHARED | IRQF_TIMER | IRQF_IRQPOLL,
|
||||
.handler = at91rm9200_timer_interrupt,
|
||||
.irq = NR_IRQS_LEGACY + AT91_ID_SYS,
|
||||
};
|
||||
|
|
|
|||
|
|
@ -171,7 +171,7 @@ static irqreturn_t at91sam926x_pit_interrupt(int irq, void *dev_id)
|
|||
|
||||
static struct irqaction at91sam926x_pit_irq = {
|
||||
.name = "at91_tick",
|
||||
.flags = IRQF_SHARED | IRQF_DISABLED | IRQF_TIMER | IRQF_IRQPOLL,
|
||||
.flags = IRQF_SHARED | IRQF_TIMER | IRQF_IRQPOLL,
|
||||
.handler = at91sam926x_pit_interrupt,
|
||||
.irq = NR_IRQS_LEGACY + AT91_ID_SYS,
|
||||
};
|
||||
|
|
|
|||
|
|
@ -16,11 +16,17 @@
|
|||
#include "at91_rstc.h"
|
||||
.arm
|
||||
|
||||
/*
|
||||
* at91_ramc_base is an array void*
|
||||
* init at NULL if only one DDR controler is present in or DT
|
||||
*/
|
||||
.globl at91sam9g45_restart
|
||||
|
||||
at91sam9g45_restart:
|
||||
ldr r5, =at91_ramc_base @ preload constants
|
||||
ldr r0, [r5]
|
||||
ldr r5, [r5, #4] @ ddr1
|
||||
cmp r5, #0
|
||||
ldr r4, =at91_rstc_base
|
||||
ldr r1, [r4]
|
||||
|
||||
|
|
@ -30,6 +36,8 @@ at91sam9g45_restart:
|
|||
|
||||
.balign 32 @ align to cache line
|
||||
|
||||
strne r2, [r5, #AT91_DDRSDRC_RTR] @ disable DDR1 access
|
||||
strne r3, [r5, #AT91_DDRSDRC_LPR] @ power down DDR1
|
||||
str r2, [r0, #AT91_DDRSDRC_RTR] @ disable DDR0 access
|
||||
str r3, [r0, #AT91_DDRSDRC_LPR] @ power down DDR0
|
||||
str r4, [r1, #AT91_RSTC_CR] @ reset processor
|
||||
|
|
|
|||
|
|
@ -57,7 +57,7 @@ static irqreturn_t at91x40_timer_interrupt(int irq, void *dev_id)
|
|||
|
||||
static struct irqaction at91x40_timer_irq = {
|
||||
.name = "at91_tick",
|
||||
.flags = IRQF_DISABLED | IRQF_TIMER,
|
||||
.flags = IRQF_TIMER,
|
||||
.handler = at91x40_timer_interrupt
|
||||
};
|
||||
|
||||
|
|
|
|||
|
|
@ -176,7 +176,7 @@ static struct at24_platform_data eeprom_info = {
|
|||
.context = (void *)0x7f00,
|
||||
};
|
||||
|
||||
static struct snd_platform_data dm365_evm_snd_data = {
|
||||
static struct snd_platform_data dm365_evm_snd_data __maybe_unused = {
|
||||
.asp_chan_q = EVENTQ_3,
|
||||
};
|
||||
|
||||
|
|
|
|||
|
|
@ -15,8 +15,6 @@
|
|||
|
||||
#include <mach/hardware.h>
|
||||
|
||||
#include <linux/platform_device.h>
|
||||
|
||||
#define DAVINCI_UART0_BASE (IO_PHYS + 0x20000)
|
||||
#define DAVINCI_UART1_BASE (IO_PHYS + 0x20400)
|
||||
#define DAVINCI_UART2_BASE (IO_PHYS + 0x20800)
|
||||
|
|
@ -39,6 +37,8 @@
|
|||
#define UART_DM646X_SCR_TX_WATERMARK 0x08
|
||||
|
||||
#ifndef __ASSEMBLY__
|
||||
#include <linux/platform_device.h>
|
||||
|
||||
extern int davinci_serial_init(struct platform_device *);
|
||||
#endif
|
||||
|
||||
|
|
|
|||
|
|
@ -1,2 +1,9 @@
|
|||
/* Simple oneliner include to the PCIv3 early init */
|
||||
#ifdef CONFIG_PCI
|
||||
extern int pci_v3_early_init(void);
|
||||
#else
|
||||
static inline int pci_v3_early_init(void)
|
||||
{
|
||||
return 0;
|
||||
}
|
||||
#endif
|
||||
|
|
|
|||
|
|
@ -140,6 +140,7 @@ int __init coherency_init(void)
|
|||
coherency_base = of_iomap(np, 0);
|
||||
coherency_cpu_base = of_iomap(np, 1);
|
||||
set_cpu_coherent(cpu_logical_map(smp_processor_id()), 0);
|
||||
of_node_put(np);
|
||||
}
|
||||
|
||||
return 0;
|
||||
|
|
@ -147,9 +148,14 @@ int __init coherency_init(void)
|
|||
|
||||
static int __init coherency_late_init(void)
|
||||
{
|
||||
if (of_find_matching_node(NULL, of_coherency_table))
|
||||
struct device_node *np;
|
||||
|
||||
np = of_find_matching_node(NULL, of_coherency_table);
|
||||
if (np) {
|
||||
bus_register_notifier(&platform_bus_type,
|
||||
&mvebu_hwcc_platform_nb);
|
||||
of_node_put(np);
|
||||
}
|
||||
return 0;
|
||||
}
|
||||
|
||||
|
|
|
|||
|
|
@ -67,6 +67,7 @@ int __init armada_370_xp_pmsu_init(void)
|
|||
pr_info("Initializing Power Management Service Unit\n");
|
||||
pmsu_mp_base = of_iomap(np, 0);
|
||||
pmsu_reset_base = of_iomap(np, 1);
|
||||
of_node_put(np);
|
||||
}
|
||||
|
||||
return 0;
|
||||
|
|
|
|||
|
|
@ -98,6 +98,7 @@ static int __init mvebu_system_controller_init(void)
|
|||
BUG_ON(!match);
|
||||
system_controller_base = of_iomap(np, 0);
|
||||
mvebu_sc = (struct mvebu_system_controller *)match->data;
|
||||
of_node_put(np);
|
||||
}
|
||||
|
||||
return 0;
|
||||
|
|
|
|||
|
|
@ -1108,9 +1108,9 @@ static const struct pinctrl_map eva_pinctrl_map[] = {
|
|||
PIN_MAP_MUX_GROUP_DEFAULT("asoc-simple-card.1", "pfc-r8a7740",
|
||||
"fsib_mclk_in", "fsib"),
|
||||
/* GETHER */
|
||||
PIN_MAP_MUX_GROUP_DEFAULT("sh-eth", "pfc-r8a7740",
|
||||
PIN_MAP_MUX_GROUP_DEFAULT("r8a7740-gether", "pfc-r8a7740",
|
||||
"gether_mii", "gether"),
|
||||
PIN_MAP_MUX_GROUP_DEFAULT("sh-eth", "pfc-r8a7740",
|
||||
PIN_MAP_MUX_GROUP_DEFAULT("r8a7740-gether", "pfc-r8a7740",
|
||||
"gether_int", "gether"),
|
||||
/* HDMI */
|
||||
PIN_MAP_MUX_GROUP_DEFAULT("sh-mobile-hdmi", "pfc-r8a7740",
|
||||
|
|
|
|||
|
|
@ -29,6 +29,7 @@
|
|||
#include <linux/pinctrl/machine.h>
|
||||
#include <linux/platform_data/gpio-rcar.h>
|
||||
#include <linux/platform_device.h>
|
||||
#include <linux/phy.h>
|
||||
#include <linux/regulator/fixed.h>
|
||||
#include <linux/regulator/machine.h>
|
||||
#include <linux/sh_eth.h>
|
||||
|
|
@ -155,6 +156,30 @@ static void __init lager_add_standard_devices(void)
|
|||
ðer_pdata, sizeof(ether_pdata));
|
||||
}
|
||||
|
||||
/*
|
||||
* Ether LEDs on the Lager board are named LINK and ACTIVE which corresponds
|
||||
* to non-default 01 setting of the Micrel KSZ8041 PHY control register 1 bits
|
||||
* 14-15. We have to set them back to 01 from the default 00 value each time
|
||||
* the PHY is reset. It's also important because the PHY's LED0 signal is
|
||||
* connected to SoC's ETH_LINK signal and in the PHY's default mode it will
|
||||
* bounce on and off after each packet, which we apparently want to avoid.
|
||||
*/
|
||||
static int lager_ksz8041_fixup(struct phy_device *phydev)
|
||||
{
|
||||
u16 phyctrl1 = phy_read(phydev, 0x1e);
|
||||
|
||||
phyctrl1 &= ~0xc000;
|
||||
phyctrl1 |= 0x4000;
|
||||
return phy_write(phydev, 0x1e, phyctrl1);
|
||||
}
|
||||
|
||||
static void __init lager_init(void)
|
||||
{
|
||||
lager_add_standard_devices();
|
||||
|
||||
phy_register_fixup_for_id("r8a7790-ether-ff:01", lager_ksz8041_fixup);
|
||||
}
|
||||
|
||||
static const char *lager_boards_compat_dt[] __initdata = {
|
||||
"renesas,lager",
|
||||
NULL,
|
||||
|
|
@ -163,6 +188,6 @@ static const char *lager_boards_compat_dt[] __initdata = {
|
|||
DT_MACHINE_START(LAGER_DT, "lager")
|
||||
.init_early = r8a7790_init_delay,
|
||||
.init_time = r8a7790_timer_init,
|
||||
.init_machine = lager_add_standard_devices,
|
||||
.init_machine = lager_init,
|
||||
.dt_compat = lager_boards_compat_dt,
|
||||
MACHINE_END
|
||||
|
|
|
|||
|
|
@ -131,6 +131,16 @@ static void tc2_pm_down(u64 residency)
|
|||
} else
|
||||
BUG();
|
||||
|
||||
/*
|
||||
* If the CPU is committed to power down, make sure
|
||||
* the power controller will be in charge of waking it
|
||||
* up upon IRQ, ie IRQ lines are cut from GIC CPU IF
|
||||
* to the CPU by disabling the GIC CPU IF to prevent wfi
|
||||
* from completing execution behind power controller back
|
||||
*/
|
||||
if (!skip_wfi)
|
||||
gic_cpu_if_down();
|
||||
|
||||
if (last_man && __mcpm_outbound_enter_critical(cpu, cluster)) {
|
||||
arch_spin_unlock(&tc2_pm_lock);
|
||||
|
||||
|
|
@ -231,7 +241,6 @@ static void tc2_pm_suspend(u64 residency)
|
|||
cpu = MPIDR_AFFINITY_LEVEL(mpidr, 0);
|
||||
cluster = MPIDR_AFFINITY_LEVEL(mpidr, 1);
|
||||
ve_spc_set_resume_addr(cluster, cpu, virt_to_phys(mcpm_entry_point));
|
||||
gic_cpu_if_down();
|
||||
tc2_pm_down(residency);
|
||||
}
|
||||
|
||||
|
|
|
|||
|
|
@ -6,13 +6,6 @@ config FRAME_POINTER
|
|||
bool
|
||||
default y
|
||||
|
||||
config DEBUG_STACK_USAGE
|
||||
bool "Enable stack utilization instrumentation"
|
||||
depends on DEBUG_KERNEL
|
||||
help
|
||||
Enables the display of the minimum amount of free stack which each
|
||||
task has ever had available in the sysrq-T output.
|
||||
|
||||
config EARLY_PRINTK
|
||||
bool "Early printk support"
|
||||
default y
|
||||
|
|
|
|||
|
|
@ -42,7 +42,7 @@ CONFIG_IP_PNP_BOOTP=y
|
|||
# CONFIG_WIRELESS is not set
|
||||
CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
|
||||
CONFIG_DEVTMPFS=y
|
||||
# CONFIG_BLK_DEV is not set
|
||||
CONFIG_BLK_DEV=y
|
||||
CONFIG_SCSI=y
|
||||
# CONFIG_SCSI_PROC_FS is not set
|
||||
CONFIG_BLK_DEV_SD=y
|
||||
|
|
@ -72,6 +72,7 @@ CONFIG_LOGO=y
|
|||
# CONFIG_IOMMU_SUPPORT is not set
|
||||
CONFIG_EXT2_FS=y
|
||||
CONFIG_EXT3_FS=y
|
||||
CONFIG_EXT4_FS=y
|
||||
# CONFIG_EXT3_DEFAULTS_TO_ORDERED is not set
|
||||
# CONFIG_EXT3_FS_XATTR is not set
|
||||
CONFIG_FUSE_FS=y
|
||||
|
|
@ -90,3 +91,5 @@ CONFIG_DEBUG_KERNEL=y
|
|||
CONFIG_DEBUG_INFO=y
|
||||
# CONFIG_FTRACE is not set
|
||||
CONFIG_ATOMIC64_SELFTEST=y
|
||||
CONFIG_VIRTIO_MMIO=y
|
||||
CONFIG_VIRTIO_BLK=y
|
||||
|
|
|
|||
|
|
@ -166,9 +166,10 @@ do { \
|
|||
|
||||
#define get_user(x, ptr) \
|
||||
({ \
|
||||
__typeof__(*(ptr)) __user *__p = (ptr); \
|
||||
might_fault(); \
|
||||
access_ok(VERIFY_READ, (ptr), sizeof(*(ptr))) ? \
|
||||
__get_user((x), (ptr)) : \
|
||||
access_ok(VERIFY_READ, __p, sizeof(*__p)) ? \
|
||||
__get_user((x), __p) : \
|
||||
((x) = 0, -EFAULT); \
|
||||
})
|
||||
|
||||
|
|
@ -227,9 +228,10 @@ do { \
|
|||
|
||||
#define put_user(x, ptr) \
|
||||
({ \
|
||||
__typeof__(*(ptr)) __user *__p = (ptr); \
|
||||
might_fault(); \
|
||||
access_ok(VERIFY_WRITE, (ptr), sizeof(*(ptr))) ? \
|
||||
__put_user((x), (ptr)) : \
|
||||
access_ok(VERIFY_WRITE, __p, sizeof(*__p)) ? \
|
||||
__put_user((x), __p) : \
|
||||
-EFAULT; \
|
||||
})
|
||||
|
||||
|
|
|
|||
|
|
@ -80,8 +80,10 @@ void fpsimd_thread_switch(struct task_struct *next)
|
|||
|
||||
void fpsimd_flush_thread(void)
|
||||
{
|
||||
preempt_disable();
|
||||
memset(¤t->thread.fpsimd_state, 0, sizeof(struct fpsimd_state));
|
||||
fpsimd_load_state(¤t->thread.fpsimd_state);
|
||||
preempt_enable();
|
||||
}
|
||||
|
||||
#ifdef CONFIG_KERNEL_MODE_NEON
|
||||
|
|
|
|||
|
|
@ -35,7 +35,7 @@
|
|||
*/
|
||||
ENTRY(__cpu_flush_user_tlb_range)
|
||||
vma_vm_mm x3, x2 // get vma->vm_mm
|
||||
mmid x3, x3 // get vm_mm->context.id
|
||||
mmid w3, x3 // get vm_mm->context.id
|
||||
dsb sy
|
||||
lsr x0, x0, #12 // align address
|
||||
lsr x1, x1, #12
|
||||
|
|
|
|||
|
|
@ -1,5 +1,19 @@
|
|||
|
||||
generic-y += clkdev.h
|
||||
generic-y += cputime.h
|
||||
generic-y += delay.h
|
||||
generic-y += device.h
|
||||
generic-y += div64.h
|
||||
generic-y += emergency-restart.h
|
||||
generic-y += exec.h
|
||||
generic-y += trace_clock.h
|
||||
generic-y += futex.h
|
||||
generic-y += irq_regs.h
|
||||
generic-y += param.h
|
||||
generic-y += local.h
|
||||
generic-y += local64.h
|
||||
generic-y += percpu.h
|
||||
generic-y += scatterlist.h
|
||||
generic-y += sections.h
|
||||
generic-y += topology.h
|
||||
generic-y += trace_clock.h
|
||||
generic-y += xor.h
|
||||
|
|
|
|||
|
|
@ -1,6 +0,0 @@
|
|||
#ifndef __ASM_AVR32_CPUTIME_H
|
||||
#define __ASM_AVR32_CPUTIME_H
|
||||
|
||||
#include <asm-generic/cputime.h>
|
||||
|
||||
#endif /* __ASM_AVR32_CPUTIME_H */
|
||||
|
|
@ -1 +0,0 @@
|
|||
#include <asm-generic/delay.h>
|
||||
|
|
@ -1,7 +0,0 @@
|
|||
/*
|
||||
* Arch specific extensions to struct device
|
||||
*
|
||||
* This file is released under the GPLv2
|
||||
*/
|
||||
#include <asm-generic/device.h>
|
||||
|
||||
|
|
@ -1,6 +0,0 @@
|
|||
#ifndef __ASM_AVR32_DIV64_H
|
||||
#define __ASM_AVR32_DIV64_H
|
||||
|
||||
#include <asm-generic/div64.h>
|
||||
|
||||
#endif /* __ASM_AVR32_DIV64_H */
|
||||
|
|
@ -1,6 +0,0 @@
|
|||
#ifndef __ASM_AVR32_EMERGENCY_RESTART_H
|
||||
#define __ASM_AVR32_EMERGENCY_RESTART_H
|
||||
|
||||
#include <asm-generic/emergency-restart.h>
|
||||
|
||||
#endif /* __ASM_AVR32_EMERGENCY_RESTART_H */
|
||||
|
|
@ -1,6 +0,0 @@
|
|||
#ifndef __ASM_AVR32_FUTEX_H
|
||||
#define __ASM_AVR32_FUTEX_H
|
||||
|
||||
#include <asm-generic/futex.h>
|
||||
|
||||
#endif /* __ASM_AVR32_FUTEX_H */
|
||||
|
|
@ -1 +0,0 @@
|
|||
#include <asm-generic/irq_regs.h>
|
||||
|
|
@ -1,6 +0,0 @@
|
|||
#ifndef __ASM_AVR32_LOCAL_H
|
||||
#define __ASM_AVR32_LOCAL_H
|
||||
|
||||
#include <asm-generic/local.h>
|
||||
|
||||
#endif /* __ASM_AVR32_LOCAL_H */
|
||||
|
|
@ -1 +0,0 @@
|
|||
#include <asm-generic/local64.h>
|
||||
|
|
@ -1,6 +0,0 @@
|
|||
#ifndef __ASM_AVR32_PERCPU_H
|
||||
#define __ASM_AVR32_PERCPU_H
|
||||
|
||||
#include <asm-generic/percpu.h>
|
||||
|
||||
#endif /* __ASM_AVR32_PERCPU_H */
|
||||
|
|
@ -1,6 +0,0 @@
|
|||
#ifndef __ASM_AVR32_SCATTERLIST_H
|
||||
#define __ASM_AVR32_SCATTERLIST_H
|
||||
|
||||
#include <asm-generic/scatterlist.h>
|
||||
|
||||
#endif /* __ASM_AVR32_SCATTERLIST_H */
|
||||
|
|
@ -1,6 +0,0 @@
|
|||
#ifndef __ASM_AVR32_SECTIONS_H
|
||||
#define __ASM_AVR32_SECTIONS_H
|
||||
|
||||
#include <asm-generic/sections.h>
|
||||
|
||||
#endif /* __ASM_AVR32_SECTIONS_H */
|
||||
|
|
@ -1,6 +0,0 @@
|
|||
#ifndef __ASM_AVR32_TOPOLOGY_H
|
||||
#define __ASM_AVR32_TOPOLOGY_H
|
||||
|
||||
#include <asm-generic/topology.h>
|
||||
|
||||
#endif /* __ASM_AVR32_TOPOLOGY_H */
|
||||
|
|
@ -1,6 +0,0 @@
|
|||
#ifndef _ASM_XOR_H
|
||||
#define _ASM_XOR_H
|
||||
|
||||
#include <asm-generic/xor.h>
|
||||
|
||||
#endif
|
||||
|
|
@ -289,7 +289,7 @@ int copy_thread(unsigned long clone_flags, unsigned long usp,
|
|||
memset(childregs, 0, sizeof(struct pt_regs));
|
||||
p->thread.cpu_context.r0 = arg;
|
||||
p->thread.cpu_context.r1 = usp; /* fn */
|
||||
p->thread.cpu_context.r2 = syscall_return;
|
||||
p->thread.cpu_context.r2 = (unsigned long)syscall_return;
|
||||
p->thread.cpu_context.pc = (unsigned long)ret_from_kernel_thread;
|
||||
childregs->sr = MODE_SUPERVISOR;
|
||||
} else {
|
||||
|
|
|
|||
|
|
@ -98,7 +98,14 @@ static void comparator_mode(enum clock_event_mode mode,
|
|||
case CLOCK_EVT_MODE_SHUTDOWN:
|
||||
sysreg_write(COMPARE, 0);
|
||||
pr_debug("%s: stop\n", evdev->name);
|
||||
if (evdev->mode == CLOCK_EVT_MODE_ONESHOT ||
|
||||
evdev->mode == CLOCK_EVT_MODE_RESUME) {
|
||||
/*
|
||||
* Only disable idle poll if we have forced that
|
||||
* in a previous call.
|
||||
*/
|
||||
cpu_idle_poll_ctrl(false);
|
||||
}
|
||||
break;
|
||||
default:
|
||||
BUG();
|
||||
|
|
|
|||
|
|
@ -276,7 +276,7 @@ static struct platform_device mtx1_pci_host = {
|
|||
.resource = alchemy_pci_host_res,
|
||||
};
|
||||
|
||||
static struct __initdata platform_device * mtx1_devs[] = {
|
||||
static struct platform_device *mtx1_devs[] __initdata = {
|
||||
&mtx1_pci_host,
|
||||
&mtx1_gpio_leds,
|
||||
&mtx1_wdt,
|
||||
|
|
|
|||
|
|
@ -187,7 +187,7 @@
|
|||
|
||||
/*
|
||||
* MIPS32, MIPS64, VR5500, IDT32332, IDT32334 and maybe a few other
|
||||
* pre-MIPS32/MIPS53 processors have CLO, CLZ. The IDT RC64574 is 64-bit and
|
||||
* pre-MIPS32/MIPS64 processors have CLO, CLZ. The IDT RC64574 is 64-bit and
|
||||
* has CLO and CLZ but not DCLO nor DCLZ. For 64-bit kernels
|
||||
* cpu_has_clo_clz also indicates the availability of DCLO and DCLZ.
|
||||
*/
|
||||
|
|
|
|||
|
|
@ -609,6 +609,7 @@ static void r4k_dma_cache_wback_inv(unsigned long addr, unsigned long size)
|
|||
r4k_blast_scache();
|
||||
else
|
||||
blast_scache_range(addr, addr + size);
|
||||
preempt_enable();
|
||||
__sync();
|
||||
return;
|
||||
}
|
||||
|
|
@ -650,6 +651,7 @@ static void r4k_dma_cache_inv(unsigned long addr, unsigned long size)
|
|||
*/
|
||||
blast_inv_scache_range(addr, addr + size);
|
||||
}
|
||||
preempt_enable();
|
||||
__sync();
|
||||
return;
|
||||
}
|
||||
|
|
|
|||
|
|
@ -308,26 +308,22 @@ static void mips_dma_sync_sg_for_cpu(struct device *dev,
|
|||
{
|
||||
int i;
|
||||
|
||||
/* Make sure that gcc doesn't leave the empty loop body. */
|
||||
for (i = 0; i < nelems; i++, sg++) {
|
||||
if (cpu_needs_post_dma_flush(dev))
|
||||
for (i = 0; i < nelems; i++, sg++)
|
||||
__dma_sync(sg_page(sg), sg->offset, sg->length,
|
||||
direction);
|
||||
}
|
||||
}
|
||||
|
||||
static void mips_dma_sync_sg_for_device(struct device *dev,
|
||||
struct scatterlist *sg, int nelems, enum dma_data_direction direction)
|
||||
{
|
||||
int i;
|
||||
|
||||
/* Make sure that gcc doesn't leave the empty loop body. */
|
||||
for (i = 0; i < nelems; i++, sg++) {
|
||||
if (!plat_device_is_coherent(dev))
|
||||
for (i = 0; i < nelems; i++, sg++)
|
||||
__dma_sync(sg_page(sg), sg->offset, sg->length,
|
||||
direction);
|
||||
}
|
||||
}
|
||||
|
||||
int mips_dma_mapping_error(struct device *dev, dma_addr_t dma_addr)
|
||||
{
|
||||
|
|
|
|||
|
|
@ -14,53 +14,9 @@
|
|||
* the Free Software Foundation; either version 2 of the License, or
|
||||
* (at your option) any later version.
|
||||
*/
|
||||
|
||||
#include <linux/of.h> /* linux/of.h gets to determine #include ordering */
|
||||
|
||||
#ifndef _ASM_OPENRISC_PROM_H
|
||||
#define _ASM_OPENRISC_PROM_H
|
||||
#ifdef __KERNEL__
|
||||
#ifndef __ASSEMBLY__
|
||||
|
||||
#include <linux/types.h>
|
||||
#include <asm/irq.h>
|
||||
#include <linux/irqdomain.h>
|
||||
#include <linux/atomic.h>
|
||||
#include <linux/of_irq.h>
|
||||
#include <linux/of_fdt.h>
|
||||
#include <linux/of_address.h>
|
||||
#include <linux/proc_fs.h>
|
||||
#include <linux/platform_device.h>
|
||||
#define HAVE_ARCH_DEVTREE_FIXUPS
|
||||
|
||||
/* Other Prototypes */
|
||||
extern int early_uartlite_console(void);
|
||||
|
||||
/* Parse the ibm,dma-window property of an OF node into the busno, phys and
|
||||
* size parameters.
|
||||
*/
|
||||
void of_parse_dma_window(struct device_node *dn, const void *dma_window_prop,
|
||||
unsigned long *busno, unsigned long *phys, unsigned long *size);
|
||||
|
||||
extern void kdump_move_device_tree(void);
|
||||
|
||||
/* Get the MAC address */
|
||||
extern const void *of_get_mac_address(struct device_node *np);
|
||||
|
||||
/**
|
||||
* of_irq_map_pci - Resolve the interrupt for a PCI device
|
||||
* @pdev: the device whose interrupt is to be resolved
|
||||
* @out_irq: structure of_irq filled by this function
|
||||
*
|
||||
* This function resolves the PCI interrupt for a given PCI device. If a
|
||||
* device-node exists for a given pci_dev, it will use normal OF tree
|
||||
* walking. If not, it will implement standard swizzling and walk up the
|
||||
* PCI tree until an device-node is found, at which point it will finish
|
||||
* resolving using the OF tree walking.
|
||||
*/
|
||||
struct pci_dev;
|
||||
extern int of_irq_map_pci(struct pci_dev *pdev, struct of_irq *out_irq);
|
||||
|
||||
#endif /* __ASSEMBLY__ */
|
||||
#endif /* __KERNEL__ */
|
||||
#endif /* _ASM_OPENRISC_PROM_H */
|
||||
|
|
|
|||
|
|
@ -182,6 +182,9 @@ void do_page_fault(struct pt_regs *regs, unsigned long code,
|
|||
|
||||
if (user_mode(regs))
|
||||
flags |= FAULT_FLAG_USER;
|
||||
|
||||
acc_type = parisc_acctyp(code, regs->iir);
|
||||
|
||||
if (acc_type & VM_WRITE)
|
||||
flags |= FAULT_FLAG_WRITE;
|
||||
retry:
|
||||
|
|
@ -196,8 +199,6 @@ retry:
|
|||
|
||||
good_area:
|
||||
|
||||
acc_type = parisc_acctyp(code,regs->iir);
|
||||
|
||||
if ((vma->vm_flags & acc_type) != acc_type)
|
||||
goto bad_area;
|
||||
|
||||
|
|
|
|||
|
|
@ -74,7 +74,7 @@ src-wlib-$(CONFIG_8xx) += mpc8xx.c planetcore.c
|
|||
src-wlib-$(CONFIG_PPC_82xx) += pq2.c fsl-soc.c planetcore.c
|
||||
src-wlib-$(CONFIG_EMBEDDED6xx) += mv64x60.c mv64x60_i2c.c ugecon.c
|
||||
|
||||
src-plat-y := of.c
|
||||
src-plat-y := of.c epapr.c
|
||||
src-plat-$(CONFIG_40x) += fixed-head.S ep405.c cuboot-hotfoot.c \
|
||||
treeboot-walnut.c cuboot-acadia.c \
|
||||
cuboot-kilauea.c simpleboot.c \
|
||||
|
|
@ -97,7 +97,7 @@ src-plat-$(CONFIG_EMBEDDED6xx) += cuboot-pq2.c cuboot-mpc7448hpc2.c \
|
|||
prpmc2800.c
|
||||
src-plat-$(CONFIG_AMIGAONE) += cuboot-amigaone.c
|
||||
src-plat-$(CONFIG_PPC_PS3) += ps3-head.S ps3-hvcall.S ps3.c
|
||||
src-plat-$(CONFIG_EPAPR_BOOT) += epapr.c
|
||||
src-plat-$(CONFIG_EPAPR_BOOT) += epapr.c epapr-wrapper.c
|
||||
|
||||
src-wlib := $(sort $(src-wlib-y))
|
||||
src-plat := $(sort $(src-plat-y))
|
||||
|
|
|
|||
9
arch/powerpc/boot/epapr-wrapper.c
Normal file
9
arch/powerpc/boot/epapr-wrapper.c
Normal file
|
|
@ -0,0 +1,9 @@
|
|||
extern void epapr_platform_init(unsigned long r3, unsigned long r4,
|
||||
unsigned long r5, unsigned long r6,
|
||||
unsigned long r7);
|
||||
|
||||
void platform_init(unsigned long r3, unsigned long r4, unsigned long r5,
|
||||
unsigned long r6, unsigned long r7)
|
||||
{
|
||||
epapr_platform_init(r3, r4, r5, r6, r7);
|
||||
}
|
||||
|
|
@ -48,7 +48,7 @@ static void platform_fixups(void)
|
|||
fdt_addr, fdt_totalsize((void *)fdt_addr), ima_size);
|
||||
}
|
||||
|
||||
void platform_init(unsigned long r3, unsigned long r4, unsigned long r5,
|
||||
void epapr_platform_init(unsigned long r3, unsigned long r4, unsigned long r5,
|
||||
unsigned long r6, unsigned long r7)
|
||||
{
|
||||
epapr_magic = r6;
|
||||
|
|
|
|||
|
|
@ -26,6 +26,9 @@
|
|||
|
||||
static unsigned long claim_base;
|
||||
|
||||
void epapr_platform_init(unsigned long r3, unsigned long r4, unsigned long r5,
|
||||
unsigned long r6, unsigned long r7);
|
||||
|
||||
static void *of_try_claim(unsigned long size)
|
||||
{
|
||||
unsigned long addr = 0;
|
||||
|
|
@ -61,7 +64,7 @@ static void of_image_hdr(const void *hdr)
|
|||
}
|
||||
}
|
||||
|
||||
void platform_init(unsigned long a1, unsigned long a2, void *promptr)
|
||||
static void of_platform_init(unsigned long a1, unsigned long a2, void *promptr)
|
||||
{
|
||||
platform_ops.image_hdr = of_image_hdr;
|
||||
platform_ops.malloc = of_try_claim;
|
||||
|
|
@ -81,3 +84,14 @@ void platform_init(unsigned long a1, unsigned long a2, void *promptr)
|
|||
loader_info.initrd_size = a2;
|
||||
}
|
||||
}
|
||||
|
||||
void platform_init(unsigned long r3, unsigned long r4, unsigned long r5,
|
||||
unsigned long r6, unsigned long r7)
|
||||
{
|
||||
/* Detect OF vs. ePAPR boot */
|
||||
if (r5)
|
||||
of_platform_init(r3, r4, (void *)r5);
|
||||
else
|
||||
epapr_platform_init(r3, r4, r5, r6, r7);
|
||||
}
|
||||
|
||||
|
|
|
|||
|
|
@ -148,18 +148,18 @@ make_space=y
|
|||
|
||||
case "$platform" in
|
||||
pseries)
|
||||
platformo=$object/of.o
|
||||
platformo="$object/of.o $object/epapr.o"
|
||||
link_address='0x4000000'
|
||||
;;
|
||||
maple)
|
||||
platformo=$object/of.o
|
||||
platformo="$object/of.o $object/epapr.o"
|
||||
link_address='0x400000'
|
||||
;;
|
||||
pmac|chrp)
|
||||
platformo=$object/of.o
|
||||
platformo="$object/of.o $object/epapr.o"
|
||||
;;
|
||||
coff)
|
||||
platformo="$object/crt0.o $object/of.o"
|
||||
platformo="$object/crt0.o $object/of.o $object/epapr.o"
|
||||
lds=$object/zImage.coff.lds
|
||||
link_address='0x500000'
|
||||
pie=
|
||||
|
|
@ -253,6 +253,7 @@ treeboot-iss4xx-mpic)
|
|||
platformo="$object/treeboot-iss4xx.o"
|
||||
;;
|
||||
epapr)
|
||||
platformo="$object/epapr.o $object/epapr-wrapper.o"
|
||||
link_address='0x20000000'
|
||||
pie=-pie
|
||||
;;
|
||||
|
|
|
|||
|
|
@ -69,9 +69,9 @@ extern struct thread_info *softirq_ctx[NR_CPUS];
|
|||
|
||||
extern void irq_ctx_init(void);
|
||||
extern void call_do_softirq(struct thread_info *tp);
|
||||
extern int call_handle_irq(int irq, void *p1,
|
||||
struct thread_info *tp, void *func);
|
||||
extern void call_do_irq(struct pt_regs *regs, struct thread_info *tp);
|
||||
extern void do_IRQ(struct pt_regs *regs);
|
||||
extern void __do_irq(struct pt_regs *regs);
|
||||
|
||||
int irq_choose_cpu(const struct cpumask *mask);
|
||||
|
||||
|
|
|
|||
|
|
@ -149,8 +149,6 @@ typedef struct {
|
|||
|
||||
struct thread_struct {
|
||||
unsigned long ksp; /* Kernel stack pointer */
|
||||
unsigned long ksp_limit; /* if ksp <= ksp_limit stack overflow */
|
||||
|
||||
#ifdef CONFIG_PPC64
|
||||
unsigned long ksp_vsid;
|
||||
#endif
|
||||
|
|
@ -162,6 +160,7 @@ struct thread_struct {
|
|||
#endif
|
||||
#ifdef CONFIG_PPC32
|
||||
void *pgdir; /* root of page-table tree */
|
||||
unsigned long ksp_limit; /* if ksp <= ksp_limit stack overflow */
|
||||
#endif
|
||||
#ifdef CONFIG_PPC_ADV_DEBUG_REGS
|
||||
/*
|
||||
|
|
@ -321,7 +320,6 @@ struct thread_struct {
|
|||
#else
|
||||
#define INIT_THREAD { \
|
||||
.ksp = INIT_SP, \
|
||||
.ksp_limit = INIT_SP_LIMIT, \
|
||||
.regs = (struct pt_regs *)INIT_SP - 1, /* XXX bogus, I think */ \
|
||||
.fs = KERNEL_DS, \
|
||||
.fpr = {{0}}, \
|
||||
|
|
|
|||
|
|
@ -80,10 +80,11 @@ int main(void)
|
|||
DEFINE(TASKTHREADPPR, offsetof(struct task_struct, thread.ppr));
|
||||
#else
|
||||
DEFINE(THREAD_INFO, offsetof(struct task_struct, stack));
|
||||
DEFINE(THREAD_INFO_GAP, _ALIGN_UP(sizeof(struct thread_info), 16));
|
||||
DEFINE(KSP_LIMIT, offsetof(struct thread_struct, ksp_limit));
|
||||
#endif /* CONFIG_PPC64 */
|
||||
|
||||
DEFINE(KSP, offsetof(struct thread_struct, ksp));
|
||||
DEFINE(KSP_LIMIT, offsetof(struct thread_struct, ksp_limit));
|
||||
DEFINE(PT_REGS, offsetof(struct thread_struct, regs));
|
||||
#ifdef CONFIG_BOOKE
|
||||
DEFINE(THREAD_NORMSAVES, offsetof(struct thread_struct, normsave[0]));
|
||||
|
|
|
|||
|
|
@ -661,7 +661,7 @@ struct iommu_table *iommu_init_table(struct iommu_table *tbl, int nid)
|
|||
/* number of bytes needed for the bitmap */
|
||||
sz = BITS_TO_LONGS(tbl->it_size) * sizeof(unsigned long);
|
||||
|
||||
page = alloc_pages_node(nid, GFP_ATOMIC, get_order(sz));
|
||||
page = alloc_pages_node(nid, GFP_KERNEL, get_order(sz));
|
||||
if (!page)
|
||||
panic("iommu_init_table: Can't allocate %ld bytes\n", sz);
|
||||
tbl->it_map = page_address(page);
|
||||
|
|
|
|||
|
|
@ -441,50 +441,6 @@ void migrate_irqs(void)
|
|||
}
|
||||
#endif
|
||||
|
||||
static inline void handle_one_irq(unsigned int irq)
|
||||
{
|
||||
struct thread_info *curtp, *irqtp;
|
||||
unsigned long saved_sp_limit;
|
||||
struct irq_desc *desc;
|
||||
|
||||
desc = irq_to_desc(irq);
|
||||
if (!desc)
|
||||
return;
|
||||
|
||||
/* Switch to the irq stack to handle this */
|
||||
curtp = current_thread_info();
|
||||
irqtp = hardirq_ctx[smp_processor_id()];
|
||||
|
||||
if (curtp == irqtp) {
|
||||
/* We're already on the irq stack, just handle it */
|
||||
desc->handle_irq(irq, desc);
|
||||
return;
|
||||
}
|
||||
|
||||
saved_sp_limit = current->thread.ksp_limit;
|
||||
|
||||
irqtp->task = curtp->task;
|
||||
irqtp->flags = 0;
|
||||
|
||||
/* Copy the softirq bits in preempt_count so that the
|
||||
* softirq checks work in the hardirq context. */
|
||||
irqtp->preempt_count = (irqtp->preempt_count & ~SOFTIRQ_MASK) |
|
||||
(curtp->preempt_count & SOFTIRQ_MASK);
|
||||
|
||||
current->thread.ksp_limit = (unsigned long)irqtp +
|
||||
_ALIGN_UP(sizeof(struct thread_info), 16);
|
||||
|
||||
call_handle_irq(irq, desc, irqtp, desc->handle_irq);
|
||||
current->thread.ksp_limit = saved_sp_limit;
|
||||
irqtp->task = NULL;
|
||||
|
||||
/* Set any flag that may have been set on the
|
||||
* alternate stack
|
||||
*/
|
||||
if (irqtp->flags)
|
||||
set_bits(irqtp->flags, &curtp->flags);
|
||||
}
|
||||
|
||||
static inline void check_stack_overflow(void)
|
||||
{
|
||||
#ifdef CONFIG_DEBUG_STACKOVERFLOW
|
||||
|
|
@ -501,9 +457,9 @@ static inline void check_stack_overflow(void)
|
|||
#endif
|
||||
}
|
||||
|
||||
void do_IRQ(struct pt_regs *regs)
|
||||
void __do_irq(struct pt_regs *regs)
|
||||
{
|
||||
struct pt_regs *old_regs = set_irq_regs(regs);
|
||||
struct irq_desc *desc;
|
||||
unsigned int irq;
|
||||
|
||||
irq_enter();
|
||||
|
|
@ -519,18 +475,56 @@ void do_IRQ(struct pt_regs *regs)
|
|||
*/
|
||||
irq = ppc_md.get_irq();
|
||||
|
||||
/* We can hard enable interrupts now */
|
||||
/* We can hard enable interrupts now to allow perf interrupts */
|
||||
may_hard_irq_enable();
|
||||
|
||||
/* And finally process it */
|
||||
if (irq != NO_IRQ)
|
||||
handle_one_irq(irq);
|
||||
else
|
||||
if (unlikely(irq == NO_IRQ))
|
||||
__get_cpu_var(irq_stat).spurious_irqs++;
|
||||
else {
|
||||
desc = irq_to_desc(irq);
|
||||
if (likely(desc))
|
||||
desc->handle_irq(irq, desc);
|
||||
}
|
||||
|
||||
trace_irq_exit(regs);
|
||||
|
||||
irq_exit();
|
||||
}
|
||||
|
||||
void do_IRQ(struct pt_regs *regs)
|
||||
{
|
||||
struct pt_regs *old_regs = set_irq_regs(regs);
|
||||
struct thread_info *curtp, *irqtp;
|
||||
|
||||
/* Switch to the irq stack to handle this */
|
||||
curtp = current_thread_info();
|
||||
irqtp = hardirq_ctx[raw_smp_processor_id()];
|
||||
|
||||
/* Already there ? */
|
||||
if (unlikely(curtp == irqtp)) {
|
||||
__do_irq(regs);
|
||||
set_irq_regs(old_regs);
|
||||
return;
|
||||
}
|
||||
|
||||
/* Prepare the thread_info in the irq stack */
|
||||
irqtp->task = curtp->task;
|
||||
irqtp->flags = 0;
|
||||
|
||||
/* Copy the preempt_count so that the [soft]irq checks work. */
|
||||
irqtp->preempt_count = curtp->preempt_count;
|
||||
|
||||
/* Switch stack and call */
|
||||
call_do_irq(regs, irqtp);
|
||||
|
||||
/* Restore stack limit */
|
||||
irqtp->task = NULL;
|
||||
|
||||
/* Copy back updates to the thread_info */
|
||||
if (irqtp->flags)
|
||||
set_bits(irqtp->flags, &curtp->flags);
|
||||
|
||||
set_irq_regs(old_regs);
|
||||
}
|
||||
|
||||
|
|
@ -592,28 +586,22 @@ void irq_ctx_init(void)
|
|||
memset((void *)softirq_ctx[i], 0, THREAD_SIZE);
|
||||
tp = softirq_ctx[i];
|
||||
tp->cpu = i;
|
||||
tp->preempt_count = 0;
|
||||
|
||||
memset((void *)hardirq_ctx[i], 0, THREAD_SIZE);
|
||||
tp = hardirq_ctx[i];
|
||||
tp->cpu = i;
|
||||
tp->preempt_count = HARDIRQ_OFFSET;
|
||||
}
|
||||
}
|
||||
|
||||
static inline void do_softirq_onstack(void)
|
||||
{
|
||||
struct thread_info *curtp, *irqtp;
|
||||
unsigned long saved_sp_limit = current->thread.ksp_limit;
|
||||
|
||||
curtp = current_thread_info();
|
||||
irqtp = softirq_ctx[smp_processor_id()];
|
||||
irqtp->task = curtp->task;
|
||||
irqtp->flags = 0;
|
||||
current->thread.ksp_limit = (unsigned long)irqtp +
|
||||
_ALIGN_UP(sizeof(struct thread_info), 16);
|
||||
call_do_softirq(irqtp);
|
||||
current->thread.ksp_limit = saved_sp_limit;
|
||||
irqtp->task = NULL;
|
||||
|
||||
/* Set any flag that may have been set on the
|
||||
|
|
|
|||
|
|
@ -36,26 +36,41 @@
|
|||
|
||||
.text
|
||||
|
||||
/*
|
||||
* We store the saved ksp_limit in the unused part
|
||||
* of the STACK_FRAME_OVERHEAD
|
||||
*/
|
||||
_GLOBAL(call_do_softirq)
|
||||
mflr r0
|
||||
stw r0,4(r1)
|
||||
lwz r10,THREAD+KSP_LIMIT(r2)
|
||||
addi r11,r3,THREAD_INFO_GAP
|
||||
stwu r1,THREAD_SIZE-STACK_FRAME_OVERHEAD(r3)
|
||||
mr r1,r3
|
||||
stw r10,8(r1)
|
||||
stw r11,THREAD+KSP_LIMIT(r2)
|
||||
bl __do_softirq
|
||||
lwz r10,8(r1)
|
||||
lwz r1,0(r1)
|
||||
lwz r0,4(r1)
|
||||
stw r10,THREAD+KSP_LIMIT(r2)
|
||||
mtlr r0
|
||||
blr
|
||||
|
||||
_GLOBAL(call_handle_irq)
|
||||
_GLOBAL(call_do_irq)
|
||||
mflr r0
|
||||
stw r0,4(r1)
|
||||
mtctr r6
|
||||
stwu r1,THREAD_SIZE-STACK_FRAME_OVERHEAD(r5)
|
||||
mr r1,r5
|
||||
bctrl
|
||||
lwz r10,THREAD+KSP_LIMIT(r2)
|
||||
addi r11,r3,THREAD_INFO_GAP
|
||||
stwu r1,THREAD_SIZE-STACK_FRAME_OVERHEAD(r4)
|
||||
mr r1,r4
|
||||
stw r10,8(r1)
|
||||
stw r11,THREAD+KSP_LIMIT(r2)
|
||||
bl __do_irq
|
||||
lwz r10,8(r1)
|
||||
lwz r1,0(r1)
|
||||
lwz r0,4(r1)
|
||||
stw r10,THREAD+KSP_LIMIT(r2)
|
||||
mtlr r0
|
||||
blr
|
||||
|
||||
|
|
|
|||
|
|
@ -40,14 +40,12 @@ _GLOBAL(call_do_softirq)
|
|||
mtlr r0
|
||||
blr
|
||||
|
||||
_GLOBAL(call_handle_irq)
|
||||
ld r8,0(r6)
|
||||
_GLOBAL(call_do_irq)
|
||||
mflr r0
|
||||
std r0,16(r1)
|
||||
mtctr r8
|
||||
stdu r1,THREAD_SIZE-STACK_FRAME_OVERHEAD(r5)
|
||||
mr r1,r5
|
||||
bctrl
|
||||
stdu r1,THREAD_SIZE-STACK_FRAME_OVERHEAD(r4)
|
||||
mr r1,r4
|
||||
bl .__do_irq
|
||||
ld r1,0(r1)
|
||||
ld r0,16(r1)
|
||||
mtlr r0
|
||||
|
|
|
|||
|
|
@ -1000,9 +1000,10 @@ int copy_thread(unsigned long clone_flags, unsigned long usp,
|
|||
kregs = (struct pt_regs *) sp;
|
||||
sp -= STACK_FRAME_OVERHEAD;
|
||||
p->thread.ksp = sp;
|
||||
#ifdef CONFIG_PPC32
|
||||
p->thread.ksp_limit = (unsigned long)task_stack_page(p) +
|
||||
_ALIGN_UP(sizeof(struct thread_info), 16);
|
||||
|
||||
#endif
|
||||
#ifdef CONFIG_HAVE_HW_BREAKPOINT
|
||||
p->thread.ptrace_bps[0] = NULL;
|
||||
#endif
|
||||
|
|
|
|||
|
|
@ -196,6 +196,8 @@ static int __initdata mem_reserve_cnt;
|
|||
|
||||
static cell_t __initdata regbuf[1024];
|
||||
|
||||
static bool rtas_has_query_cpu_stopped;
|
||||
|
||||
|
||||
/*
|
||||
* Error results ... some OF calls will return "-1" on error, some
|
||||
|
|
@ -1574,6 +1576,11 @@ static void __init prom_instantiate_rtas(void)
|
|||
prom_setprop(rtas_node, "/rtas", "linux,rtas-entry",
|
||||
&val, sizeof(val));
|
||||
|
||||
/* Check if it supports "query-cpu-stopped-state" */
|
||||
if (prom_getprop(rtas_node, "query-cpu-stopped-state",
|
||||
&val, sizeof(val)) != PROM_ERROR)
|
||||
rtas_has_query_cpu_stopped = true;
|
||||
|
||||
#if defined(CONFIG_PPC_POWERNV) && defined(__BIG_ENDIAN__)
|
||||
/* PowerVN takeover hack */
|
||||
prom_rtas_data = base;
|
||||
|
|
@ -1815,6 +1822,18 @@ static void __init prom_hold_cpus(void)
|
|||
= (void *) LOW_ADDR(__secondary_hold_acknowledge);
|
||||
unsigned long secondary_hold = LOW_ADDR(__secondary_hold);
|
||||
|
||||
/*
|
||||
* On pseries, if RTAS supports "query-cpu-stopped-state",
|
||||
* we skip this stage, the CPUs will be started by the
|
||||
* kernel using RTAS.
|
||||
*/
|
||||
if ((of_platform == PLATFORM_PSERIES ||
|
||||
of_platform == PLATFORM_PSERIES_LPAR) &&
|
||||
rtas_has_query_cpu_stopped) {
|
||||
prom_printf("prom_hold_cpus: skipped\n");
|
||||
return;
|
||||
}
|
||||
|
||||
prom_debug("prom_hold_cpus: start...\n");
|
||||
prom_debug(" 1) spinloop = 0x%x\n", (unsigned long)spinloop);
|
||||
prom_debug(" 1) *spinloop = 0x%x\n", *spinloop);
|
||||
|
|
@ -3011,6 +3030,8 @@ unsigned long __init prom_init(unsigned long r3, unsigned long r4,
|
|||
* On non-powermacs, put all CPUs in spin-loops.
|
||||
*
|
||||
* PowerMacs use a different mechanism to spin CPUs
|
||||
*
|
||||
* (This must be done after instanciating RTAS)
|
||||
*/
|
||||
if (of_platform != PLATFORM_POWERMAC &&
|
||||
of_platform != PLATFORM_OPAL)
|
||||
|
|
|
|||
|
|
@ -17,6 +17,7 @@
|
|||
#include <asm/machdep.h>
|
||||
#include <asm/smp.h>
|
||||
#include <asm/pmc.h>
|
||||
#include <asm/firmware.h>
|
||||
|
||||
#include "cacheinfo.h"
|
||||
|
||||
|
|
@ -179,15 +180,25 @@ SYSFS_PMCSETUP(spurr, SPRN_SPURR);
|
|||
SYSFS_PMCSETUP(dscr, SPRN_DSCR);
|
||||
SYSFS_PMCSETUP(pir, SPRN_PIR);
|
||||
|
||||
/*
|
||||
Lets only enable read for phyp resources and
|
||||
enable write when needed with a separate function.
|
||||
Lets be conservative and default to pseries.
|
||||
*/
|
||||
static DEVICE_ATTR(mmcra, 0600, show_mmcra, store_mmcra);
|
||||
static DEVICE_ATTR(spurr, 0400, show_spurr, NULL);
|
||||
static DEVICE_ATTR(dscr, 0600, show_dscr, store_dscr);
|
||||
static DEVICE_ATTR(purr, 0600, show_purr, store_purr);
|
||||
static DEVICE_ATTR(purr, 0400, show_purr, store_purr);
|
||||
static DEVICE_ATTR(pir, 0400, show_pir, NULL);
|
||||
|
||||
unsigned long dscr_default = 0;
|
||||
EXPORT_SYMBOL(dscr_default);
|
||||
|
||||
static void add_write_permission_dev_attr(struct device_attribute *attr)
|
||||
{
|
||||
attr->attr.mode |= 0200;
|
||||
}
|
||||
|
||||
static ssize_t show_dscr_default(struct device *dev,
|
||||
struct device_attribute *attr, char *buf)
|
||||
{
|
||||
|
|
@ -394,8 +405,11 @@ static void register_cpu_online(unsigned int cpu)
|
|||
if (cpu_has_feature(CPU_FTR_MMCRA))
|
||||
device_create_file(s, &dev_attr_mmcra);
|
||||
|
||||
if (cpu_has_feature(CPU_FTR_PURR))
|
||||
if (cpu_has_feature(CPU_FTR_PURR)) {
|
||||
if (!firmware_has_feature(FW_FEATURE_LPAR))
|
||||
add_write_permission_dev_attr(&dev_attr_purr);
|
||||
device_create_file(s, &dev_attr_purr);
|
||||
}
|
||||
|
||||
if (cpu_has_feature(CPU_FTR_SPURR))
|
||||
device_create_file(s, &dev_attr_spurr);
|
||||
|
|
|
|||
|
|
@ -79,6 +79,11 @@ _GLOBAL(tm_abort)
|
|||
TABORT(R3)
|
||||
blr
|
||||
|
||||
.section ".toc","aw"
|
||||
DSCR_DEFAULT:
|
||||
.tc dscr_default[TC],dscr_default
|
||||
|
||||
.section ".text"
|
||||
|
||||
/* void tm_reclaim(struct thread_struct *thread,
|
||||
* unsigned long orig_msr,
|
||||
|
|
@ -123,6 +128,7 @@ _GLOBAL(tm_reclaim)
|
|||
mr r15, r14
|
||||
ori r15, r15, MSR_FP
|
||||
li r16, MSR_RI
|
||||
ori r16, r16, MSR_EE /* IRQs hard off */
|
||||
andc r15, r15, r16
|
||||
oris r15, r15, MSR_VEC@h
|
||||
#ifdef CONFIG_VSX
|
||||
|
|
@ -187,11 +193,18 @@ dont_backup_fp:
|
|||
std r1, PACATMSCRATCH(r13)
|
||||
ld r1, PACAR1(r13)
|
||||
|
||||
/* Store the PPR in r11 and reset to decent value */
|
||||
std r11, GPR11(r1) /* Temporary stash */
|
||||
mfspr r11, SPRN_PPR
|
||||
HMT_MEDIUM
|
||||
|
||||
/* Now get some more GPRS free */
|
||||
std r7, GPR7(r1) /* Temporary stash */
|
||||
std r12, GPR12(r1) /* '' '' '' */
|
||||
ld r12, STACK_PARAM(0)(r1) /* Param 0, thread_struct * */
|
||||
|
||||
std r11, THREAD_TM_PPR(r12) /* Store PPR and free r11 */
|
||||
|
||||
addi r7, r12, PT_CKPT_REGS /* Thread's ckpt_regs */
|
||||
|
||||
/* Make r7 look like an exception frame so that we
|
||||
|
|
@ -203,15 +216,19 @@ dont_backup_fp:
|
|||
SAVE_GPR(0, r7) /* user r0 */
|
||||
SAVE_GPR(2, r7) /* user r2 */
|
||||
SAVE_4GPRS(3, r7) /* user r3-r6 */
|
||||
SAVE_4GPRS(8, r7) /* user r8-r11 */
|
||||
SAVE_GPR(8, r7) /* user r8 */
|
||||
SAVE_GPR(9, r7) /* user r9 */
|
||||
SAVE_GPR(10, r7) /* user r10 */
|
||||
ld r3, PACATMSCRATCH(r13) /* user r1 */
|
||||
ld r4, GPR7(r1) /* user r7 */
|
||||
ld r5, GPR12(r1) /* user r12 */
|
||||
GET_SCRATCH0(6) /* user r13 */
|
||||
ld r5, GPR11(r1) /* user r11 */
|
||||
ld r6, GPR12(r1) /* user r12 */
|
||||
GET_SCRATCH0(8) /* user r13 */
|
||||
std r3, GPR1(r7)
|
||||
std r4, GPR7(r7)
|
||||
std r5, GPR12(r7)
|
||||
std r6, GPR13(r7)
|
||||
std r5, GPR11(r7)
|
||||
std r6, GPR12(r7)
|
||||
std r8, GPR13(r7)
|
||||
|
||||
SAVE_NVGPRS(r7) /* user r14-r31 */
|
||||
|
||||
|
|
@ -234,14 +251,12 @@ dont_backup_fp:
|
|||
std r6, _XER(r7)
|
||||
|
||||
|
||||
/* ******************** TAR, PPR, DSCR ********** */
|
||||
/* ******************** TAR, DSCR ********** */
|
||||
mfspr r3, SPRN_TAR
|
||||
mfspr r4, SPRN_PPR
|
||||
mfspr r5, SPRN_DSCR
|
||||
mfspr r4, SPRN_DSCR
|
||||
|
||||
std r3, THREAD_TM_TAR(r12)
|
||||
std r4, THREAD_TM_PPR(r12)
|
||||
std r5, THREAD_TM_DSCR(r12)
|
||||
std r4, THREAD_TM_DSCR(r12)
|
||||
|
||||
/* MSR and flags: We don't change CRs, and we don't need to alter
|
||||
* MSR.
|
||||
|
|
@ -258,7 +273,7 @@ dont_backup_fp:
|
|||
std r3, THREAD_TM_TFHAR(r12)
|
||||
std r4, THREAD_TM_TFIAR(r12)
|
||||
|
||||
/* AMR and PPR are checkpointed too, but are unsupported by Linux. */
|
||||
/* AMR is checkpointed too, but is unsupported by Linux. */
|
||||
|
||||
/* Restore original MSR/IRQ state & clear TM mode */
|
||||
ld r14, TM_FRAME_L0(r1) /* Orig MSR */
|
||||
|
|
@ -274,6 +289,12 @@ dont_backup_fp:
|
|||
mtcr r4
|
||||
mtlr r0
|
||||
ld r2, 40(r1)
|
||||
|
||||
/* Load system default DSCR */
|
||||
ld r4, DSCR_DEFAULT@toc(r2)
|
||||
ld r0, 0(r4)
|
||||
mtspr SPRN_DSCR, r0
|
||||
|
||||
blr
|
||||
|
||||
|
||||
|
|
@ -358,25 +379,24 @@ dont_restore_fp:
|
|||
|
||||
restore_gprs:
|
||||
|
||||
/* ******************** TAR, PPR, DSCR ********** */
|
||||
ld r4, THREAD_TM_TAR(r3)
|
||||
ld r5, THREAD_TM_PPR(r3)
|
||||
ld r6, THREAD_TM_DSCR(r3)
|
||||
|
||||
mtspr SPRN_TAR, r4
|
||||
mtspr SPRN_PPR, r5
|
||||
mtspr SPRN_DSCR, r6
|
||||
|
||||
/* ******************** CR,LR,CCR,MSR ********** */
|
||||
ld r3, _CTR(r7)
|
||||
ld r4, _LINK(r7)
|
||||
ld r5, _CCR(r7)
|
||||
ld r6, _XER(r7)
|
||||
ld r4, _CTR(r7)
|
||||
ld r5, _LINK(r7)
|
||||
ld r6, _CCR(r7)
|
||||
ld r8, _XER(r7)
|
||||
|
||||
mtctr r3
|
||||
mtlr r4
|
||||
mtcr r5
|
||||
mtxer r6
|
||||
mtctr r4
|
||||
mtlr r5
|
||||
mtcr r6
|
||||
mtxer r8
|
||||
|
||||
/* ******************** TAR ******************** */
|
||||
ld r4, THREAD_TM_TAR(r3)
|
||||
mtspr SPRN_TAR, r4
|
||||
|
||||
/* Load up the PPR and DSCR in GPRs only at this stage */
|
||||
ld r5, THREAD_TM_DSCR(r3)
|
||||
ld r6, THREAD_TM_PPR(r3)
|
||||
|
||||
/* Clear the MSR RI since we are about to change R1. EE is already off
|
||||
*/
|
||||
|
|
@ -384,19 +404,26 @@ restore_gprs:
|
|||
mtmsrd r4, 1
|
||||
|
||||
REST_4GPRS(0, r7) /* GPR0-3 */
|
||||
REST_GPR(4, r7) /* GPR4-6 */
|
||||
REST_GPR(5, r7)
|
||||
REST_GPR(6, r7)
|
||||
REST_GPR(4, r7) /* GPR4 */
|
||||
REST_4GPRS(8, r7) /* GPR8-11 */
|
||||
REST_2GPRS(12, r7) /* GPR12-13 */
|
||||
|
||||
REST_NVGPRS(r7) /* GPR14-31 */
|
||||
|
||||
ld r7, GPR7(r7) /* GPR7 */
|
||||
/* Load up PPR and DSCR here so we don't run with user values for long
|
||||
*/
|
||||
mtspr SPRN_DSCR, r5
|
||||
mtspr SPRN_PPR, r6
|
||||
|
||||
REST_GPR(5, r7) /* GPR5-7 */
|
||||
REST_GPR(6, r7)
|
||||
ld r7, GPR7(r7)
|
||||
|
||||
/* Commit register state as checkpointed state: */
|
||||
TRECHKPT
|
||||
|
||||
HMT_MEDIUM
|
||||
|
||||
/* Our transactional state has now changed.
|
||||
*
|
||||
* Now just get out of here. Transactional (current) state will be
|
||||
|
|
@ -419,6 +446,12 @@ restore_gprs:
|
|||
mtcr r4
|
||||
mtlr r0
|
||||
ld r2, 40(r1)
|
||||
|
||||
/* Load system default DSCR */
|
||||
ld r4, DSCR_DEFAULT@toc(r2)
|
||||
ld r0, 0(r4)
|
||||
mtspr SPRN_DSCR, r0
|
||||
|
||||
blr
|
||||
|
||||
/* ****************************************************************** */
|
||||
|
|
|
|||
|
|
@ -1530,11 +1530,15 @@ static ssize_t modalias_show(struct device *dev, struct device_attribute *attr,
|
|||
const char *cp;
|
||||
|
||||
dn = dev->of_node;
|
||||
if (!dn)
|
||||
return -ENODEV;
|
||||
if (!dn) {
|
||||
strcat(buf, "\n");
|
||||
return strlen(buf);
|
||||
}
|
||||
cp = of_get_property(dn, "compatible", NULL);
|
||||
if (!cp)
|
||||
return -ENODEV;
|
||||
if (!cp) {
|
||||
strcat(buf, "\n");
|
||||
return strlen(buf);
|
||||
}
|
||||
|
||||
return sprintf(buf, "vio:T%sS%s\n", vio_dev->type, cp);
|
||||
}
|
||||
|
|
|
|||
|
|
@ -226,19 +226,35 @@ _GLOBAL(csum_partial)
|
|||
blr
|
||||
|
||||
|
||||
.macro source
|
||||
.macro srcnr
|
||||
100:
|
||||
.section __ex_table,"a"
|
||||
.align 3
|
||||
.llong 100b,.Lsrc_error
|
||||
.llong 100b,.Lsrc_error_nr
|
||||
.previous
|
||||
.endm
|
||||
|
||||
.macro source
|
||||
150:
|
||||
.section __ex_table,"a"
|
||||
.align 3
|
||||
.llong 150b,.Lsrc_error
|
||||
.previous
|
||||
.endm
|
||||
|
||||
.macro dstnr
|
||||
200:
|
||||
.section __ex_table,"a"
|
||||
.align 3
|
||||
.llong 200b,.Ldest_error_nr
|
||||
.previous
|
||||
.endm
|
||||
|
||||
.macro dest
|
||||
200:
|
||||
250:
|
||||
.section __ex_table,"a"
|
||||
.align 3
|
||||
.llong 200b,.Ldest_error
|
||||
.llong 250b,.Ldest_error
|
||||
.previous
|
||||
.endm
|
||||
|
||||
|
|
@ -269,16 +285,16 @@ _GLOBAL(csum_partial_copy_generic)
|
|||
rldicl. r6,r3,64-1,64-2 /* r6 = (r3 & 0x3) >> 1 */
|
||||
beq .Lcopy_aligned
|
||||
|
||||
li r7,4
|
||||
sub r6,r7,r6
|
||||
li r9,4
|
||||
sub r6,r9,r6
|
||||
mtctr r6
|
||||
|
||||
1:
|
||||
source; lhz r6,0(r3) /* align to doubleword */
|
||||
srcnr; lhz r6,0(r3) /* align to doubleword */
|
||||
subi r5,r5,2
|
||||
addi r3,r3,2
|
||||
adde r0,r0,r6
|
||||
dest; sth r6,0(r4)
|
||||
dstnr; sth r6,0(r4)
|
||||
addi r4,r4,2
|
||||
bdnz 1b
|
||||
|
||||
|
|
@ -392,10 +408,10 @@ dest; std r16,56(r4)
|
|||
|
||||
mtctr r6
|
||||
3:
|
||||
source; ld r6,0(r3)
|
||||
srcnr; ld r6,0(r3)
|
||||
addi r3,r3,8
|
||||
adde r0,r0,r6
|
||||
dest; std r6,0(r4)
|
||||
dstnr; std r6,0(r4)
|
||||
addi r4,r4,8
|
||||
bdnz 3b
|
||||
|
||||
|
|
@ -405,10 +421,10 @@ dest; std r6,0(r4)
|
|||
srdi. r6,r5,2
|
||||
beq .Lcopy_tail_halfword
|
||||
|
||||
source; lwz r6,0(r3)
|
||||
srcnr; lwz r6,0(r3)
|
||||
addi r3,r3,4
|
||||
adde r0,r0,r6
|
||||
dest; stw r6,0(r4)
|
||||
dstnr; stw r6,0(r4)
|
||||
addi r4,r4,4
|
||||
subi r5,r5,4
|
||||
|
||||
|
|
@ -416,10 +432,10 @@ dest; stw r6,0(r4)
|
|||
srdi. r6,r5,1
|
||||
beq .Lcopy_tail_byte
|
||||
|
||||
source; lhz r6,0(r3)
|
||||
srcnr; lhz r6,0(r3)
|
||||
addi r3,r3,2
|
||||
adde r0,r0,r6
|
||||
dest; sth r6,0(r4)
|
||||
dstnr; sth r6,0(r4)
|
||||
addi r4,r4,2
|
||||
subi r5,r5,2
|
||||
|
||||
|
|
@ -427,10 +443,10 @@ dest; sth r6,0(r4)
|
|||
andi. r6,r5,1
|
||||
beq .Lcopy_finish
|
||||
|
||||
source; lbz r6,0(r3)
|
||||
srcnr; lbz r6,0(r3)
|
||||
sldi r9,r6,8 /* Pad the byte out to 16 bits */
|
||||
adde r0,r0,r9
|
||||
dest; stb r6,0(r4)
|
||||
dstnr; stb r6,0(r4)
|
||||
|
||||
.Lcopy_finish:
|
||||
addze r0,r0 /* add in final carry */
|
||||
|
|
@ -440,6 +456,11 @@ dest; stb r6,0(r4)
|
|||
blr
|
||||
|
||||
.Lsrc_error:
|
||||
ld r14,STK_REG(R14)(r1)
|
||||
ld r15,STK_REG(R15)(r1)
|
||||
ld r16,STK_REG(R16)(r1)
|
||||
addi r1,r1,STACKFRAMESIZE
|
||||
.Lsrc_error_nr:
|
||||
cmpdi 0,r7,0
|
||||
beqlr
|
||||
li r6,-EFAULT
|
||||
|
|
@ -447,6 +468,11 @@ dest; stb r6,0(r4)
|
|||
blr
|
||||
|
||||
.Ldest_error:
|
||||
ld r14,STK_REG(R14)(r1)
|
||||
ld r15,STK_REG(R15)(r1)
|
||||
ld r16,STK_REG(R16)(r1)
|
||||
addi r1,r1,STACKFRAMESIZE
|
||||
.Ldest_error_nr:
|
||||
cmpdi 0,r8,0
|
||||
beqlr
|
||||
li r6,-EFAULT
|
||||
|
|
|
|||
Some files were not shown because too many files have changed in this diff Show more
Loading…
Add table
Reference in a new issue