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drm/radeon/cik: drop cg_update from dpm code

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I'm not entirely sure this is required and it won't work
with the dpm restructing anyway.

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
This commit is contained in:
Alex Deucher 2013-12-18 14:16:50 -05:00
parent 68e3a092c1
commit f2185ecef1
2 changed files with 0 additions and 61 deletions
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36
drivers/gpu/drm/radeon/ci_dpm.c
View file

@ -171,8 +171,6 @@ extern void si_trim_voltage_table_to_fit_state_table(struct radeon_device *rdev,
struct atom_voltage_table *voltage_table); struct atom_voltage_table *voltage_table);
extern void cik_enter_rlc_safe_mode(struct radeon_device *rdev); extern void cik_enter_rlc_safe_mode(struct radeon_device *rdev);
extern void cik_exit_rlc_safe_mode(struct radeon_device *rdev); extern void cik_exit_rlc_safe_mode(struct radeon_device *rdev);
extern void cik_update_cg(struct radeon_device *rdev,
u32 block, bool enable);
static int ci_get_std_voltage_value_sidd(struct radeon_device *rdev, static int ci_get_std_voltage_value_sidd(struct radeon_device *rdev,
struct atom_voltage_table_entry *voltage_table, struct atom_voltage_table_entry *voltage_table,
@ -4561,13 +4559,6 @@ int ci_dpm_enable(struct radeon_device *rdev)
struct radeon_ps *boot_ps = rdev->pm.dpm.boot_ps; struct radeon_ps *boot_ps = rdev->pm.dpm.boot_ps;
int ret; int ret;
cik_update_cg(rdev, (RADEON_CG_BLOCK_GFX |
RADEON_CG_BLOCK_MC |
RADEON_CG_BLOCK_SDMA |
RADEON_CG_BLOCK_BIF |
RADEON_CG_BLOCK_UVD |
RADEON_CG_BLOCK_HDP), false);
if (ci_is_smc_running(rdev)) if (ci_is_smc_running(rdev))
return -EINVAL; return -EINVAL;
if (pi->voltage_control != CISLANDS_VOLTAGE_CONTROL_NONE) { if (pi->voltage_control != CISLANDS_VOLTAGE_CONTROL_NONE) {
@ -4689,13 +4680,6 @@ int ci_dpm_enable(struct radeon_device *rdev)
ci_dpm_powergate_uvd(rdev, true); ci_dpm_powergate_uvd(rdev, true);
cik_update_cg(rdev, (RADEON_CG_BLOCK_GFX |
RADEON_CG_BLOCK_MC |
RADEON_CG_BLOCK_SDMA |
RADEON_CG_BLOCK_BIF |
RADEON_CG_BLOCK_UVD |
RADEON_CG_BLOCK_HDP), true);
ci_update_current_ps(rdev, boot_ps); ci_update_current_ps(rdev, boot_ps);
return 0; return 0;
@ -4706,12 +4690,6 @@ void ci_dpm_disable(struct radeon_device *rdev)
struct ci_power_info *pi = ci_get_pi(rdev); struct ci_power_info *pi = ci_get_pi(rdev);
struct radeon_ps *boot_ps = rdev->pm.dpm.boot_ps; struct radeon_ps *boot_ps = rdev->pm.dpm.boot_ps;
cik_update_cg(rdev, (RADEON_CG_BLOCK_GFX |
RADEON_CG_BLOCK_MC |
RADEON_CG_BLOCK_SDMA |
RADEON_CG_BLOCK_UVD |
RADEON_CG_BLOCK_HDP), false);
ci_dpm_powergate_uvd(rdev, false); ci_dpm_powergate_uvd(rdev, false);
if (!ci_is_smc_running(rdev)) if (!ci_is_smc_running(rdev))
@ -4742,13 +4720,6 @@ int ci_dpm_set_power_state(struct radeon_device *rdev)
struct radeon_ps *old_ps = &pi->current_rps; struct radeon_ps *old_ps = &pi->current_rps;
int ret; int ret;
cik_update_cg(rdev, (RADEON_CG_BLOCK_GFX |
RADEON_CG_BLOCK_MC |
RADEON_CG_BLOCK_SDMA |
RADEON_CG_BLOCK_BIF |
RADEON_CG_BLOCK_UVD |
RADEON_CG_BLOCK_HDP), false);
ci_find_dpm_states_clocks_in_dpm_table(rdev, new_ps); ci_find_dpm_states_clocks_in_dpm_table(rdev, new_ps);
if (pi->pcie_performance_request) if (pi->pcie_performance_request)
ci_request_link_speed_change_before_state_change(rdev, new_ps, old_ps); ci_request_link_speed_change_before_state_change(rdev, new_ps, old_ps);
@ -4804,13 +4775,6 @@ int ci_dpm_set_power_state(struct radeon_device *rdev)
if (pi->pcie_performance_request) if (pi->pcie_performance_request)
ci_notify_link_speed_change_after_state_change(rdev, new_ps, old_ps); ci_notify_link_speed_change_after_state_change(rdev, new_ps, old_ps);
cik_update_cg(rdev, (RADEON_CG_BLOCK_GFX |
RADEON_CG_BLOCK_MC |
RADEON_CG_BLOCK_SDMA |
RADEON_CG_BLOCK_BIF |
RADEON_CG_BLOCK_UVD |
RADEON_CG_BLOCK_HDP), true);
return 0; return 0;
} }

25
drivers/gpu/drm/radeon/kv_dpm.c
View file

@ -1126,11 +1126,6 @@ int kv_dpm_enable(struct radeon_device *rdev)
struct kv_power_info *pi = kv_get_pi(rdev); struct kv_power_info *pi = kv_get_pi(rdev);
int ret; int ret;
cik_update_cg(rdev, (RADEON_CG_BLOCK_GFX |
RADEON_CG_BLOCK_SDMA |
RADEON_CG_BLOCK_BIF |
RADEON_CG_BLOCK_HDP), false);
ret = kv_process_firmware_header(rdev); ret = kv_process_firmware_header(rdev);
if (ret) { if (ret) {
DRM_ERROR("kv_process_firmware_header failed\n"); DRM_ERROR("kv_process_firmware_header failed\n");
@ -1238,11 +1233,6 @@ int kv_dpm_enable(struct radeon_device *rdev)
kv_dpm_powergate_vce(rdev, true); kv_dpm_powergate_vce(rdev, true);
kv_dpm_powergate_uvd(rdev, true); kv_dpm_powergate_uvd(rdev, true);
cik_update_cg(rdev, (RADEON_CG_BLOCK_GFX |
RADEON_CG_BLOCK_SDMA |
RADEON_CG_BLOCK_BIF |
RADEON_CG_BLOCK_HDP), true);
kv_update_current_ps(rdev, rdev->pm.dpm.boot_ps); kv_update_current_ps(rdev, rdev->pm.dpm.boot_ps);
return ret; return ret;
@ -1250,11 +1240,6 @@ int kv_dpm_enable(struct radeon_device *rdev)
void kv_dpm_disable(struct radeon_device *rdev) void kv_dpm_disable(struct radeon_device *rdev)
{ {
cik_update_cg(rdev, (RADEON_CG_BLOCK_GFX |
RADEON_CG_BLOCK_SDMA |
RADEON_CG_BLOCK_BIF |
RADEON_CG_BLOCK_HDP), false);
kv_smc_bapm_enable(rdev, false); kv_smc_bapm_enable(rdev, false);
/* powerup blocks */ /* powerup blocks */
@ -1779,11 +1764,6 @@ int kv_dpm_set_power_state(struct radeon_device *rdev)
/*struct radeon_ps *old_ps = &pi->current_rps;*/ /*struct radeon_ps *old_ps = &pi->current_rps;*/
int ret; int ret;
cik_update_cg(rdev, (RADEON_CG_BLOCK_GFX |
RADEON_CG_BLOCK_SDMA |
RADEON_CG_BLOCK_BIF |
RADEON_CG_BLOCK_HDP), false);
if (pi->bapm_enable) { if (pi->bapm_enable) {
ret = kv_smc_bapm_enable(rdev, rdev->pm.dpm.ac_power); ret = kv_smc_bapm_enable(rdev, rdev->pm.dpm.ac_power);
if (ret) { if (ret) {
@ -1849,11 +1829,6 @@ int kv_dpm_set_power_state(struct radeon_device *rdev)
} }
} }
cik_update_cg(rdev, (RADEON_CG_BLOCK_GFX |
RADEON_CG_BLOCK_SDMA |
RADEON_CG_BLOCK_BIF |
RADEON_CG_BLOCK_HDP), true);
return 0; return 0;
} }