Merge branch 'v3.8-samsung-fixes-1' of git://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux-samsung into fixes
From Kukjin Kim: Here is Samsung fixes-1 for v3.8-rc1. Most of them are trivial fixes which are for NULL pointer dereference, MSHC clocks instance names and exynos5440 stuff. * 'v3.8-samsung-fixes-1' of git://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux-samsung: ARM: EXYNOS: Fix MSHC clocks instance names ARM: EXYNOS: Fix NULL pointer dereference bug in SMDKV310 ARM: EXYNOS: Fix NULL pointer dereference bug in SMDK4X12 ARM: EXYNOS: Fix NULL pointer dereference bug in Origen ARM: SAMSUNG: Add missing include guard to gpio-core.h pinctrl: exynos5440/samsung: Staticize pcfgs pinctrl: samsung: Fix a typo in pinctrl-samsung.h ARM: EXYNOS: fix skip scu_enable() for EXYNOS5440 ARM: EXYNOS: fix GIC using for EXYNOS5440 ARM: EXYNOS: fix build error when MFC is not selected Signed-off-by: Olof Johansson <olof@lixom.net>
This commit is contained in:
commit
f2420ec2d0
11 changed files with 21 additions and 13 deletions
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@ -529,7 +529,7 @@ static struct clk exynos4_init_clocks_off[] = {
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.enable = exynos4_clk_ip_fsys_ctrl,
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.enable = exynos4_clk_ip_fsys_ctrl,
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.ctrlbit = (1 << 8),
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.ctrlbit = (1 << 8),
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}, {
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}, {
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.name = "dwmmc",
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.name = "biu",
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.parent = &exynos4_clk_aclk_133.clk,
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.parent = &exynos4_clk_aclk_133.clk,
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.enable = exynos4_clk_ip_fsys_ctrl,
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.enable = exynos4_clk_ip_fsys_ctrl,
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.ctrlbit = (1 << 9),
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.ctrlbit = (1 << 9),
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@ -1134,7 +1134,7 @@ static struct clksrc_clk exynos4_clksrcs[] = {
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.reg_div = { .reg = EXYNOS4_CLKDIV_MFC, .shift = 0, .size = 4 },
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.reg_div = { .reg = EXYNOS4_CLKDIV_MFC, .shift = 0, .size = 4 },
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}, {
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}, {
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.clk = {
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.clk = {
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.name = "sclk_dwmmc",
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.name = "ciu",
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.parent = &exynos4_clk_dout_mmc4.clk,
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.parent = &exynos4_clk_dout_mmc4.clk,
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.enable = exynos4_clksrc_mask_fsys_ctrl,
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.enable = exynos4_clksrc_mask_fsys_ctrl,
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.ctrlbit = (1 << 16),
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.ctrlbit = (1 << 16),
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@ -679,7 +679,8 @@ void __init exynos5_init_irq(void)
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* Theses parameters should be NULL and 0 because EXYNOS4
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* Theses parameters should be NULL and 0 because EXYNOS4
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* uses GIC instead of VIC.
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* uses GIC instead of VIC.
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*/
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*/
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s5p_init_irq(NULL, 0);
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if (!of_machine_is_compatible("samsung,exynos5440"))
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s5p_init_irq(NULL, 0);
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gic_arch_extn.irq_set_wake = s3c_irq_wake;
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gic_arch_extn.irq_set_wake = s3c_irq_wake;
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}
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}
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@ -163,6 +163,7 @@ static char const *exynos5_dt_compat[] __initdata = {
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static void __init exynos5_reserve(void)
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static void __init exynos5_reserve(void)
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{
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{
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#ifdef CONFIG_S5P_DEV_MFC
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struct s5p_mfc_dt_meminfo mfc_mem;
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struct s5p_mfc_dt_meminfo mfc_mem;
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/* Reserve memory for MFC only if it's available */
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/* Reserve memory for MFC only if it's available */
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@ -170,6 +171,7 @@ static void __init exynos5_reserve(void)
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if (of_scan_flat_dt(s5p_fdt_find_mfc_mem, &mfc_mem))
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if (of_scan_flat_dt(s5p_fdt_find_mfc_mem, &mfc_mem))
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s5p_mfc_reserve_mem(mfc_mem.roff, mfc_mem.rsize, mfc_mem.loff,
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s5p_mfc_reserve_mem(mfc_mem.roff, mfc_mem.rsize, mfc_mem.loff,
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mfc_mem.lsize);
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mfc_mem.lsize);
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#endif
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}
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}
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DT_MACHINE_START(EXYNOS5_DT, "SAMSUNG EXYNOS5 (Flattened Device Tree)")
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DT_MACHINE_START(EXYNOS5_DT, "SAMSUNG EXYNOS5 (Flattened Device Tree)")
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@ -621,7 +621,7 @@ static struct pwm_lookup origen_pwm_lookup[] = {
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PWM_LOOKUP("s3c24xx-pwm.0", 0, "pwm-backlight.0", NULL),
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PWM_LOOKUP("s3c24xx-pwm.0", 0, "pwm-backlight.0", NULL),
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};
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};
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#ifdef CONFIG_DRM_EXYNOS
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#ifdef CONFIG_DRM_EXYNOS_FIMD
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static struct exynos_drm_fimd_pdata drm_fimd_pdata = {
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static struct exynos_drm_fimd_pdata drm_fimd_pdata = {
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.panel = {
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.panel = {
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.timing = {
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.timing = {
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@ -793,7 +793,7 @@ static void __init origen_machine_init(void)
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s5p_i2c_hdmiphy_set_platdata(NULL);
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s5p_i2c_hdmiphy_set_platdata(NULL);
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s5p_hdmi_set_platdata(&hdmiphy_info, NULL, 0);
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s5p_hdmi_set_platdata(&hdmiphy_info, NULL, 0);
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#ifdef CONFIG_DRM_EXYNOS
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#ifdef CONFIG_DRM_EXYNOS_FIMD
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s5p_device_fimd0.dev.platform_data = &drm_fimd_pdata;
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s5p_device_fimd0.dev.platform_data = &drm_fimd_pdata;
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exynos4_fimd0_gpio_setup_24bpp();
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exynos4_fimd0_gpio_setup_24bpp();
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#else
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#else
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@ -246,7 +246,7 @@ static struct samsung_keypad_platdata smdk4x12_keypad_data __initdata = {
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.cols = 8,
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.cols = 8,
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};
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};
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#ifdef CONFIG_DRM_EXYNOS
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#ifdef CONFIG_DRM_EXYNOS_FIMD
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static struct exynos_drm_fimd_pdata drm_fimd_pdata = {
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static struct exynos_drm_fimd_pdata drm_fimd_pdata = {
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.panel = {
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.panel = {
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.timing = {
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.timing = {
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@ -360,7 +360,7 @@ static void __init smdk4x12_machine_init(void)
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s3c_hsotg_set_platdata(&smdk4x12_hsotg_pdata);
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s3c_hsotg_set_platdata(&smdk4x12_hsotg_pdata);
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#ifdef CONFIG_DRM_EXYNOS
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#ifdef CONFIG_DRM_EXYNOS_FIMD
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s5p_device_fimd0.dev.platform_data = &drm_fimd_pdata;
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s5p_device_fimd0.dev.platform_data = &drm_fimd_pdata;
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exynos4_fimd0_gpio_setup_24bpp();
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exynos4_fimd0_gpio_setup_24bpp();
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#else
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#else
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@ -159,7 +159,7 @@ static struct platform_device smdkv310_lcd_lte480wv = {
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.dev.platform_data = &smdkv310_lcd_lte480wv_data,
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.dev.platform_data = &smdkv310_lcd_lte480wv_data,
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};
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};
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#ifdef CONFIG_DRM_EXYNOS
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#ifdef CONFIG_DRM_EXYNOS_FIMD
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static struct exynos_drm_fimd_pdata drm_fimd_pdata = {
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static struct exynos_drm_fimd_pdata drm_fimd_pdata = {
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.panel = {
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.panel = {
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.timing = {
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.timing = {
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@ -402,7 +402,7 @@ static void __init smdkv310_machine_init(void)
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samsung_bl_set(&smdkv310_bl_gpio_info, &smdkv310_bl_data);
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samsung_bl_set(&smdkv310_bl_gpio_info, &smdkv310_bl_data);
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pwm_add_table(smdkv310_pwm_lookup, ARRAY_SIZE(smdkv310_pwm_lookup));
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pwm_add_table(smdkv310_pwm_lookup, ARRAY_SIZE(smdkv310_pwm_lookup));
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#ifdef CONFIG_DRM_EXYNOS
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#ifdef CONFIG_DRM_EXYNOS_FIMD
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s5p_device_fimd0.dev.platform_data = &drm_fimd_pdata;
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s5p_device_fimd0.dev.platform_data = &drm_fimd_pdata;
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exynos4_fimd0_gpio_setup_24bpp();
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exynos4_fimd0_gpio_setup_24bpp();
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#else
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#else
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@ -198,7 +198,7 @@ static void __init exynos_smp_prepare_cpus(unsigned int max_cpus)
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{
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{
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int i;
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int i;
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if (!soc_is_exynos5250())
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if (!(soc_is_exynos5250() || soc_is_exynos5440()))
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scu_enable(scu_base_addr());
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scu_enable(scu_base_addr());
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/*
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/*
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@ -11,6 +11,9 @@
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* published by the Free Software Foundation.
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* published by the Free Software Foundation.
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*/
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*/
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#ifndef __PLAT_SAMSUNG_GPIO_CORE_H
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#define __PLAT_SAMSUNG_GPIO_CORE_H
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#define GPIOCON_OFF (0x00)
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#define GPIOCON_OFF (0x00)
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#define GPIODAT_OFF (0x04)
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#define GPIODAT_OFF (0x04)
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@ -124,3 +127,5 @@ extern struct samsung_gpio_pm samsung_gpio_pm_4bit;
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/* locking wrappers to deal with multiple access to the same gpio bank */
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/* locking wrappers to deal with multiple access to the same gpio bank */
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#define samsung_gpio_lock(_oc, _fl) spin_lock_irqsave(&(_oc)->lock, _fl)
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#define samsung_gpio_lock(_oc, _fl) spin_lock_irqsave(&(_oc)->lock, _fl)
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#define samsung_gpio_unlock(_oc, _fl) spin_unlock_irqrestore(&(_oc)->lock, _fl)
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#define samsung_gpio_unlock(_oc, _fl) spin_unlock_irqrestore(&(_oc)->lock, _fl)
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#endif /* __PLAT_SAMSUNG_GPIO_CORE_H */
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@ -117,7 +117,7 @@ struct exynos5440_pinctrl_priv_data {
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};
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};
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/* list of all possible config options supported */
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/* list of all possible config options supported */
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struct pin_config {
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static struct pin_config {
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char *prop_cfg;
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char *prop_cfg;
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unsigned int cfg_type;
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unsigned int cfg_type;
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} pcfgs[] = {
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} pcfgs[] = {
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@ -37,7 +37,7 @@
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#define FSUFFIX_LEN sizeof(FUNCTION_SUFFIX)
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#define FSUFFIX_LEN sizeof(FUNCTION_SUFFIX)
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/* list of all possible config options supported */
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/* list of all possible config options supported */
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struct pin_config {
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static struct pin_config {
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char *prop_cfg;
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char *prop_cfg;
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unsigned int cfg_type;
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unsigned int cfg_type;
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} pcfgs[] = {
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} pcfgs[] = {
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@ -104,7 +104,7 @@ struct samsung_pinctrl_drv_data;
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/**
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/**
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* struct samsung_pin_bank: represent a controller pin-bank.
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* struct samsung_pin_bank: represent a controller pin-bank.
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* @reg_offset: starting offset of the pin-bank registers.
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* @pctl_offset: starting offset of the pin-bank registers.
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* @pin_base: starting pin number of the bank.
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* @pin_base: starting pin number of the bank.
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* @nr_pins: number of pins included in this bank.
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* @nr_pins: number of pins included in this bank.
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* @func_width: width of the function selector bit field.
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* @func_width: width of the function selector bit field.
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