diff --git a/drivers/platform/msm/mhi/mhi_iface.c b/drivers/platform/msm/mhi/mhi_iface.c index b7785ba7e403..b6d38bfcd142 100644 --- a/drivers/platform/msm/mhi/mhi_iface.c +++ b/drivers/platform/msm/mhi/mhi_iface.c @@ -261,9 +261,14 @@ static int mhi_pci_probe(struct pci_dev *pcie_device, static int mhi_plat_probe(struct platform_device *pdev) { u32 nr_dev = mhi_devices.nr_of_devices; + int r = 0; mhi_log(MHI_MSG_INFO, "Entered\n"); mhi_devices.device_list[nr_dev].plat_dev = pdev; + r = dma_set_mask(&pdev->dev, MHI_DMA_MASK); + if (r) + mhi_log(MHI_MSG_CRITICAL, + "Failed to set mask for DMA ret %d\n", r); mhi_log(MHI_MSG_INFO, "Exited\n"); return 0; } diff --git a/drivers/platform/msm/mhi/mhi_main.c b/drivers/platform/msm/mhi/mhi_main.c index 3c7a5d31c396..b8e0a4446a25 100644 --- a/drivers/platform/msm/mhi/mhi_main.c +++ b/drivers/platform/msm/mhi/mhi_main.c @@ -1154,10 +1154,9 @@ int parse_xfer_event(struct mhi_device_ctxt *ctxt, "Done. Processed until: %lx.\n", (uintptr_t)trb_data_loc); break; - } else { - local_trb_loc = - (union mhi_xfer_pkt *)local_chan_ctxt->rp; } + local_trb_loc = + (union mhi_xfer_pkt *)local_chan_ctxt->rp; i++; } while (i < nr_trb_to_parse); break; @@ -1183,9 +1182,8 @@ int parse_xfer_event(struct mhi_device_ctxt *ctxt, db_value); } client_handle = mhi_dev_ctxt->client_handle_list[chan]; - if (NULL != client_handle) { + if (NULL != client_handle) result->transaction_status = -ENOTCONN; - } break; } case MHI_EVENT_CC_BAD_TRE: @@ -1435,9 +1433,9 @@ int parse_cmd_event(struct mhi_device_ctxt *mhi_dev_ctxt, case MHI_EVENT_CC_SUCCESS: { u32 chan = 0; + MHI_TRB_GET_INFO(CMD_TRB_CHID, cmd_pkt, chan); switch (MHI_TRB_READ_INFO(CMD_TRB_TYPE, cmd_pkt)) { - mhi_log(MHI_MSG_INFO, "CCE chan %d cmd %d\n", chan, MHI_TRB_READ_INFO(CMD_TRB_TYPE, cmd_pkt)); case MHI_PKT_TYPE_RESET_CHAN_CMD: diff --git a/include/linux/msm_mhi.h b/include/linux/msm_mhi.h index 765750396613..b8b2226940a4 100644 --- a/include/linux/msm_mhi.h +++ b/include/linux/msm_mhi.h @@ -15,7 +15,7 @@ struct mhi_client_handle; -#define MHI_DMA_MASK 0x3FFFFFFF +#define MHI_DMA_MASK 0xFFFFFFFFFFULL #define MHI_MAX_MTU 0xFFFF enum MHI_CLIENT_CHANNEL {