From f31be11ecb7d33f4dccfbcc358ca059b214b3c5c Mon Sep 17 00:00:00 2001 From: Yan He Date: Fri, 29 May 2015 14:31:29 -0700 Subject: [PATCH] msm: ep_pcie: disable debouncers Disable debouncers for PCIe endpoint mode. Change-Id: I504418193920861296d995bd898f01307e6dc518 Signed-off-by: Yan He --- drivers/platform/msm/ep_pcie/ep_pcie_com.h | 1 + drivers/platform/msm/ep_pcie/ep_pcie_core.c | 3 +++ 2 files changed, 4 insertions(+) diff --git a/drivers/platform/msm/ep_pcie/ep_pcie_com.h b/drivers/platform/msm/ep_pcie/ep_pcie_com.h index 6c4d69a2d459..131e0eaa31e1 100644 --- a/drivers/platform/msm/ep_pcie/ep_pcie_com.h +++ b/drivers/platform/msm/ep_pcie/ep_pcie_com.h @@ -24,6 +24,7 @@ #include #define PCIE20_PARF_SYS_CTRL 0x00 +#define PCIE20_PARF_DB_CTRL 0x10 #define PCIE20_PARF_PM_CTRL 0x20 #define PCIE20_PARF_PM_STTS 0x24 #define PCIE20_PARF_PHY_CTRL 0x40 diff --git a/drivers/platform/msm/ep_pcie/ep_pcie_core.c b/drivers/platform/msm/ep_pcie/ep_pcie_core.c index 2a646c166d7f..0b8517e5b8b7 100644 --- a/drivers/platform/msm/ep_pcie/ep_pcie_core.c +++ b/drivers/platform/msm/ep_pcie/ep_pcie_core.c @@ -489,6 +489,9 @@ static void ep_pcie_core_init(struct ep_pcie_dev_t *dev) /* Disable the DBI Wakeup */ ep_pcie_write_mask(dev->parf + PCIE20_PARF_SYS_CTRL, BIT(11), 0); + /* Disable the debouncers */ + ep_pcie_write_reg(dev->parf, PCIE20_PARF_DB_CTRL, 0x73); + /* Disable core clock CGC */ ep_pcie_write_mask(dev->parf + PCIE20_PARF_SYS_CTRL, 0, BIT(6));