arm64: Mask out 16KB granule in MMFR register
Memory model feature register specifies the supported page granules. Some ARM cpus may have support for 16KB granules. However currently we donot support 16KB pages sizes. Explicitly mask off that capability if advertised by the cpu. Change-Id: I7daf3f179a5ce103aec7cf103ac198cf64800543 Signed-off-by: Hanumant Singh <hanumant@codeaurora.org>
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2 changed files with 10 additions and 1 deletions
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@ -32,6 +32,10 @@
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#define MPIDR_AFFINITY_LEVEL(mpidr, level) \
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((mpidr >> MPIDR_LEVEL_SHIFT(level)) & MPIDR_LEVEL_MASK)
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#define MMFR0_16KGRAN_SIZE 15
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#define MMFR0_16KGRAN_SHFT 20
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#define MMFR0_EL1_16KGRAN_MASK (MMFR0_16KGRAN_SIZE << MMFR0_16KGRAN_SHFT)
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#define read_cpuid(reg) ({ \
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u64 __val; \
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asm("mrs %0, " #reg : "=r" (__val)); \
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@ -208,7 +208,12 @@ static void __cpuinfo_store_cpu(struct cpuinfo_arm64 *info)
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info->reg_id_aa64dfr1 = read_cpuid(ID_AA64DFR1_EL1);
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info->reg_id_aa64isar0 = read_cpuid(ID_AA64ISAR0_EL1);
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info->reg_id_aa64isar1 = read_cpuid(ID_AA64ISAR1_EL1);
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info->reg_id_aa64mmfr0 = read_cpuid(ID_AA64MMFR0_EL1);
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/*
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* Explicitly mask out 16KB granule since we donot
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* want to support it
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*/
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info->reg_id_aa64mmfr0 = read_cpuid(ID_AA64MMFR0_EL1) &
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(~MMFR0_EL1_16KGRAN_MASK);
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info->reg_id_aa64mmfr1 = read_cpuid(ID_AA64MMFR1_EL1);
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info->reg_id_aa64pfr0 = read_cpuid(ID_AA64PFR0_EL1);
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info->reg_id_aa64pfr1 = read_cpuid(ID_AA64PFR1_EL1);
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