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Merge "ARM: dts: msm: update CPU efficiency values for sdm660"

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Linux Build Service Account 2017-02-16 03:05:23 -08:00 • committed by Gerrit - the friendly Code Review server
commit f44d9e364a
1 changed files with 4 additions and 4 deletions
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arch/arm/boot/dts/qcom/sdm660.dtsi
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@ -152,7 +152,7 @@
qcom,limits-info = <&mitigation_profile1>; qcom,limits-info = <&mitigation_profile1>;
qcom,lmh-dcvs = <&lmh_dcvs1>; qcom,lmh-dcvs = <&lmh_dcvs1>;
qcom,ea = <&ea4>; qcom,ea = <&ea4>;
efficiency = <1536>; efficiency = <1638>;
next-level-cache = <&L2_1>; next-level-cache = <&L2_1>;
L2_1: l2-cache { L2_1: l2-cache {
compatible = "arm,arch-cache"; compatible = "arm,arch-cache";
@ -179,7 +179,7 @@
qcom,limits-info = <&mitigation_profile2>; qcom,limits-info = <&mitigation_profile2>;
qcom,lmh-dcvs = <&lmh_dcvs1>; qcom,lmh-dcvs = <&lmh_dcvs1>;
qcom,ea = <&ea5>; qcom,ea = <&ea5>;
efficiency = <1536>; efficiency = <1638>;
next-level-cache = <&L2_1>; next-level-cache = <&L2_1>;
L1_I_101: l1-icache { L1_I_101: l1-icache {
compatible = "arm,arch-cache"; compatible = "arm,arch-cache";
@ -202,7 +202,7 @@
qcom,limits-info = <&mitigation_profile3>; qcom,limits-info = <&mitigation_profile3>;
qcom,lmh-dcvs = <&lmh_dcvs1>; qcom,lmh-dcvs = <&lmh_dcvs1>;
qcom,ea = <&ea6>; qcom,ea = <&ea6>;
efficiency = <1536>; efficiency = <1638>;
next-level-cache = <&L2_1>; next-level-cache = <&L2_1>;
L1_I_102: l1-icache { L1_I_102: l1-icache {
compatible = "arm,arch-cache"; compatible = "arm,arch-cache";
@ -225,7 +225,7 @@
qcom,limits-info = <&mitigation_profile4>; qcom,limits-info = <&mitigation_profile4>;
qcom,lmh-dcvs = <&lmh_dcvs1>; qcom,lmh-dcvs = <&lmh_dcvs1>;
qcom,ea = <&ea7>; qcom,ea = <&ea7>;
efficiency = <1536>; efficiency = <1638>;
next-level-cache = <&L2_1>; next-level-cache = <&L2_1>;
L1_I_103: l1-icache { L1_I_103: l1-icache {
compatible = "arm,arch-cache"; compatible = "arm,arch-cache";