diff --git a/arch/arm/boot/dts/qcom/msm8996-blsp.dtsi b/arch/arm/boot/dts/qcom/msm8996-blsp.dtsi new file mode 100644 index 000000000000..a6bf6b5189fe --- /dev/null +++ b/arch/arm/boot/dts/qcom/msm8996-blsp.dtsi @@ -0,0 +1,174 @@ +/* + * Copyright (c) 2015, The Linux Foundation. All rights reserved. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 and + * only version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ +/ { + aliases { + spi9 = &spi_9; + spi10 = &spi_10; + spi12 = &spi_12; + }; +}; + +&soc { + blsp1_uart3: uart@7571000 { /* BLSP1 UART3 */ + compatible = "qcom,msm-hsuart-v14"; + reg = <0x7571000 0x200>, + <0x7544000 0x2b000>; + reg-names = "core_mem", "bam_mem"; + interrupt-names = "core_irq", "bam_irq", "wakeup_irq"; + #address-cells = <0>; + interrupt-parent = <&blsp1_uart3>; + interrupts = <0 1 2>; + #interrupt-cells = <1>; + interrupt-map-mask = <0xffffffff>; + interrupt-map = <0 &intc 0 109 0 + 1 &intc 0 238 0 + 2 &tlmm 42 0>; + + qcom,inject-rx-on-wakeup; + qcom,rx-char-to-inject = <0xFD>; + + qcom,bam-tx-ep-pipe-index = <4>; + qcom,bam-rx-ep-pipe-index = <5>; + qcom,master-id = <86>; + clock-names = "core_clk", "iface_clk"; + clocks = <&clock_gcc clk_gcc_blsp1_uart3_apps_clk>, + <&clock_gcc clk_gcc_blsp1_ahb_clk>; + pinctrl-names = "sleep", "default"; + pinctrl-0 = <&blsp1_uart3_sleep>; + pinctrl-1 = <&blsp1_uart3_active>; + + qcom,msm-bus,name = "buart3"; + qcom,msm-bus,num-cases = <2>; + qcom,msm-bus,num-paths = <1>; + qcom,msm-bus,vectors-KBps = + <86 512 0 0>, + <86 512 500 800>; + status = "disabled"; + }; + + + blsp1_uart6: uart@7574000 { /* BLSP1 UART6 */ + compatible = "qcom,msm-hsuart-v14"; + reg = <0x7574000 0x200>, + <0x7544000 0x2b000>; + reg-names = "core_mem", "bam_mem"; + interrupt-names = "core_irq", "bam_irq", "wakeup_irq"; + #address-cells = <0>; + interrupt-parent = <&blsp1_uart6>; + interrupts = <0 1 2>; + #interrupt-cells = <1>; + interrupt-map-mask = <0xffffffff>; + interrupt-map = <0 &intc 0 112 0 + 1 &intc 0 238 0 + 2 &tlmm 42 0>; + + qcom,inject-rx-on-wakeup; + qcom,rx-char-to-inject = <0xFD>; + + qcom,bam-tx-ep-pipe-index = <10>; + qcom,bam-rx-ep-pipe-index = <11>; + qcom,master-id = <86>; + clock-names = "core_clk", "iface_clk"; + clocks = <&clock_gcc clk_gcc_blsp1_uart6_apps_clk>, + <&clock_gcc clk_gcc_blsp1_ahb_clk>; + pinctrl-names = "sleep", "default"; + pinctrl-0 = <&blsp1_uart6_sleep>; + pinctrl-1 = <&blsp1_uart6_active>; + + qcom,msm-bus,name = "buart6"; + qcom,msm-bus,num-cases = <2>; + qcom,msm-bus,num-paths = <1>; + qcom,msm-bus,vectors-KBps = + <86 512 0 0>, + <86 512 500 800>; + status = "disabled"; + }; + + spi_9: spi@75B7000 { /* BLSP2 QUP3 */ + compatible = "qcom,spi-qup-v2"; + #address-cells = <1>; + #size-cells = <0>; + reg-names = "spi_physical", "spi_bam_physical"; + reg = <0x075B7000 0x600>, + <0x07584000 0x2b000>; + interrupt-names = "spi_irq", "spi_bam_irq"; + interrupts = <0 103 0>, <0 239 0>; + spi-max-frequency = <19200000>; + qcom,infinite-mode = <0>; + qcom,ver-reg-exists; + + qcom,bam-consumer-pipe-index = <16>; + qcom,bam-producer-pipe-index = <17>; + qcom,master-id = <84>; + qcom,use-pinctrl; + pinctrl-names = "spi_default", "spi_sleep"; + pinctrl-0 = <&spi_9_active>; + pinctrl-1 = <&spi_9_sleep>; + clock-names = "iface_clk", "core_clk"; + clocks = <&clock_gcc clk_gcc_blsp2_ahb_clk>, + <&clock_gcc clk_gcc_blsp2_qup3_spi_apps_clk>; + status = "disabled"; + }; + + spi_10: spi@75B8000 { /* BLSP2 QUP4 */ + compatible = "qcom,spi-qup-v2"; + #address-cells = <1>; + #size-cells = <0>; + reg-names = "spi_physical", "spi_bam_physical"; + reg = <0x075B8000 0x600>, + <0x07584000 0x2b000>; + interrupt-names = "spi_irq", "spi_bam_irq"; + interrupts = <0 104 0>, <0 239 0>; + spi-max-frequency = <19200000>; + qcom,infinite-mode = <0>; + qcom,ver-reg-exists; + + qcom,bam-consumer-pipe-index = <18>; + qcom,bam-producer-pipe-index = <19>; + qcom,master-id = <84>; + qcom,use-pinctrl; + pinctrl-names = "spi_default", "spi_sleep"; + pinctrl-0 = <&spi_10_active>; + pinctrl-1 = <&spi_10_sleep>; + clock-names = "iface_clk", "core_clk"; + clocks = <&clock_gcc clk_gcc_blsp2_ahb_clk>, + <&clock_gcc clk_gcc_blsp2_qup4_spi_apps_clk>; + status = "disabled"; + }; + + spi_12: spi@75BA000 { /* BLSP2 QUP6 */ + compatible = "qcom,spi-qup-v2"; + #address-cells = <1>; + #size-cells = <0>; + reg-names = "spi_physical", "spi_bam_physical"; + reg = <0x075BA000 0x600>, + <0x07584000 0x2b000>; + interrupt-names = "spi_irq", "spi_bam_irq"; + interrupts = <0 106 0>, <0 239 0>; + spi-max-frequency = <19200000>; + qcom,infinite-mode = <0>; + qcom,ver-reg-exists; + + qcom,bam-consumer-pipe-index = <22>; + qcom,bam-producer-pipe-index = <23>; + qcom,master-id = <84>; + qcom,use-pinctrl; + pinctrl-names = "spi_default", "spi_sleep"; + pinctrl-0 = <&spi_12_active>; + pinctrl-1 = <&spi_12_sleep>; + clock-names = "iface_clk", "core_clk"; + clocks = <&clock_gcc clk_gcc_blsp2_ahb_clk>, + <&clock_gcc clk_gcc_blsp2_qup6_spi_apps_clk>; + status = "disabled"; + }; +}; diff --git a/arch/arm/boot/dts/qcom/msm8996-pinctrl.dtsi b/arch/arm/boot/dts/qcom/msm8996-pinctrl.dtsi index 421c98ac904e..a5ee06b62b0b 100644 --- a/arch/arm/boot/dts/qcom/msm8996-pinctrl.dtsi +++ b/arch/arm/boot/dts/qcom/msm8996-pinctrl.dtsi @@ -217,6 +217,61 @@ }; }; + + blsp1_uart3_active: blsp1_uart3_active { + mux { + pins = "gpio45", "gpio46", "gpio47", "gpio48"; + function = "blsp_uart3"; + }; + + config { + pins = "gpio45", "gpio46", "gpio47", "gpio48"; + drive-strength = <2>; + bias-disable; + }; + }; + + blsp1_uart3_sleep: blsp1_uart3_sleep { + mux { + pins = "gpio45", "gpio46", "gpio47", "gpio48"; + function = "gpio"; + }; + + config { + pins = "gpio45", "gpio46", "gpio47", "gpio48"; + drive-strength = <2>; + bias-disable; + }; + }; + + + blsp1_uart6_active: blsp1_uart6_active { + mux { + pins = "gpio25", "gpio26", "gpio27", "gpio28"; + function = "blsp_uart6"; + }; + + config { + pins = "gpio25", "gpio26", "gpio27", "gpio28"; + drive-strength = <2>; + bias-disable; + }; + }; + + blsp1_uart6_sleep: blsp1_uart6_sleep { + mux { + pins = "gpio25", "gpio26", "gpio27", "gpio28"; + function = "gpio"; + }; + + config { + pins = "gpio25", "gpio26", "gpio27", "gpio28"; + drive-strength = <2>; + bias-disable; + }; + }; + + pmx_mdss: pmx_mdss { mdss_dsi_active: mdss_dsi_active { mux { @@ -931,6 +986,102 @@ }; }; + spi_9 { + spi_9_active: spi_9_active { + mux { + pins = "gpio49", "gpio50", "gpio51", + "gpio52"; + function = "blsp_spi9"; + }; + + config { + pins = "gpio49", "gpio50", "gpio51", + "gpio52"; + drive-strength = <6>; + bias-disable; + }; + }; + + spi_9_sleep: spi_9_sleep { + mux { + pins = "gpio49", "gpio50", "gpio51", + "gpio52"; + function = "blsp_spi9"; + }; + + config { + pins = "gpio49", "gpio50", "gpio51", + "gpio52"; + drive-strength = <6>; + bias-disable; + }; + }; + }; + + spi_10 { + spi_10_active: spi_10_active { + mux { + pins = "gpio8", "gpio9", "gpio10", + "gpio11"; + function = "blsp_spi10"; + }; + + config { + pins = "gpio8", "gpio9", "gpio10", + "gpio11"; + drive-strength = <6>; + bias-disable; + }; + }; + + spi_10_sleep: spi_10_sleep { + mux { + pins = "gpio8", "gpio9", "gpio10", + "gpio11"; + function = "blsp_spi10"; + }; + + config { + pins = "gpio8", "gpio9", "gpio10", + "gpio11"; + drive-strength = <6>; + bias-disable; + }; + }; + }; + + spi_12 { + spi_12_active: spi_12_active { + mux { + pins = "gpio85", "gpio86", "gpio87", + "gpio88"; + function = "blsp_spi12"; + }; + + config { + pins = "gpio85", "gpio86", "gpio87", + "gpio88"; + drive-strength = <6>; + bias-disable; + }; + }; + + spi_12_sleep: spi_12_sleep { + mux { + pins = "gpio85", "gpio86", "gpio87", + "gpio88"; + function = "blsp_spi12"; + }; + + config { + pins = "gpio85", "gpio86", "gpio87", + "gpio88"; + drive-strength = <6>; + bias-disable; + }; + }; + }; + pcie0 { pcie0_clkreq_default: pcie0_clkreq_default { mux { diff --git a/arch/arm/boot/dts/qcom/msm8996.dtsi b/arch/arm/boot/dts/qcom/msm8996.dtsi index eb31bff88a3a..4ed20ee205f3 100644 --- a/arch/arm/boot/dts/qcom/msm8996.dtsi +++ b/arch/arm/boot/dts/qcom/msm8996.dtsi @@ -233,6 +233,7 @@ #include "msm-gdsc-8996.dtsi" #include "msm8996-bus.dtsi" #include "msm-rdbg.dtsi" +#include "msm8996-blsp.dtsi" &soc { #address-cells = <1>;