PM / devfreq: Bandwidth driver
This is a snapshot of the Bandwidth driver as of msm-3.10 commit: acdce027751d5a7488b283f0ce3111f873a5816d (Merge "defconfig: arm64: Enable ONESHOT_SYNC for msm8994") Signed-off-by: Kumar Gala <galak@codeaurora.org> [junjiew@codeaurora.org: resolved conflicts] Signed-off-by: Junjie Wu <junjiew@codeaurora.org> Change-Id: I30d48abdfe19a421b4d05003c56c47423c6d0456
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@ -146,6 +146,20 @@ config DEVFREQ_SIMPLE_DEV
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Device driver for simple devices that control their frequency using
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clock APIs and don't have any form of status reporting.
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config MSM_DEVFREQ_DEVBW
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bool "MSM DEVFREQ device for device master <-> slave IB/AB BW voting"
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depends on ARCH_MSM
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select DEVFREQ_GOV_PERFORMANCE
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select DEVFREQ_GOV_POWERSAVE
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select DEVFREQ_GOV_USERSPACE
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select DEVFREQ_GOV_CPUFREQ
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default n
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help
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Different devfreq governors use this devfreq device to make CPU to
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DDR IB/AB bandwidth votes. This driver provides a SoC topology
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agnostic interface to so that some of the devfreq governors can be
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shared across SoCs.
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source "drivers/devfreq/event/Kconfig"
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endif # PM_DEVFREQ
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@ -14,6 +14,7 @@ obj-$(CONFIG_DEVFREQ_GOV_MSM_CACHE_HWMON) += governor_cache_hwmon.o
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obj-$(CONFIG_ARM_EXYNOS4_BUS_DEVFREQ) += exynos/
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obj-$(CONFIG_ARM_EXYNOS5_BUS_DEVFREQ) += exynos/
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obj-$(CONFIG_ARM_TEGRA_DEVFREQ) += tegra-devfreq.o
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obj-$(CONFIG_MSM_DEVFREQ_DEVBW) += devfreq_devbw.o
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obj-$(CONFIG_DEVFREQ_SIMPLE_DEV) += devfreq_simple_dev.o
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# DEVFREQ Event Drivers
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258
drivers/devfreq/devfreq_devbw.c
Normal file
258
drivers/devfreq/devfreq_devbw.c
Normal file
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@ -0,0 +1,258 @@
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/*
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* Copyright (c) 2013-2014, The Linux Foundation. All rights reserved.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 and
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* only version 2 as published by the Free Software Foundation.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*/
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#define pr_fmt(fmt) "devbw: " fmt
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#include <linux/kernel.h>
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#include <linux/module.h>
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#include <linux/init.h>
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#include <linux/io.h>
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#include <linux/delay.h>
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#include <linux/ktime.h>
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#include <linux/time.h>
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#include <linux/err.h>
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#include <linux/errno.h>
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#include <linux/mutex.h>
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#include <linux/interrupt.h>
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#include <linux/devfreq.h>
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#include <linux/of.h>
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#include <trace/events/power.h>
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#include <linux/msm-bus.h>
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#include <linux/msm-bus-board.h>
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/* Has to be ULL to prevent overflow where this macro is used. */
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#define MBYTE (1ULL << 20)
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#define MAX_PATHS 2
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#define DBL_BUF 2
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struct dev_data {
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struct msm_bus_vectors vectors[MAX_PATHS * DBL_BUF];
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struct msm_bus_paths bw_levels[DBL_BUF];
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struct msm_bus_scale_pdata bw_data;
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int num_paths;
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u32 bus_client;
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int cur_idx;
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int cur_ab;
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int cur_ib;
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long gov_ab;
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struct devfreq *df;
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struct devfreq_dev_profile dp;
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};
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static int set_bw(struct device *dev, int new_ib, int new_ab)
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{
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struct dev_data *d = dev_get_drvdata(dev);
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int i, ret;
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if (d->cur_ib == new_ib && d->cur_ab == new_ab)
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return 0;
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i = (d->cur_idx + 1) % DBL_BUF;
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d->bw_levels[i].vectors[0].ib = new_ib * MBYTE;
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d->bw_levels[i].vectors[0].ab = new_ab / d->num_paths * MBYTE;
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d->bw_levels[i].vectors[1].ib = new_ib * MBYTE;
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d->bw_levels[i].vectors[1].ab = new_ab / d->num_paths * MBYTE;
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dev_dbg(dev, "BW MBps: AB: %d IB: %d\n", new_ab, new_ib);
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ret = msm_bus_scale_client_update_request(d->bus_client, i);
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if (ret) {
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dev_err(dev, "bandwidth request failed (%d)\n", ret);
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} else {
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d->cur_idx = i;
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d->cur_ib = new_ib;
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d->cur_ab = new_ab;
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}
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return ret;
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}
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static void find_freq(struct devfreq_dev_profile *p, unsigned long *freq,
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u32 flags)
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{
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int i;
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unsigned long atmost, atleast, f;
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atmost = p->freq_table[0];
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atleast = p->freq_table[p->max_state-1];
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for (i = 0; i < p->max_state; i++) {
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f = p->freq_table[i];
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if (f <= *freq)
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atmost = max(f, atmost);
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if (f >= *freq)
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atleast = min(f, atleast);
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}
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if (flags & DEVFREQ_FLAG_LEAST_UPPER_BOUND)
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*freq = atmost;
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else
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*freq = atleast;
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}
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static int devbw_target(struct device *dev, unsigned long *freq, u32 flags)
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{
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struct dev_data *d = dev_get_drvdata(dev);
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find_freq(&d->dp, freq, flags);
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return set_bw(dev, *freq, d->gov_ab);
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}
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static int devbw_get_dev_status(struct device *dev,
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struct devfreq_dev_status *stat)
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{
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struct dev_data *d = dev_get_drvdata(dev);
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stat->private_data = &d->gov_ab;
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return 0;
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}
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#define PROP_PORTS "qcom,src-dst-ports"
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#define PROP_TBL "qcom,bw-tbl"
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#define PROP_ACTIVE "qcom,active-only"
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int devfreq_add_devbw(struct device *dev)
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{
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struct dev_data *d;
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struct devfreq_dev_profile *p;
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u32 *data, ports[MAX_PATHS * 2];
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const char *gov_name;
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int ret, len, i, num_paths;
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d = devm_kzalloc(dev, sizeof(*d), GFP_KERNEL);
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if (!d)
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return -ENOMEM;
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dev_set_drvdata(dev, d);
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if (of_find_property(dev->of_node, PROP_PORTS, &len)) {
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len /= sizeof(ports[0]);
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if (len % 2 || len > ARRAY_SIZE(ports)) {
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dev_err(dev, "Unexpected number of ports\n");
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return -EINVAL;
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}
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ret = of_property_read_u32_array(dev->of_node, PROP_PORTS,
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ports, len);
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if (ret)
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return ret;
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num_paths = len / 2;
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} else {
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return -EINVAL;
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}
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d->bw_levels[0].vectors = &d->vectors[0];
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d->bw_levels[1].vectors = &d->vectors[MAX_PATHS];
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d->bw_data.usecase = d->bw_levels;
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d->bw_data.num_usecases = ARRAY_SIZE(d->bw_levels);
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d->bw_data.name = dev_name(dev);
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d->bw_data.active_only = of_property_read_bool(dev->of_node,
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PROP_ACTIVE);
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for (i = 0; i < num_paths; i++) {
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d->bw_levels[0].vectors[i].src = ports[2 * i];
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d->bw_levels[0].vectors[i].dst = ports[2 * i + 1];
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d->bw_levels[1].vectors[i].src = ports[2 * i];
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d->bw_levels[1].vectors[i].dst = ports[2 * i + 1];
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}
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d->bw_levels[0].num_paths = num_paths;
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d->bw_levels[1].num_paths = num_paths;
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d->num_paths = num_paths;
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p = &d->dp;
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p->polling_ms = 50;
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p->target = devbw_target;
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p->get_dev_status = devbw_get_dev_status;
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if (of_find_property(dev->of_node, PROP_TBL, &len)) {
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len /= sizeof(*data);
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data = devm_kzalloc(dev, len * sizeof(*data), GFP_KERNEL);
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if (!data)
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return -ENOMEM;
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p->freq_table = devm_kzalloc(dev,
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len * sizeof(*p->freq_table),
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GFP_KERNEL);
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if (!p->freq_table)
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return -ENOMEM;
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ret = of_property_read_u32_array(dev->of_node, PROP_TBL,
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data, len);
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if (ret)
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return ret;
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for (i = 0; i < len; i++)
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p->freq_table[i] = data[i];
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p->max_state = len;
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}
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d->bus_client = msm_bus_scale_register_client(&d->bw_data);
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if (!d->bus_client) {
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dev_err(dev, "Unable to register bus client\n");
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return -ENODEV;
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}
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if (of_property_read_string(dev->of_node, "governor", &gov_name))
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gov_name = "performance";
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d->df = devfreq_add_device(dev, p, gov_name, NULL);
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if (IS_ERR(d->df)) {
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msm_bus_scale_unregister_client(d->bus_client);
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return PTR_ERR(d->df);
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}
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return 0;
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}
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static int devfreq_devbw_probe(struct platform_device *pdev)
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{
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return devfreq_add_devbw(&pdev->dev);
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}
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int devfreq_remove_devbw(struct device *dev)
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{
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struct dev_data *d = dev_get_drvdata(dev);
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msm_bus_scale_unregister_client(d->bus_client);
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devfreq_remove_device(d->df);
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return 0;
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}
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static int devfreq_devbw_remove(struct platform_device *pdev)
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{
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return devfreq_remove_devbw(&pdev->dev);
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}
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static struct of_device_id match_table[] = {
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{ .compatible = "qcom,devbw" },
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{}
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};
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static struct platform_driver devbw_driver = {
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.probe = devfreq_devbw_probe,
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.remove = devfreq_devbw_remove,
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.driver = {
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.name = "devbw",
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.of_match_table = match_table,
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.owner = THIS_MODULE,
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},
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};
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static int __init devbw_init(void)
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{
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platform_driver_register(&devbw_driver);
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return 0;
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}
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device_initcall(devbw_init);
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MODULE_DESCRIPTION("Device DDR bandwidth voting driver MSM SoCs");
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MODULE_LICENSE("GPL v2");
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