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Merge "clk: msm: gcc-cobalt: Remove support for wcss clocks"

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Linux Build Service Account 2016-08-26 22:22:50 -07:00 • committed by Gerrit - the friendly Code Review server
commit f6b34d14bd
3 changed files with 0 additions and 56 deletions
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48
drivers/clk/msm/clock-gcc-cobalt.c
View file

@ -2227,50 +2227,6 @@ static struct reset_clk gcc_qusb2phy_sec_reset = {
},
};
static struct branch_clk gcc_wcss_ahb_s0_clk = {
.cbcr_reg = GCC_WCSS_AHB_S0_CBCR,
.has_sibling = 1,
.base = &virt_base,
.c = {
.dbg_name = "gcc_wcss_ahb_s0_clk",
.ops = &clk_ops_branch,
CLK_INIT(gcc_wcss_ahb_s0_clk.c),
},
};
static struct branch_clk gcc_wcss_axi_m_clk = {
.cbcr_reg = GCC_WCSS_AXI_M_CBCR,
.has_sibling = 1,
.base = &virt_base,
.c = {
.dbg_name = "gcc_wcss_axi_m_clk",
.ops = &clk_ops_branch,
CLK_INIT(gcc_wcss_axi_m_clk.c),
},
};
static struct branch_clk gcc_wcss_ecahb_clk = {
.cbcr_reg = GCC_WCSS_ECAHB_CBCR,
.has_sibling = 1,
.base = &virt_base,
.c = {
.dbg_name = "gcc_wcss_ecahb_clk",
.ops = &clk_ops_branch,
CLK_INIT(gcc_wcss_ecahb_clk.c),
},
};
static struct branch_clk gcc_wcss_shdreg_ahb_clk = {
.cbcr_reg = GCC_WCSS_SHDREG_AHB_CBCR,
.has_sibling = 1,
.base = &virt_base,
.c = {
.dbg_name = "gcc_wcss_shdreg_ahb_clk",
.ops = &clk_ops_branch,
CLK_INIT(gcc_wcss_shdreg_ahb_clk.c),
},
};
static struct branch_clk gcc_mss_cfg_ahb_clk = {
.cbcr_reg = GCC_MSS_CFG_AHB_CBCR,
.has_sibling = 1,
@ -2723,10 +2679,6 @@ static struct clk_lookup msm_clocks_gcc_cobalt[] = {
CLK_LIST(gcc_usb3_phy_pipe_clk),
CLK_LIST(gcc_prng_ahb_clk),
CLK_LIST(gcc_boot_rom_ahb_clk),
CLK_LIST(gcc_wcss_ahb_s0_clk),
CLK_LIST(gcc_wcss_axi_m_clk),
CLK_LIST(gcc_wcss_ecahb_clk),
CLK_LIST(gcc_wcss_shdreg_ahb_clk),
CLK_LIST(gcc_mss_cfg_ahb_clk),
CLK_LIST(gcc_mss_q6_bimc_axi_clk),
CLK_LIST(gcc_mss_mnoc_bimc_axi_clk),

4
include/dt-bindings/clock/msm-clocks-cobalt.h
View file

@ -244,9 +244,6 @@
#define clk_gcc_usb30_sleep_clk 0xd0b65c92
#define clk_gcc_usb3_phy_aux_clk 0x0d9a36e0
#define clk_gcc_usb3_phy_pipe_clk 0xf279aff2
#define clk_gcc_wcss_ahb_s0_clk 0x639a01c4
#define clk_gcc_wcss_axi_m_clk 0xabc48ebd
#define clk_gcc_wcss_ecahb_clk 0xf1815ce9
#define clk_gcc_usb3_clkref_clk 0xb6cc8f00
#define clk_gcc_hdmi_clkref_clk 0x4d4eec04
#define clk_gcc_edp_clkref_clk 0xa8685c3f
@ -260,7 +257,6 @@
#define clk_gcc_qusb2phy_prim_reset 0x07550fa1
#define clk_gcc_qusb2phy_sec_reset 0x3f3a87d0
#define clk_gcc_mmss_noc_cfg_ahb_clk 0xb41a9d99
#define clk_gcc_wcss_shdreg_ahb_clk 0x33459c85
#define clk_gcc_dcc_ahb_clk 0xfa14a88c
#define clk_hlos1_vote_lpass_core_smmu_clk 0x3aaa1743
#define clk_hlos1_vote_lpass_adsp_smmu_clk 0xc76f702f

4
include/dt-bindings/clock/msm-clocks-hwio-cobalt.h
View file

@ -213,10 +213,6 @@
#define GCC_USB3_PHY_AUX_CBCR 0x50000
#define GCC_USB3_PHY_PIPE_CBCR 0x50004
#define GCC_USB3PHY_PHY_BCR 0x50024
#define GCC_WCSS_AHB_S0_CBCR 0x11004
#define GCC_WCSS_AXI_M_CBCR 0x11008
#define GCC_WCSS_ECAHB_CBCR 0x1100C
#define GCC_WCSS_SHDREG_AHB_CBCR 0x11010
#define GCC_APCS_CLOCK_SLEEP_ENA_VOTE 0x52008
#define GCC_MSS_CFG_AHB_CBCR 0x8A000
#define GCC_MSS_Q6_BIMC_AXI_CBCR 0x8A040