From f76e7d00c79b66ac479c5fd8e33191705bc577f9 Mon Sep 17 00:00:00 2001 From: Subhash Jadavani Date: Thu, 23 Oct 2014 17:11:33 -0700 Subject: [PATCH] drivers: phy: qcom: make "ref_clk_parent" clock as optional On some chipsets, "ref_clk_parent" clock is not required for the UFS PHY ref_clk activation hence change this property as optional. Change-Id: I487fa7c4da7e64e3fb4d0321cc8296dca5091eb3 Signed-off-by: Subhash Jadavani [gbroner@codeaurora.org: fix minor conflicts] Signed-off-by: Gilad Broner [venkatg@codeaurora.org: resolved trivial merge conflict] Signed-off-by: Venkat Gopalakrishnan --- drivers/phy/phy-qcom-ufs.c | 43 +++++++++++++++++++++++++------------- 1 file changed, 29 insertions(+), 14 deletions(-) diff --git a/drivers/phy/phy-qcom-ufs.c b/drivers/phy/phy-qcom-ufs.c index a8a45dd09036..d3574c20d9ee 100644 --- a/drivers/phy/phy-qcom-ufs.c +++ b/drivers/phy/phy-qcom-ufs.c @@ -157,8 +157,8 @@ out: return err; } -int ufs_qcom_phy_clk_get(struct phy *phy, - const char *name, struct clk **clk_out) +static int __ufs_qcom_phy_clk_get(struct phy *phy, + const char *name, struct clk **clk_out, bool err_print) { struct clk *clk; int err = 0; @@ -168,7 +168,8 @@ int ufs_qcom_phy_clk_get(struct phy *phy, clk = devm_clk_get(dev, name); if (IS_ERR(clk)) { err = PTR_ERR(clk); - dev_err(dev, "failed to get %s err %d", name, err); + if (err_print) + dev_err(dev, "failed to get %s err %d", name, err); } else { *clk_out = clk; } @@ -204,10 +205,12 @@ ufs_qcom_phy_init_clks(struct phy *generic_phy, if (err) goto out; - err = ufs_qcom_phy_clk_get(generic_phy, "ref_clk_parent", - &phy_common->ref_clk_parent); - if (err) - goto out; + /* + * "ref_clk_parent" is optional hence don't abort init if it's not + * found. + */ + __ufs_qcom_phy_clk_get(generic_phy, "ref_clk_parent", + &phy_common->ref_clk_parent, false); err = ufs_qcom_phy_clk_get(generic_phy, "ref_clk", &phy_common->ref_clk); @@ -382,11 +385,17 @@ int ufs_qcom_phy_enable_ref_clk(struct phy *generic_phy) goto out; } - ret = clk_prepare_enable(phy->ref_clk_parent); - if (ret) { - dev_err(phy->dev, "%s: ref_clk_parent enable failed %d\n", - __func__, ret); - goto out_disable_src; + /* + * "ref_clk_parent" is optional clock hence make sure that clk reference + * is available before trying to enable the clock. + */ + if (phy->ref_clk_parent) { + ret = clk_prepare_enable(phy->ref_clk_parent); + if (ret) { + dev_err(phy->dev, "%s: ref_clk_parent enable failed %d\n", + __func__, ret); + goto out_disable_src; + } } ret = clk_prepare_enable(phy->ref_clk); @@ -400,7 +409,8 @@ int ufs_qcom_phy_enable_ref_clk(struct phy *generic_phy) goto out; out_disable_parent: - clk_disable_unprepare(phy->ref_clk_parent); + if (phy->ref_clk_parent) + clk_disable_unprepare(phy->ref_clk_parent); out_disable_src: clk_disable_unprepare(phy->ref_clk_src); out: @@ -438,7 +448,12 @@ void ufs_qcom_phy_disable_ref_clk(struct phy *generic_phy) if (phy->is_ref_clk_enabled) { clk_disable_unprepare(phy->ref_clk); - clk_disable_unprepare(phy->ref_clk_parent); + /* + * "ref_clk_parent" is optional clock hence make sure that clk + * reference is available before trying to disable the clock. + */ + if (phy->ref_clk_parent) + clk_disable_unprepare(phy->ref_clk_parent); clk_disable_unprepare(phy->ref_clk_src); phy->is_ref_clk_enabled = false; }