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ARM: dts: msm: enable aggre1 ufs hw ctl clock for msmcobalt

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QCOM UFS host controller v3.0.0 supports hw gating of clocks,
enable the use of hw ctl clock variant of aggre1 ufs clock.

Change-Id: I3f0e718362a73c2c440fa2b0aea816fa058fdaa3
Signed-off-by: Venkat Gopalakrishnan <venkatg@codeaurora.org>
This commit is contained in:
Venkat Gopalakrishnan 2016-08-31 17:37:45 -07:00
parent 7c17954147
commit f795f9a639
1 changed files with 1 additions and 1 deletions
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2
arch/arm/boot/dts/qcom/msmcobalt.dtsi
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@ -1697,7 +1697,7 @@
"rx_lane0_sync_clk";
clocks =
<&clock_gcc clk_gcc_ufs_axi_hw_ctl_clk>,
<&clock_gcc clk_gcc_aggre1_ufs_axi_clk>,
<&clock_gcc clk_gcc_aggre1_ufs_axi_hw_ctl_clk>,
<&clock_gcc clk_gcc_ufs_ahb_clk>,
<&clock_gcc clk_gcc_ufs_unipro_core_hw_ctl_clk>,
<&clock_gcc clk_gcc_ufs_ice_core_hw_ctl_clk>,