msm: mdss: dp: remove programming of maud/naud for audio
Remove the programming of the maud/naud values, and rely entirely of the hardware selection logic to calculate the maud/naud and the resultant audio clock frequency. This is the recommended pratice as it leverages existing hardware logic and avoids errors due to over/under compensating the audio clock frequency. Change-Id: Ic756deeabeb0eaaf95e5354b565cf20a85fd7cca Signed-off-by: Tatenda Chipeperekwa <tatendac@codeaurora.org>
This commit is contained in:
Tatenda Chipeperekwa
Ajay Singh Parmar
parent
0f9531e3a2
commit
f8a5f3e06f
2 changed files with 0 additions and 108 deletions
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@ -898,8 +898,6 @@ static int dp_audio_info_setup(struct platform_device *pdev,
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}
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mdss_dp_audio_setup_sdps(&dp_ctrl->ctrl_io);
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mdss_dp_audio_set_sample_rate(&dp_ctrl->ctrl_io,
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dp_ctrl->link_rate, params->sample_rate_hz);
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mdss_dp_config_audio_acr_ctrl(&dp_ctrl->ctrl_io, dp_ctrl->link_rate);
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mdss_dp_set_safe_to_exit_level(&dp_ctrl->ctrl_io, dp_ctrl->lane_cnt);
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mdss_dp_audio_enable(&dp_ctrl->ctrl_io, true);
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@ -27,10 +27,6 @@
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#define DP_LS_FREQ_162 162000000
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#define DP_LS_FREQ_270 270000000
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#define DP_LS_FREQ_540 540000000
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#define AUDIO_FREQ_32 32000
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#define AUDIO_FREQ_44_1 44100
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#define AUDIO_FREQ_48 48000
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#define DP_AUDIO_FREQ_COUNT 3
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enum mdss_dp_pin_assignment {
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PIN_ASSIGNMENT_A,
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@ -55,68 +51,12 @@ static const char *mdss_dp_pin_name(u8 pin)
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}
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}
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static const uint32_t naud_value[DP_AUDIO_FREQ_COUNT][DP_AUDIO_FREQ_COUNT] = {
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{ 10125, 16875, 33750 },
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{ 5625, 9375, 18750 },
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{ 3375, 5625, 11250 }
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};
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static const uint32_t maud_rate[DP_AUDIO_FREQ_COUNT] = { 1024, 784, 512 };
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static const uint32_t audio_timing_rbr[DP_AUDIO_FREQ_COUNT] = {
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MMSS_DP_AUDIO_TIMING_RBR_32,
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MMSS_DP_AUDIO_TIMING_RBR_44,
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MMSS_DP_AUDIO_TIMING_RBR_48
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};
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static const uint32_t std_audio_freq_list[DP_AUDIO_FREQ_COUNT] = {
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AUDIO_FREQ_32,
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AUDIO_FREQ_44_1,
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AUDIO_FREQ_48
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};
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struct mdss_hw mdss_dp_hw = {
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.hw_ndx = MDSS_HW_EDP,
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.ptr = NULL,
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.irq_handler = dp_isr,
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};
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static int mdss_dp_get_rate_index(uint32_t rate)
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{
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int index = 0;
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switch (rate) {
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case DP_LS_FREQ_162:
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case AUDIO_FREQ_32:
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index = 0;
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break;
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case DP_LS_FREQ_270:
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case AUDIO_FREQ_44_1:
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index = 1;
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break;
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case DP_LS_FREQ_540:
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case AUDIO_FREQ_48:
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index = 2;
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break;
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default:
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index = 0;
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pr_err("unsupported rate\n");
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break;
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}
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return index;
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}
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static bool match_std_freq(uint32_t audio_freq, uint32_t std_freq)
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{
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int quotient = audio_freq / std_freq;
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if (quotient & (quotient - 1))
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return false;
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else
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return true;
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}
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/* DP retrieve ctrl HW version */
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u32 mdss_dp_get_ctrl_hw_version(struct dss_io_data *ctrl_io)
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{
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@ -866,52 +806,6 @@ void mdss_dp_audio_setup_sdps(struct dss_io_data *ctrl_io)
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mdss_dp_audio_setup_isrc_sdp(ctrl_io);
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}
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void mdss_dp_audio_set_sample_rate(struct dss_io_data *ctrl_io,
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char dp_link_rate, uint32_t audio_freq)
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{
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uint32_t link_rate;
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uint32_t default_audio_freq = AUDIO_FREQ_32;
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int i, multiplier = 1;
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uint32_t maud_index, lrate_index, register_index, value;
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link_rate = (uint32_t)dp_link_rate * DP_LINK_RATE_MULTIPLIER;
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pr_debug("link_rate = %u, audio_freq = %u\n", link_rate, audio_freq);
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for (i = 0; i < DP_AUDIO_FREQ_COUNT; i++) {
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if (audio_freq % std_audio_freq_list[i])
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continue;
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if (match_std_freq(audio_freq, std_audio_freq_list[i])) {
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default_audio_freq = std_audio_freq_list[i];
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multiplier = audio_freq / default_audio_freq;
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break;
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}
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}
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pr_debug("default_audio_freq = %u, multiplier = %d\n",
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default_audio_freq, multiplier);
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lrate_index = mdss_dp_get_rate_index(link_rate);
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maud_index = mdss_dp_get_rate_index(default_audio_freq);
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pr_debug("lrate_index = %u, maud_index = %u, maud = %u, naud = %u\n",
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lrate_index, maud_index,
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maud_rate[maud_index] * multiplier,
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naud_value[maud_index][lrate_index]);
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register_index = mdss_dp_get_rate_index(default_audio_freq);
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value = ((maud_rate[maud_index] * multiplier) << 16) |
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naud_value[maud_index][lrate_index];
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pr_debug("reg index = %d, offset = 0x%x, value = 0x%x\n",
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(int)register_index, audio_timing_rbr[register_index],
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value);
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writel_relaxed(value, ctrl_io->base +
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audio_timing_rbr[register_index]);
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}
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void mdss_dp_set_safe_to_exit_level(struct dss_io_data *ctrl_io,
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uint32_t lane_cnt)
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{
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