leds: qpnp-wled: add support for configuring sc debounce cycles

Add support for configuring short circuit debounce cycles in
both LCD mode and AMOLED mode. Also, when configuring the
WLED SHORT_PROTECT register, the bits corresponding to DBNC_SHORT
bit fields are incorrectly written, so correct the corresponding
bitmask and the associated code logic to avoid this. Add an
explicit SPMI write to WLED1_CTRL_SOFTSTART_RAMP_DELAY register
as well for LCD mode.

Change-Id: Ibae8926262c52c8db3d04ab355651e5df44ec090
Signed-off-by: Himanshu Aggarwal <haggarwa@codeaurora.org>
Signed-off-by: Shantanu Jain <shjain@codeaurora.org>

Documentation/devicetree/bindings/leds/leds-qpnp-wled.txt

@@ -48,12 +48,12 @@ Optional properties for WLED:
 - qcom,en-ext-pfet-sc-pro : Specify if external pfet short circuit protection is needed
 - qcom,cons-sync-write-delay-us : Specify in 'us' the duration of delay between two consecutive writes to
 				  SYNC register.
+- qcom,sc-deb-cycles	: debounce time for short circuit detection
 
 Optional properties if 'qcom,disp-type-amoled' is mentioned in DT:
 - qcom,loop-ea-gm	: control the gm for gm stage in control loop. default is 3.
 - qcom,loop-comp-res-kohm	: control to select the compensation resistor in kohm. default is 320.
 - qcom,vref-psm-mv	: reference psm voltage in mv. default for amoled is 450.
-- qcom,sc-deb-cycles	: debounce time for short circuit detection
 - qcom,avdd-trim-steps-from-center : The number of steps to trim the OVP threshold voltage. The possible values can be between -7 to 8.
 
 Example:

arch/arm64/configs/msm-perf_defconfig

@@ -52,10 +52,10 @@ CONFIG_PREEMPT=y
 CONFIG_KSM=y
 CONFIG_TRANSPARENT_HUGEPAGE=y
 CONFIG_CMA=y
+CONFIG_CMA_DEBUGFS=y
 CONFIG_ARMV8_DEPRECATED=y
 CONFIG_CMDLINE="console=ttyAMA0"
 # CONFIG_EFI is not set
-CONFIG_CMA_DEBUGFS=y
 CONFIG_BUILD_ARM64_APPENDED_DTB_IMAGE=y
 # CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS is not set
 CONFIG_COMPAT=y

arch/arm64/configs/msm_defconfig

@@ -52,10 +52,10 @@ CONFIG_PREEMPT=y
 CONFIG_KSM=y
 CONFIG_TRANSPARENT_HUGEPAGE=y
 CONFIG_CMA=y
+CONFIG_CMA_DEBUGFS=y
 CONFIG_ARMV8_DEPRECATED=y
 CONFIG_CMDLINE="console=ttyAMA0"
 # CONFIG_EFI is not set
-CONFIG_CMA_DEBUGFS=y
 CONFIG_BUILD_ARM64_APPENDED_DTB_IMAGE=y
 # CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS is not set
 CONFIG_COMPAT=y

arch/arm64/configs/msmcortex-perf_defconfig

@@ -132,10 +132,8 @@ CONFIG_PINCTRL_MSMCOBALT=y
 CONFIG_GPIOLIB=y
 CONFIG_GPIO_SYSFS=y
 CONFIG_GPIO_QPNP_PIN=y
-CONFIG_QCOM_DLOAD_MODE=y
 CONFIG_POWER_RESET_XGENE=y
 CONFIG_POWER_RESET_SYSCON=y
-CONFIG_APSS_CORE_EA=y
 CONFIG_MSM_APM=y
 CONFIG_QPNP_SMBCHARGER=y
 CONFIG_SMB135X_CHARGER=y

arch/arm64/configs/msmcortex_defconfig

@@ -150,7 +150,6 @@ CONFIG_POWER_RESET_QCOM=y
 CONFIG_QCOM_DLOAD_MODE=y
 CONFIG_POWER_RESET_XGENE=y
 CONFIG_POWER_RESET_SYSCON=y
-CONFIG_APSS_CORE_EA=y
 CONFIG_MSM_APM=y
 CONFIG_QPNP_SMBCHARGER=y
 CONFIG_SMB135X_CHARGER=y

drivers/leds/leds-qpnp-wled.c

@@ -177,13 +177,14 @@
 #define QPNP_WLED_MODULE_EN_SHIFT	7
 #define QPNP_WLED_DISP_SEL_MASK		0x7F
 #define QPNP_WLED_DISP_SEL_SHIFT	7
-#define QPNP_WLED_EN_SC_MASK		0x7F
+#define QPNP_WLED_EN_SC_DEB_CYCLES_MASK	0x79
+#define QPNP_WLED_EN_DEB_CYCLES_MASK	0xF9
 #define QPNP_WLED_EN_SC_SHIFT		7
 #define QPNP_WLED_SC_PRO_EN_DSCHGR	0x8
 #define QPNP_WLED_SC_DEB_CYCLES_MIN     2
 #define QPNP_WLED_SC_DEB_CYCLES_MAX     16
-#define QPNP_WLED_SC_DEB_SUB            2
-#define QPNP_WLED_SC_DEB_CYCLES_DFLT_AMOLED 4
+#define QPNP_WLED_SC_DEB_CYCLES_SUB     2
+#define QPNP_WLED_SC_DEB_CYCLES_DFLT    4
 #define QPNP_WLED_EXT_FET_DTEST2	0x09
 
 #define QPNP_WLED_SEC_ACCESS_REG(b)    (b + 0xD0)
@@ -909,13 +910,6 @@ static int qpnp_wled_set_disp(struct qpnp_wled *wled, u16 base_addr)
 		if (rc)
 			return rc;
 
-		/* Configure the Soft start Ramp delay for AMOLED */
-		reg = 0;
-		rc = qpnp_wled_write_reg(wled, &reg,
-				QPNP_WLED_SOFTSTART_RAMP_DLY(base_addr));
-		if (rc)
-			return rc;
-
 		/* Configure the CTRL TEST4 register for AMOLED */
 		rc = qpnp_wled_read_reg(wled, &reg,
 				QPNP_WLED_TEST4_REG(wled->ctrl_base));
@@ -1036,6 +1030,13 @@ static int qpnp_wled_config(struct qpnp_wled *wled)
 			return rc;
 	}
 
+	/* Configure the Soft start Ramp delay: for AMOLED - 0,for LCD - 2 */
+	reg = (wled->disp_type_amoled) ? 0 : 2;
+	rc = qpnp_wled_write_reg(wled, &reg,
+			QPNP_WLED_SOFTSTART_RAMP_DLY(wled->ctrl_base));
+	if (rc)
+		return rc;
+
 	/* Configure the MAX BOOST DUTY register */
 	if (wled->boost_duty_ns < QPNP_WLED_BOOST_DUTY_MIN_NS)
 		wled->boost_duty_ns = QPNP_WLED_BOOST_DUTY_MIN_NS;
@@ -1334,21 +1335,18 @@ static int qpnp_wled_config(struct qpnp_wled *wled)
 				QPNP_WLED_SC_PRO_REG(wled->ctrl_base));
 		if (rc < 0)
 			return rc;
-		reg &= QPNP_WLED_EN_SC_MASK;
+		reg &= QPNP_WLED_EN_SC_DEB_CYCLES_MASK;
 		reg |= 1 << QPNP_WLED_EN_SC_SHIFT;
 
-		if (wled->disp_type_amoled) {
-			if (wled->sc_deb_cycles < QPNP_WLED_SC_DEB_CYCLES_MIN)
-				wled->sc_deb_cycles =
-						 QPNP_WLED_SC_DEB_CYCLES_MIN;
-			else if (wled->sc_deb_cycles >
-						 QPNP_WLED_SC_DEB_CYCLES_MAX)
-				wled->sc_deb_cycles =
-						 QPNP_WLED_SC_DEB_CYCLES_MAX;
+		if (wled->sc_deb_cycles < QPNP_WLED_SC_DEB_CYCLES_MIN)
+			wled->sc_deb_cycles = QPNP_WLED_SC_DEB_CYCLES_MIN;
+		else if (wled->sc_deb_cycles > QPNP_WLED_SC_DEB_CYCLES_MAX)
+			wled->sc_deb_cycles = QPNP_WLED_SC_DEB_CYCLES_MAX;
+		temp = fls(wled->sc_deb_cycles) - QPNP_WLED_SC_DEB_CYCLES_SUB;
+		reg |= (temp << 1);
 
-			temp = fls(wled->sc_deb_cycles) - QPNP_WLED_SC_DEB_SUB;
-			reg |= ((temp << 1) | QPNP_WLED_SC_PRO_EN_DSCHGR);
-		}
+		if (wled->disp_type_amoled)
+			reg |= QPNP_WLED_SC_PRO_EN_DSCHGR;
 
 		rc = qpnp_wled_write_reg(wled, &reg,
 				QPNP_WLED_SC_PRO_REG(wled->ctrl_base));
@@ -1366,6 +1364,24 @@ static int qpnp_wled_config(struct qpnp_wled *wled)
 			if (rc)
 				return rc;
 		}
+	} else {
+		rc = qpnp_wled_read_reg(wled, &reg,
+				QPNP_WLED_SC_PRO_REG(wled->ctrl_base));
+		if (rc < 0)
+			return rc;
+		reg &= QPNP_WLED_EN_DEB_CYCLES_MASK;
+
+		if (wled->sc_deb_cycles < QPNP_WLED_SC_DEB_CYCLES_MIN)
+			wled->sc_deb_cycles = QPNP_WLED_SC_DEB_CYCLES_MIN;
+		else if (wled->sc_deb_cycles > QPNP_WLED_SC_DEB_CYCLES_MAX)
+			wled->sc_deb_cycles = QPNP_WLED_SC_DEB_CYCLES_MAX;
+		temp = fls(wled->sc_deb_cycles) - QPNP_WLED_SC_DEB_CYCLES_SUB;
+		reg |= (temp << 1);
+
+		rc = qpnp_wled_write_reg(wled, &reg,
+				QPNP_WLED_SC_PRO_REG(wled->ctrl_base));
+		if (rc)
+			return rc;
 	}
 
 	return 0;
@@ -1431,16 +1447,6 @@ static int qpnp_wled_parse_dt(struct qpnp_wled *wled)
 			return rc;
 		}
 
-		wled->sc_deb_cycles = QPNP_WLED_SC_DEB_CYCLES_DFLT_AMOLED;
-		rc = of_property_read_u32(pdev->dev.of_node,
-				"qcom,sc-deb-cycles", &temp_val);
-		if (!rc) {
-			wled->sc_deb_cycles = temp_val;
-		} else if (rc != -EINVAL) {
-			dev_err(&pdev->dev, "Unable to read sc debounce cycles\n");
-			return rc;
-		}
-
 		wled->avdd_trim_steps_from_center = 0;
 		rc = of_property_read_u32(pdev->dev.of_node,
 				"qcom,avdd-trim-steps-from-center", &temp_val);
@@ -1452,6 +1458,16 @@ static int qpnp_wled_parse_dt(struct qpnp_wled *wled)
 		}
 	}
 
+	wled->sc_deb_cycles = QPNP_WLED_SC_DEB_CYCLES_DFLT;
+	rc = of_property_read_u32(pdev->dev.of_node,
+			"qcom,sc-deb-cycles", &temp_val);
+	if (!rc) {
+		wled->sc_deb_cycles = temp_val;
+	} else if (rc != -EINVAL) {
+		dev_err(&pdev->dev, "Unable to read sc debounce cycles\n");
+		return rc;
+	}
+
 	wled->fdbk_op = QPNP_WLED_FDBK_AUTO;
 	rc = of_property_read_string(pdev->dev.of_node,
 			"qcom,fdbk-output", &temp_str);