spmi: pmic-arb: do not ack and clear peripheral interrupts in cleanup_irq
Currently, cleanup_irq() is invoked when a peripheral's interrupt fires and there is no mapping present in the interrupt domain of spmi interrupt controller. The cleanup_irq clears the arbiter bit, clears the pmic interrupt and disables it at the pmic in that order. The last disable in cleanup_irq races with request_irq() in that it stomps over the enable issued by request_irq. Fix this by not writing to the pmic in cleanup_irq. The latched bit will be left set in the pmic, which will not send us more interrupts even if the enable bit stays enabled. When a client wants to request an interrupt, use the activate callback on the irq_domain to clear latched bit. This ensures that the latched, if set due to the above changes in cleanup_irq or when the bootloader leaves it set, gets cleaned up, paving way for upcoming interrupts to trigger. With this, there is a possibility of unwanted triggering of interrupt right after the latched bit is cleared - the interrupt may be left enabled too. To avoid that, clear the enable first followed by clearing the latched bit in the activate callback. Change-Id: If126d6f6cdf6c944ca513c53a71a91e225ee63e2 Signed-off-by: Subbaraman Narayanamurthy <subbaram@codeaurora.org>
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1 changed files with 12 additions and 12 deletions
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@ -533,18 +533,6 @@ static void cleanup_irq(struct spmi_pmic_arb *pa, u16 apid, int id)
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"cleanup_irq apid=%d sid=0x%x per=0x%x irq=%d\n",
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apid, sid, per, id);
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writel_relaxed(irq_mask, pa->intr + pa->ver_ops->irq_clear(apid));
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if (pmic_arb_write_cmd(pa->spmic, SPMI_CMD_EXT_WRITEL, sid,
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(per << 8) + QPNPINT_REG_LATCHED_CLR, &irq_mask, 1))
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dev_err_ratelimited(&pa->spmic->dev,
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"failed to ack irq_mask = 0x%x for ppid = %x\n",
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irq_mask, ppid);
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if (pmic_arb_write_cmd(pa->spmic, SPMI_CMD_EXT_WRITEL, sid,
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(per << 8) + QPNPINT_REG_EN_CLR, &irq_mask, 1))
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dev_err_ratelimited(&pa->spmic->dev,
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"failed to ack irq_mask = 0x%x for ppid = %x\n",
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irq_mask, ppid);
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}
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static void periph_interrupt(struct spmi_pmic_arb *pa, u16 apid, bool show)
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@ -721,6 +709,17 @@ static struct irq_chip pmic_arb_irqchip = {
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| IRQCHIP_SKIP_SET_WAKE,
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};
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static void qpnpint_irq_domain_activate(struct irq_domain *domain,
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struct irq_data *d)
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{
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u8 irq = HWIRQ_IRQ(d->hwirq);
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u8 buf;
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buf = BIT(irq);
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qpnpint_spmi_write(d, QPNPINT_REG_EN_CLR, &buf, 1);
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qpnpint_spmi_write(d, QPNPINT_REG_LATCHED_CLR, &buf, 1);
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}
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static int qpnpint_irq_domain_dt_translate(struct irq_domain *d,
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struct device_node *controller,
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const u32 *intspec,
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@ -1186,6 +1185,7 @@ static const struct pmic_arb_ver_ops pmic_arb_v5 = {
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static const struct irq_domain_ops pmic_arb_irq_domain_ops = {
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.map = qpnpint_irq_domain_map,
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.xlate = qpnpint_irq_domain_dt_translate,
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.activate = qpnpint_irq_domain_activate,
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};
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static void spmi_pmic_arb_resume(void)
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