Merge "clk: msm: clock-osm: Do not initialize ACD if the cluster isn't online"
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1 changed files with 88 additions and 86 deletions
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@ -606,6 +606,83 @@ static int clk_osm_acd_auto_local_write_reg(struct clk_osm *c, u32 mask)
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return 0;
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}
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static int clk_osm_acd_init(struct clk_osm *c)
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{
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int rc = 0;
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u32 auto_xfer_mask = 0;
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if (!c->acd_init)
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return 0;
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c->acd_debugfs_addr = ACD_HW_VERSION;
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/* Program ACD tunable-length delay register */
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clk_osm_acd_master_write_reg(c, c->acd_td, ACDTD);
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auto_xfer_mask |= ACD_REG_RELATIVE_ADDR_BITMASK(ACDTD);
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/* Program ACD control register */
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clk_osm_acd_master_write_reg(c, c->acd_cr, ACDCR);
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auto_xfer_mask |= ACD_REG_RELATIVE_ADDR_BITMASK(ACDCR);
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/* Program ACD soft start control register */
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clk_osm_acd_master_write_reg(c, c->acd_sscr, ACDSSCR);
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auto_xfer_mask |= ACD_REG_RELATIVE_ADDR_BITMASK(ACDSSCR);
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/* Program initial ACD external interface configuration register */
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clk_osm_acd_master_write_reg(c, c->acd_extint0_cfg, ACD_EXTINT_CFG);
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auto_xfer_mask |= ACD_REG_RELATIVE_ADDR_BITMASK(ACD_EXTINT_CFG);
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/* Program ACD auto-register transfer control register */
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clk_osm_acd_master_write_reg(c, c->acd_autoxfer_ctl, ACD_AUTOXFER_CTL);
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/* Ensure writes complete before transfers to local copy */
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clk_osm_acd_mb(c);
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/* Transfer master copies */
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rc = clk_osm_acd_auto_local_write_reg(c, auto_xfer_mask);
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if (rc)
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return rc;
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/* Switch CPUSS clock source to ACD clock */
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rc = clk_osm_acd_master_write_through_reg(c, ACD_GFMUX_CFG_SELECT,
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ACD_GFMUX_CFG);
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if (rc)
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return rc;
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/* Program ACD_DCVS_SW */
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rc = clk_osm_acd_master_write_through_reg(c,
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ACD_DCVS_SW_DCVS_IN_PRGR_SET,
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ACD_DCVS_SW);
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if (rc)
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return rc;
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rc = clk_osm_acd_master_write_through_reg(c,
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ACD_DCVS_SW_DCVS_IN_PRGR_CLEAR,
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ACD_DCVS_SW);
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if (rc)
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return rc;
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udelay(1);
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/* Program final ACD external interface configuration register */
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rc = clk_osm_acd_master_write_through_reg(c, c->acd_extint1_cfg,
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ACD_EXTINT_CFG);
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if (rc)
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return rc;
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/*
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* ACDCR, ACDTD, ACDSSCR, ACD_EXTINT_CFG, ACD_GFMUX_CFG
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* must be copied from master to local copy on PC exit.
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*/
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auto_xfer_mask |= ACD_REG_RELATIVE_ADDR_BITMASK(ACD_GFMUX_CFG);
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clk_osm_acd_master_write_reg(c, auto_xfer_mask, ACD_AUTOXFER_CFG);
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/* ACD has been initialized and enabled for this cluster */
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c->acd_init = false;
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return 0;
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}
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static inline int clk_osm_count_ns(struct clk_osm *c, u64 nsec)
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{
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u64 temp;
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@ -729,6 +806,17 @@ static int clk_osm_set_rate(struct clk *c, unsigned long rate)
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static int clk_osm_enable(struct clk *c)
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{
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struct clk_osm *cpuclk = to_clk_osm(c);
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int rc;
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rc = clk_osm_acd_init(cpuclk);
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if (rc) {
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pr_err("Failed to initialize ACD for cluster %d, rc=%d\n",
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cpuclk->cluster_num, rc);
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return rc;
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}
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/* Wait for 5 usecs before enabling OSM */
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udelay(5);
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clk_osm_write_reg(cpuclk, 1, ENABLE_REG);
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@ -3105,81 +3193,6 @@ static int clk_osm_panic_callback(struct notifier_block *nfb,
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return NOTIFY_OK;
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}
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static int clk_osm_acd_init(struct clk_osm *c)
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{
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int rc = 0;
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u32 auto_xfer_mask = 0;
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if (!c->acd_init)
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return 0;
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c->acd_debugfs_addr = ACD_HW_VERSION;
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/* Program ACD tunable-length delay register */
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clk_osm_acd_master_write_reg(c, c->acd_td, ACDTD);
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auto_xfer_mask |= ACD_REG_RELATIVE_ADDR_BITMASK(ACDTD);
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/* Program ACD control register */
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clk_osm_acd_master_write_reg(c, c->acd_cr, ACDCR);
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auto_xfer_mask |= ACD_REG_RELATIVE_ADDR_BITMASK(ACDCR);
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/* Program ACD soft start control register */
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clk_osm_acd_master_write_reg(c, c->acd_sscr, ACDSSCR);
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auto_xfer_mask |= ACD_REG_RELATIVE_ADDR_BITMASK(ACDSSCR);
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/* Program initial ACD external interface configuration register */
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clk_osm_acd_master_write_reg(c, c->acd_extint0_cfg, ACD_EXTINT_CFG);
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auto_xfer_mask |= ACD_REG_RELATIVE_ADDR_BITMASK(ACD_EXTINT_CFG);
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/* Program ACD auto-register transfer control register */
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clk_osm_acd_master_write_reg(c, c->acd_autoxfer_ctl, ACD_AUTOXFER_CTL);
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/* Ensure writes complete before transfers to local copy */
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clk_osm_acd_mb(c);
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/* Transfer master copies */
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rc = clk_osm_acd_auto_local_write_reg(c, auto_xfer_mask);
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if (rc)
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return rc;
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/* Switch CPUSS clock source to ACD clock */
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rc = clk_osm_acd_master_write_through_reg(c, ACD_GFMUX_CFG_SELECT,
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ACD_GFMUX_CFG);
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if (rc)
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return rc;
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/* Program ACD_DCVS_SW */
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rc = clk_osm_acd_master_write_through_reg(c,
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ACD_DCVS_SW_DCVS_IN_PRGR_SET,
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ACD_DCVS_SW);
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if (rc)
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return rc;
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rc = clk_osm_acd_master_write_through_reg(c,
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ACD_DCVS_SW_DCVS_IN_PRGR_CLEAR,
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ACD_DCVS_SW);
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if (rc)
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return rc;
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udelay(1);
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/* Program final ACD external interface configuration register */
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rc = clk_osm_acd_master_write_through_reg(c, c->acd_extint1_cfg,
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ACD_EXTINT_CFG);
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if (rc)
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return rc;
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/*
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* ACDCR, ACDTD, ACDSSCR, ACD_EXTINT_CFG, ACD_GFMUX_CFG
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* must be copied from master to local copy on PC exit.
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*/
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auto_xfer_mask |= ACD_REG_RELATIVE_ADDR_BITMASK(ACD_GFMUX_CFG);
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clk_osm_acd_master_write_reg(c, auto_xfer_mask, ACD_AUTOXFER_CFG);
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return 0;
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}
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static unsigned long init_rate = 300000000;
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static unsigned long osm_clk_init_rate = 200000000;
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@ -3362,17 +3375,6 @@ static int cpu_clock_osm_driver_probe(struct platform_device *pdev)
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clk_osm_setup_cluster_pll(&perfcl_clk);
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}
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rc = clk_osm_acd_init(&pwrcl_clk);
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if (rc) {
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pr_err("failed to initialize ACD for pwrcl, rc=%d\n", rc);
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return rc;
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}
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rc = clk_osm_acd_init(&perfcl_clk);
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if (rc) {
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pr_err("failed to initialize ACD for perfcl, rc=%d\n", rc);
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return rc;
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}
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spin_lock_init(&pwrcl_clk.lock);
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spin_lock_init(&perfcl_clk.lock);
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