From ae5cb0939c002310380f8605183e0d13c5bf4e6d Mon Sep 17 00:00:00 2001 From: Narender Ankam Date: Tue, 17 Oct 2017 13:31:11 +0530 Subject: [PATCH] msm: mdss: hdmi: reset hdmi max supported TMDS clock In current HDMI driver, SVDs and DTDs derived from EDID of a DS HDMI sink are checked for supportness based on previous connection's max TMDS clock. Always reset the max TMDS clock supported by source before reading EDID from DS HDMI device. Change-Id: If5f58562f186634b1ed066fdebfc9fa6b55c6e8a Signed-off-by: Narender Ankam --- drivers/video/fbdev/msm/mdss_hdmi_tx.c | 3 +++ 1 file changed, 3 insertions(+) diff --git a/drivers/video/fbdev/msm/mdss_hdmi_tx.c b/drivers/video/fbdev/msm/mdss_hdmi_tx.c index 5eb17ab27e4c..5cb436261115 100644 --- a/drivers/video/fbdev/msm/mdss_hdmi_tx.c +++ b/drivers/video/fbdev/msm/mdss_hdmi_tx.c @@ -2223,6 +2223,9 @@ static int hdmi_tx_read_sink_info(struct hdmi_tx_ctrl *hdmi_ctrl) DSS_REG_W_ND(io, HDMI_DDC_ARBITRATION, DSS_REG_R(io, HDMI_DDC_ARBITRATION) & ~(BIT(4))); + /* Set/Reset HDMI max TMDS clock supported by source */ + hdmi_edid_set_max_pclk_rate(data, hdmi_ctrl->max_pclk_khz); + if (!hdmi_ctrl->custom_edid && !hdmi_ctrl->sim_mode) { hdmi_ddc_config(&hdmi_ctrl->ddc_ctrl);