The ports are used as follows:
UART1/A: Routed to debug dongle
UART2/B: GPS
UART3/C: Bluetooth
UART4/D: Routed to debug dongle
UART5/E: Not connected
The debug dongle has jumpers to connect either UART1/A or UART4/D to
the DB-9 connector. UART1/A is typically used on Cardhu, and is the option
we assume here.
For now, only enable UART1/A, and explicitly disable all other ports.
The explicit disable prevents the message "of_serial 70006040.serial:
no clock-frequency property set" being printed during boot.
Enabling the other ports requires their clocks to be enabled, or accesses
to the registers will hang. At present, this requires adding entries into
board-dt-tegra30.c's tegra_dt_clk_init_table[]. Lets punt on that and wait
for the common clock bindings to set this all up, although that will also
requiring adding clock support to 8250.c.
While we're at it, fix board-dt-tegra30.c to enable the correct clock for
the debug UART. We got away with this before, because the bootloader already
enabled it.
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Olof Johansson <olof@lixom.net>
This patch adds device tree binding of digital microphone to PAZ00
board.
Signed-off-by: Leon Romanovsky <leon@leon.nu>
Signed-off-by: Olof Johansson <olof@lixom.net>
This enables HW performance measurements, and usage of the "perf" tool.
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Olof Johansson <olof@lixom.net>
* 'features/imx27-dt' of git://git.pengutronix.de/git/imx/linux-2.6:
devicetree-bindings: Add documentation for i.MX generic boards
ARM i.MX: Add phytec phycore-i.MX27 (aka pcm038) devicetree support
ARM i.MX27: Add devicetree support
* 'at91-3.4-cleanup2+DT' of git://github.com/at91linux/linux-at91: (22 commits)
ARM: at91: at91sam9x5cm/dt: add leds support
ARM: at91: usb_a9g20/dt: add gpio-keys support
ARM: at91: at91sam9m10g45ek/dt: add gpio-keys support
ARM: at91: at91sam9m10g45ek/dt: add leds support
ARM: at91: usb_a9g20/dt: add leds support
ARM: at91/pio: add new PIO3 features
ARM: at91: add sam9_smc.o to at91sam9x5 build
ARM: at91/tc/clocksource: Add 32 bit variant to Timer Counter
ARM: at91/tc: add device tree support to atmel_tclib
ARM: at91/tclib: take iomem size from resource
ARM: at91/pit: add traces in case of error
ARM: at91: pit add DT support
ARM: at91: AIC and GPIO IRQ device tree initialization
ARM: at91/board-dt: remove AIC irq domain from board file
ARM: at91/gpio: remove the static specification of gpio_chip.base
ARM: at91/gpio: add .to_irq gpio_chip handler
ARM: at91/gpio: non-DT builds do not have gpio_chip.of_node field
ARM: at91/gpio: add irqdomain and DT support
ARM: at91/gpio: change comments and one variable name
ARM/USB: at91/ohci-at91: remove the use of irq_to_gpio
...
These two branches are a dependency for the at91 device tree changes,
so we pull them in here. at91/base2+cleanup will get merged through
the arm-soc cleanup2 branch, while the irqdomain tree will be sent
by Grant before this one gets integrated.
Conflicts:
drivers/rtc/rtc-at91sam9.c
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Use the gpio for d7 as we do not support yet the pwm led via dt.
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Acked-by: Nicolas Ferre <nicolas.ferre@atmel.com>
This patch adds the support for new PIO controller found on some
at91sam SOCs.
- more peripheral multiplexing
- more features to configure on a PIO (pull-down, Schmitt trigger, debouncer)
- support for several IRQ triggering features (type and polarity)
Support for those new features are retrieved from the device tree
compatibility string.
Debugfs at91_gpio file is updated to monitor configuration.
Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
Device tree support added to atmel_tclib: the generic Timer Counter
library. This is used by the clocksource/clockevent driver tcb_clksrc.
The current DT enabled platforms are also modified to use it:
- .dtsi files are modified to add Timer Counter Block entries
- alias are created to allow identification of each block
- clkdev lookup tables are added for clocks identification.
Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
Acked-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Acked-by: Grant Likely <grant.likely@secretlab.ca>
Retreive registers address and IRQ from device tree entry.
Called from at91_dt_init_irq() so that timers are up-n-running
when timers initialization will occur.
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
[nicolas.ferre@atmel.com: change error path and interrupts property handling]
Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
Add "legacy" type of irqdomain to preserve old-style numbering
and allow smooth transition for both DT and non-DT cases.
Original idea and code by Jean-Christophe Plagniol-Villard.
Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
Acked-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Add an irqdomain for the AIC interrupt controller.
The device tree support is mapping the registers and
is using the irq_domain_add_legacy() to manage hwirq
translation.
The documentation is describing the meaning of the
two cells required for using this "interrupt-controller"
in a device tree node.
Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
Acked-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
* 'dt' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap:
arm/dts: Add support for TI OMAP3 EVM board
arm/dts: OMAP4: Update DTS file with new GIC bindings
arm/dts: OMAP3: Add i2c controller nodes
arm/dts: OMAP4: Add i2c controller nodes
ARM: OMAP2+: Set Kconfig dependencies for PROC_DEVICETREE
arm/dts: OMAP3&4: Remove the '0x' prefix for serial nodes
ARM: OMAP1: kconfig: Enable IRQ_DOMAIN by default for OMAP1 platforms
ARM: OMAP2+: pm: Do not init statically the SR and voltage layer with DT
ARM: OMAP2+: omap_device: Replace dev_warn by dev_dbg in omap_device_build_from_dt
ARM: OMAP2+: board-generic: Remove un-needed .atag_offset for DT_MACHINE
ARM: OMAP2+: kconfig: Enable devicetree by default for OMAP2+ systems
arm/dts: OMAP: Remove bootargs node from board files
This patch adds basic devicetree support for i.MX27 based SoCs.
Only the bindings for which drivers exist are added here:
- UART
- fec
- CSPI
- I2C
- watchdog
- gpio
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
This uart is the primary console for the dreamplug. Removed
kirkwood_uart0_init() call from board-dt.c.
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
Reviewed-by: Arnd Bergmann <arnd@arndb.de>
Acked-by: Nicolas Pitre <nico@linaro.org>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Initially, copied guruplug-setup.c and did s/guruplug/dreamplug/g.
Then, switched to SPI based NOR flash.
After talking to Arnd Bergman, chose an incremental approach to adding
devicetree support. First, we use the dtb to tell us we are on the
dreamplug, then we gradually port over drivers.
Driver porting will start with the uart (see next patch), and progress
from there. Possibly, spi/flash/partitions will be next.
When done, board-dt.c will no longer be dreamplug specific, and dt's can
be made for the other kirkwood boards.
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
Reviewed-by: Arnd Bergmann <arnd@arndb.de>
Acked-by: Nicolas Pitre <nico@linaro.org>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Update the DTS with the proper information required by the
INTC bindings.
- Add the number of interrupt lines
- Add the reg and the compatible entries.
Signed-off-by: Benoit Cousson <b-cousson@ti.com>
Acked-by: Rob Herring <rob.herring@calxeda.com>
Acked-by: Grant Likely <grant.likely@secretlab.ca>
Cardhu uses Tegra's SD ports as follows:
SDMMC1: User SD slot, with GPIOs for power, CD, and WP.
SDMMC2: Not used
SDMMC3: WiFi (currently disabled pending future investigation)
SDMMC4: Internal eMMC
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Olof Johansson <olof@lixom.net>
Add OMAP3 EVM (OMAP3530, AM/DM37x) DTS file to use the omap3.dtsi SoC file,
along with memory node information.
Signed-off-by: Vaibhav Hiremath <hvaibhav@ti.com>
Signed-off-by: Benoit Cousson <b-cousson@ti.com>
Acked-by: Grant Likely <grant.likely@secretlab.ca>
The GIC binding was updated in 3.2 and expects 3 interrupt-cells.
- Update the #interrupt-cells
Signed-off-by: Benoit Cousson <b-cousson@ti.com>
Acked-by: Rob Herring <rob.herring@calxeda.com>
Add i2c controllers nodes into the main ocp bus.
Signed-off-by: Benoit Cousson <b-cousson@ti.com>
Acked-by: Grant Likely <grant.likely@secretlab.ca>
Acked-by: Rob Herring <rob.herring@calxeda.com>
Add i2c controllers nodes into the main ocp bus.
Signed-off-by: Benoit Cousson <b-cousson@ti.com>
Acked-by: Rob Herring <rob.herring@calxeda.com>
Acked-by: Grant Likely <grant.likely@secretlab.ca>
This patch adds Device Tree file for the CoreTile Express A15x2
(V2P-CA15) with Test Chip 1.
As the chip's GIC has 160 interrupt inputs and equivalent SMM
(FPGA) has GIC synthesised with 256 interrupts, NR_IRQS is
increased.
Signed-off-by: Pawel Moll <pawel.moll@arm.com>
This patch adds generic Versatile Express DT machine description,
Device Tree description for the motherboard and documentation for
the bindings.
Signed-off-by: Pawel Moll <pawel.moll@arm.com>
Follow the DTS convention and thus name the nodes <name>@<address> without
any '0x' prefix in the physical address.
Suggested-by: Tony Lindgren <tony@atomide.com>
Signed-off-by: Benoit Cousson <b-cousson@ti.com>
* 'v3.3-samsung-fixes-3' of git://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux-samsung: (2 commits)
ARM: EXYNOS: Add cpu-offset property in gic device tree node
ARM: EXYNOS: Bring exynos4-dt up to date
Linux 3.3-rc3
This includes an update to the v3.3-rc3 release from v3.3-rc2
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Commit db0d4db22a ('ARM: gic: allow GIC to support non-banked setups)
requires a cpu-offset property to be specified for non-banked gic
controllers, which is the case for Exynos4.
Reported-and-Tested-by: Karol Lewandowski <k.lewandowsk@samsung.com>
Signed-off-by: Thomas Abraham <thomas.abraham@linaro.org>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
This adds the wifi led bound to the rfkill0 event to the device
tree of paz00.
Signed-off-by: Marc Dietrich <marvin24@gmx.de>
Signed-off-by: Olof Johansson <olof@lixom.net>
This adds the wakeup gpio which is connected to the embedded
controller to the device tree of paz00.
Signed-off-by: Marc Dietrich <marvin24@gmx.de>
Signed-off-by: Olof Johansson <olof@lixom.net>
Add the ADT7461 temperature monitoring IC which is connected via
the DVC controller.
Signed-off-by: Marc Dietrich <marvin24@gmx.de>
Acked-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Olof Johansson <olof@lixom.net>
UARTC is connected to the mini-pcie port.
Signed-off-by: Marc Dietrich <marvin24@gmx.de>
Acked-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Olof Johansson <olof@lixom.net>
