The timers and uart can get their clock frequencies using the common clock
driver.
Reviewed-by: Steffen Trumtrar <s.trumtrar@pengutronix.de>
Signed-off-by: Dinh Nguyen <dinguyen@altera.com>
The Altera Cyclone5 and Arria5 devkit has an EEPROM and a RTC on the
board. This patch adds support for them.
Signed-off-by: Dinh Nguyen <dinguyen@altera.com>
---
v2: Remove LCD as the driver has not been upstreamed.
Convert all socfpga DT files to the dtc preprocessor include syntax.
This allows to include header files in the devicetrees like other
SoC-types already do.
Signed-off-by: Steffen Trumtrar <s.trumtrar@pengutronix.de>
Signed-off-by: Dinh Nguyen <dinguyen@altera.com>
The SOCrates has an M41T82M RTC on i2c0. Add it.
Signed-off-by: Steffen Trumtrar <s.trumtrar@pengutronix.de>
Signed-off-by: Dinh Nguyen <dinguyen@altera.com>
The SOCrates is a SOCFpga-Cyclone5 based board from EBV.
Add support for it.
Reviewed-by: Pavel Machek <pavel@denx.de>
Signed-off-by: Steffen Trumtrar <s.trumtrar@pengutronix.de>
Signed-off-by: Dinh Nguyen <dinguyen@altera.com>
Add both can controllers to the dtsi.
Reviewed-by: Pavel Machek <pavel@denx.de>
Signed-off-by: Steffen Trumtrar <s.trumtrar@pengutronix.de>
Signed-off-by: Dinh Nguyen <dinguyen@altera.com>
The first interrupt is not at 180 but 104. Fix it.
Signed-off-by: Steffen Trumtrar <s.trumtrar@pengutronix.de>
Signed-off-by: Dinh Nguyen <dinguyen@altera.com>
Remove use of property ti,vcc-aux-disable-is-sleep, which does not
exist.
Signed-off-by: Johan Hovold <jhovold@gmail.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
The CubieTruck has an AMPAK AP6210 WiFi+Bluetooth module. The WiFi
part is a BCM43362 IC connected to MMC3 in the A20 SoC via SDIO.
The IC also takes a power enable signal via GPIO.
The WiFi module supports out-of-band interrupt signaling via GPIO,
but this is not supported in this patch.
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
- more support for at91sam9rl and its associated EK board
- some improvements to at91sam9g45 (ADC, TS, PWM leds)
- addition of some missing pieces for describing audio
of SAMA5D3-EK in DT
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Merge tag 'at91-dt' of git://github.com/at91linux/linux-at91 into next/dt
Merge "at91: DT for 3.16 #1" from Nicolas Ferre:
3.16: first DT series:
- more support for at91sam9rl and its associated EK board
- some improvements to at91sam9g45 (ADC, TS, PWM leds)
- addition of some missing pieces for describing audio
of SAMA5D3-EK in DT
* tag 'at91-dt' of git://github.com/at91linux/linux-at91:
ARM: at91: sama5d3: clock for ssc from rk pin
ARM: at91: sama5d3: add the missing property
ARM: at91: sama5d3: correct the sound compatible string
ARM: at91: sama5d3: disable sound by default
ARM: at91: sama5d3: add DMA property for SSC devices
ARM: at91/dt: at91sam9m10g45ek PWM leds polarity is inversed
ARM: at91/dt: at91sam9m10g45ek: add ADC and touchscreen support
ARM: at91/dt: sam9g45: improve ADC/touchscreen support
ARM: at91/dt: add peripherals to the at91sam9rlek board
ARM: at91/dt: sam9rl: add lcd, adc, usb gadget and pwm support
Signed-off-by: Olof Johansson <olof@lixom.net>
AM4372 has two clk domains 100f and 200s. Provide register mapping,
interrupt information and compatibility flags associated with it.
Signed-off-by: Dave Gerlach <d-gerlach@ti.com>
Signed-off-by: Afzal Mohammed <afzal@ti.com>
Signed-off-by: Sekhar Nori <nsekhar@ti.com>
Signed-off-by: Nishanth Menon <nm@ti.com>
We have currently marked the DRA7 L3 as being compatible with
omap4-l3-noc This is not true considering the differences in data
involved.
Now that we have proper support for ti,dra7-l3-noc, add the clock
modules clk1 and clk3 (clk2 submodule will be handled by the driver)
and switch compatibility flag to use the proper data.
Signed-off-by: Rajendra Nayak <ranayak@ti.com>
[nm@ti.com: map up full address range]
Signed-off-by: Nishanth Menon <nm@ti.com>
Add CPSW fck and CPTS clock and clock names for AM4372
Signed-off-by: George Cherian <george.cherian@ti.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
- mvebu
- fix NOR bus width on Armada XP boards
- use qsgmii on Armada XP GP board
- add i2c bus freq for Armada 370 DB board
- add SATA interface for Armada 375 DB
- kirkwood
- fix double probe of audio codec for T5325
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Merge tag 'mvebu-dt-fixes-3.15' of git://git.infradead.org/linux-mvebu into fixes
From Jason Cooper:
mvebu DT fixes for v3.15
- mvebu
- fix NOR bus width on Armada XP boards
- use qsgmii on Armada XP GP board
- add i2c bus freq for Armada 370 DB board
- add SATA interface for Armada 375 DB
- kirkwood
- fix double probe of audio codec for T5325
* tag 'mvebu-dt-fixes-3.15' of git://git.infradead.org/linux-mvebu:
ARM: Kirkwood: T5325: Fix double probe of Codec
ARM: mvebu: enable the SATA interface on Armada 375 DB
ARM: mvebu: specify I2C bus frequency on Armada 370 DB
ARM: mvebu: use qsgmii phy-mode for Armada XP GP interfaces
ARM: mvebu: fix NOR bus-width in Armada XP OpenBlocks AX3 Device Tree
ARM: mvebu: fix NOR bus-width in Armada XP DB Device Tree
ARM: mvebu: fix NOR bus-width in Armada XP GP Device Tree
Signed-off-by: Olof Johansson <olof@lixom.net>
timings for smc911x LAN9220 (and potentially LAN9221) devices
that were noted on a cm-t3730 system. Also fix THUMB mode
for SMP, and mailbox related warnings when booted with device
tree.
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Merge tag 'omap-for-v3.15/fixes-gpmc' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into fixes
Merge fixes from Tony Lindgren:
Mostly fixes for occasional memory corruption caused by bad
timings for smc911x LAN9220 (and potentially LAN9221) devices
that were noted on a cm-t3730 system. Also fix THUMB mode
for SMP, and mailbox related warnings when booted with device
tree.
* tag 'omap-for-v3.15/fixes-gpmc' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap:
ARM: dts: AM3517: Disable absent IPs inherited from OMAP3
ARM: dts: OMAP2: Fix interrupts for OMAP2420 mailbox
ARM: dts: OMAP5: Add mailbox dt node to fix boot warning
ARM: OMAP5: Switch to THUMB mode if needed on secondary CPU
ARM: dts: am437x-gp-evm: Do not reset gpio5
ARM: dts: omap3-igep0020: use SMSC9221 timings
ARM: dts: Fix GPMC timings for LAN9220
ARM: dts: Fix GPMC Ethernet timings for omap cm-t sbc-t boards for device tree
ARM: dts: Fix bad OTG muxing for cm-t boards
Signed-off-by: Olof Johansson <olof@lixom.net>
The cd pin settings have been taken from the original firmware fex files,
and have been confirmed to work on the actual boards.
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
This adds pin-muxing info for the mmc controller / port combinations which
are known to be used on actual boards.
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Add nodes for the 4 mmc controllers found on A20 SoCs to
arch/arm/boot/dts/sun7i-a20.dtsi.
Signed-off-by: David Lanzendörfer <david.lanzendoerfer@o2s.ch>
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Add a new sun6i-a31-m9 dts file for the Mele M9 / Mele A1000G Quad. These
HTPCs use the same board in a different case, for more details see:
http://linux-sunxi.org/Mele_M9
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Add nodes for the 4 mmc controllers found on A31 SoCs to
arch/arm/boot/dts/sun6i-a31.dtsi.
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
The cd pin settings have been taken from the original firmware fex files,
and have been confirmed to work on the actual boards.
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Add nodes for the 3 mmc controllers found on A10s SoCs and for the 2 mmc
controllers found on A13 SoCs.
Signed-off-by: David Lanzendörfer <david.lanzendoerfer@o2s.ch>
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Tested on a subset of these boards, for the others boards the settings match
the ones of the tested boards according to the original firmware fex files.
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
mmc0 is the only controller actually being used on boards, so limit the
pin-muxing options to that.
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Add nodes for the 4 mmc controllers found on A10 SoCs to
arch/arm/boot/dts/sun4i-a10.dtsi.
Signed-off-by: David Lanzendörfer <david.lanzendoerfer@o2s.ch>
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
The sound node is missing a #sound-dai-cells property. Add it, so that
the sounds node can be used in combination with the simple-audio-card
binding.
Signed-off-by: Andrew Lunn <andrew@lunn.ch>
Link: https://lkml.kernel.org/r/1399141819-23924-5-git-send-email-andrew@lunn.ch
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
Ethernet PHYs found on Globalscale Guruplug are connected by RGMII-ID.
Set the corresponding phy-connection-type property accordingly.
Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
Acked-by: Andrew Lunn <andrew@lunn.ch>
Link: https://lkml.kernel.org/r/1398862602-29595-16-git-send-email-sebastian.hesselbarth@gmail.com
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
Ethernet PHY compatible shall be "ethernet-phy-ieee802.3-c22" and
"ethernet-phy-idAAAA.BBBB" if PHY OUI id is known. We know it for
the PHY found on Guruplug, so set it accordingly.
Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
Acked-by: Andrew Lunn <andrew@lunn.ch>
Link: https://lkml.kernel.org/r/1398862602-29595-15-git-send-email-sebastian.hesselbarth@gmail.com
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
Currently, the only 6282-based Kirkwood boards that use I2C1 are Openblocks
A6/A7. Both use the same default I2C1 pinctrl setting from kirkwood-6282.dtsi.
Move the pinctrl setting to the I2C1 node directly and put a note in front of
the corresponding pinctrl node to overwrite the setting on board level.
Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
Acked-by: Andrew Lunn <andrew@lunn.ch>
Link: https://lkml.kernel.org/r/1398862602-29595-14-git-send-email-sebastian.hesselbarth@gmail.com
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
There is only one valid pinctrl setting for I2C0 on Kirkwood. Now that we
have the setting in the common SoC pinctrl, move it to the I2C0 controller
node directly and remove it from the individual boards.
While at it, also fix up status = "okay" to "ok" on one board's I2C0 node.
Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
Acked-by: Andrew Lunn <andrew@lunn.ch>
Link: https://lkml.kernel.org/r/1398862602-29595-13-git-send-email-sebastian.hesselbarth@gmail.com
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
There is only one valid pinctrl setting for NAND on Kirkwood. Now that we
have the setting in the common SoC pinctrl, move it to the NAND controller
node directly and remove it from the individual boards.
While at it, also fix up status = "okay" to "ok" on one board's NAND node.
Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
Acked-by: Andrew Lunn <andrew@lunn.ch>
Link: https://lkml.kernel.org/r/1398862602-29595-12-git-send-email-sebastian.hesselbarth@gmail.com
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
Most Kirkwood boards use the default SPI0 pinctrl setting anyway. Add a
default pinctrl setting to the toplevel SoC SPI0 node and put a note
in front of the corresponding pinctrl node to overwrite the setting
on board level.
Currently, only T5325 is using a different setting and already
overwrites the corresponding pinctrl node.
Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
Acked-by: Andrew Lunn <andrew@lunn.ch>
Link: https://lkml.kernel.org/r/1398862602-29595-11-git-send-email-sebastian.hesselbarth@gmail.com
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
Most boards use the default UART0/1 pinctrl setting without RTS/CTS.
Add the pinctrl setting to the toplevel SoC UART nodes and put a note
in front of the corresponding pinctrl node to overwrite the setting
on board level. Currently, both boards using a different UART pinctrl
setting (Openblocks A6, A7) already overwrite the pinctrl node.
While at it, also fix up some status = "ok" to "okay" and again
whitespace issues on mplcec4 uart nodes.
Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
Acked-by: Andrew Lunn <andrew@lunn.ch>
Link: https://lkml.kernel.org/r/1398862602-29595-10-git-send-email-sebastian.hesselbarth@gmail.com
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
On Kirkwood, there is only one valid pinctrl setting for GBE1. With
a common SoC pinctrl node, we can now set it in the node instead of
in each board file.
Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
Acked-by: Andrew Lunn <andrew@lunn.ch>
Link: https://lkml.kernel.org/r/1398862602-29595-9-git-send-email-sebastian.hesselbarth@gmail.com
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
All SoCs have the same pinctrl setting for NAND, UART0/1, SPI, TWSI0,
and GBE1. Move it to the common pinctrl node that we now have.
Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
Acked-by: Andrew Lunn <andrew@lunn.ch>
Link: https://lkml.kernel.org/r/1398862602-29595-8-git-send-email-sebastian.hesselbarth@gmail.com
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
All Kirkwood SoCs have their pinctrl registers at the same address.
Instead of replaying the same reg property on each SoC, have the
reg property set in the common SoC file already. This also allows
us to move common pinctrl settings to this node later on.
Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
Acked-by: Andrew Lunn <andrew@lunn.ch>
Link: https://lkml.kernel.org/r/1398862602-29595-7-git-send-email-sebastian.hesselbarth@gmail.com
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
To prepare pin-controller consolidation, first rename all pinctrl nodes
to a more appropriate name regarding ePAPR recommended names.
Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
Acked-by: Andrew Lunn <andrew@lunn.ch>
Link: https://lkml.kernel.org/r/1398862602-29595-6-git-send-email-sebastian.hesselbarth@gmail.com
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
UART devices found on Kirkwood SoCs derive their baudrate from TCLK.
With proper clocks property in the SoCs serial node, boards do not
need to overwrite it anymore.
Remove the remaining clock-frequency property from all Kirkwood boards.
Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
Acked-by: Andrew Lunn <andrew@lunn.ch>
Link: https://lkml.kernel.org/r/1398862602-29595-5-git-send-email-sebastian.hesselbarth@gmail.com
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
