Commit graph

349742 commits

Author SHA1 Message Date
Prashant Gaikwad
9598566721 ARM: tegra: define Tegra30 CAR binding
The device tree binding models Tegra30 CAR (Clock And Reset)
as a single monolithic clock provider.

Signed-off-by: Prashant Gaikwad <pgaikwad@nvidia.com>
[swarren: fixed typo in binding doc]
Signed-off-by: Stephen Warren <swarren@nvidia.com>
2013-01-28 11:19:07 -07:00
Stephen Warren
270f8ce312 ARM: tegra: define Tegra20 CAR binding
The Tegra20 CAR (Clock And Reset) Controller controls most aspects of
most clocks within Tegra20. The device tree binding models this as a
single monolithic clock provider, which exports many clocks. This reduces
the number of nodes needed in device tree to represent these clocks.

This binding is only useful for Tegra20; the set of clocks that exists on
Tegra30 is sufficiently different to merit its own binding.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
Acked-by: Simon Glass <sjg@chromium.org>
[pgaikwad: Added mux clk ids and sorted CAR node]
Signed-off-by: Prashant Gaikwad <pgaikwad@nvidia.com>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
2013-01-28 11:19:06 -07:00
Prashant Gaikwad
89572c77cd ARM: tegra: move tegra_cpu_car.h to linux/clk/tegra.h
tegra_cpu_car_ops struct is going to be accessed from drivers/clk/tegra.
Move the tegra_cpu_car_ops to include/linux/clk/tegra.h.

Signed-off-by: Prashant Gaikwad <pgaikwad@nvidia.com>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
2013-01-28 11:19:06 -07:00
Prashant Gaikwad
c7736edf1b ARM: tegra: add function to read chipid
Add function to read chip id from APB MISC registers. This function
will also get called from clock driver to flush write operations on
apb bus.

Signed-off-by: Prashant Gaikwad <pgaikwad@nvidia.com>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
2013-01-28 11:19:06 -07:00
Joseph Lo
24e30c9417 ARM: tegra: fix compile error when disable CPU_IDLE
The "sleep.S" file has many functions that be shared by different module
currently. Not just for CPU idle driver. Make it build as default now.

Reported-by: Rhyland Klein <rklein@nvidia.com>
Signed-off-by: Joseph Lo <josephl@nvidia.com>
[swarren: add sleep.o to separate line so each line only contains 1 file]
Signed-off-by: Stephen Warren <swarren@nvidia.com>
2013-01-28 11:15:21 -07:00
Joseph Lo
1395868c06 ARM: tegra30: make the wait time of CPU power up to proportional to HZ
It would rather to use the API of time_to_jiffies than a constant number
of jiffies for the wait time of CPU power up.

Based on the work by:
Sang-Hun Lee <sanlee@nvidia.com>

Signed-off-by: Joseph Lo <josephl@nvidia.com>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
2013-01-28 11:14:43 -07:00
Joseph Lo
9e32366fe5 ARM: tegra: make device can run on UP
The reset handler code is used for either UP or SMP. To make Tegra device
can compile for UP. It needs to be moved to another file that is not SMP
only. This is because the reset handler also be needed by CPU idle
"powered-down" mode. So we also need to put the reset handler init function
in non-SMP only and init them always.

And currently the implementation of the reset handler to know which CPU is
OK to bring up was identital with "cpu_present_mask". But the
"cpu_present_mask" did not initialize yet when the reset handler init
function was moved to init early function. We use the "cpu_possible_mask"
to replace "cpu_present_mask". Then it can work on both UP and SMP case.

Signed-off-by: Joseph Lo <josephl@nvidia.com>
[swarren: dropped the move of v7_invalidate_l1() from one file to another,
to avoid conflicts with Pavel's cleanup of this function, adjust Makefile
so each line only contains 1 file.]
Signed-off-by: Stephen Warren <swarren@nvidia.com>
2013-01-28 11:14:06 -07:00
Santosh Shilimkar
80d9375617 ARM: OMAP: Make use of available scu_a9_get_base() interface
Drop the define and make use of scu_a9_get_base() which reads
the physical address of SCU from CP15 register.

Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
2013-01-28 10:41:39 -07:00
Hiroshi Doyu
909444ab20 ARM: tegra: Skip scu_enable(scu_base) if not Cortex A9
Skip scu_enable(scu_base) if CPU is not Cortex A9 with SCU.

Signed-off-by: Hiroshi Doyu <hdoyu@nvidia.com>
Acked-by: Russell King <rmk+kernel@arm.linux.org.uk>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
2013-01-28 10:41:18 -07:00
Hiroshi Doyu
e9d6b3358a ARM: Add API to detect SCU base address from CP15
Add API to detect SCU base address from CP15.

Signed-off-by: Hiroshi Doyu <hdoyu@nvidia.com>
Acked-by: Russell King <rmk+kernel@arm.linux.org.uk>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
2013-01-28 10:40:59 -07:00
Hiroshi Doyu
a8a6930157 ARM: tegra: Use DT /cpu node to detect number of CPU core
SCU based detection only works with Cortex-A9 MP and it doesn't
support ones with multiple clusters. The only way to detect number of
CPU core correctly is with DT /cpu node.

Tegra SoCs decided to use DT detection as the only way and to not use
SCU based detection at all. Even if DT /cpu node based detection
fails, it continues with a single core

Signed-off-by: Hiroshi Doyu <hdoyu@nvidia.com>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
2013-01-28 10:40:52 -07:00
Hiroshi Doyu
7d19a34a89 ARM: tegra: Add CPU nodes to Tegra30 device tree
Add CPU node for Tegra30.

Signed-off-by: Hiroshi Doyu <hdoyu@nvidia.com>
Reviewed-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
2013-01-28 10:40:49 -07:00
Hiroshi Doyu
4dd2bd3736 ARM: tegra: Add CPU nodes to Tegra20 device tree
Add CPU node for Tegra20.

Signed-off-by: Hiroshi Doyu <hdoyu@nvidia.com>
Reviewed-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
2013-01-28 10:40:41 -07:00
Stephen Warren
5681f76576 Merge remote-tracking branch 'korg_arm-soc/depends/rmk-perf' into for-3.9/scu-base-rework 2013-01-28 10:37:20 -07:00
Joseph Lo
8c627fa658 ARM: tegra: clean up the CPUINIT section
There are some redundant codes in the CPUINIT section that was caused by
some codes not be organized well in "headsmp.S". Currently all the codes
in "headsmp.S" were put into CPUINIT section. But actually it doesn't
need to be loacted in CPUINIT section. There is no fuction access them
in CPUINIT section and we will relocate them to IRAM.

These codes also caused some unnecessary functions that access these
codes been put into CPUINIT section too. This patch clean it up and put
them into normal text section.

Signed-off-by: Joseph Lo <josephl@nvidia.com>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
2013-01-28 10:21:51 -07:00
Joseph Lo
b811943160 ARM: tegra: moving the clock gating procedure to tegra_cpu_kill
The tegra_cpu_die was be executed by the CPU itslf. So the clock gating
procedure won't be executed after the CPU hardware shutdown code. Moving
the clock gating procedure to tegra_cpu_kill that will be run by another
CPU after the CPU died.

Signed-off-by: Joseph Lo <josephl@nvidia.com>
Acked-by: Peter De Schrijver <pdeschrijver@nvidia.com>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
2013-01-28 10:21:48 -07:00
Joseph Lo
57886616ca ARM: tegra: update the cache maintenance order for CPU shutdown
Updating the cache maintenance order before CPU shutdown when doing CPU
hotplug.
The old order:
* clean L1 by flush_cache_all
* exit SMP
* CPU shutdown
Adapt to:
* disable L1 data cache by clear C bit
* clean L1 by v7_flush_dcache_louis
* exit SMP
* CPU shutdown

For CPU hotplug case, it's no need to do "flush_cache_all". And we should
disable L1 data cache before clean L1 data cache. Then leaving the SMP
coherency.

Signed-off-by: Joseph Lo <josephl@nvidia.com>
Acked-by: Peter De Schrijver <pdeschrijver@nvidia.com>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
2013-01-28 10:21:44 -07:00
Joseph Lo
130bfed72c ARM: tegra30: fix power up sequence for boot_secondary
The power up sequence is different on the cold boot CPU and the CPU
that resumed from the hotplug. For the cold boot CPU, it was been power
gated as default. To power up the cold boot CPU, the power should be
un-gated by un toggling the power gate register manually.

For the CPU that resumed from the hotplug, after un-halted the CPU. The
flow controller will un-gate the power of the CPU. No need to manually
control, just wait the power be resumed and continue the power up
sequence after the CPU power is ready.

Based on the work by:
Varun Wadekar <vwadekar@nvidia.com>

Signed-off-by: Joseph Lo <josephl@nvidia.com>
Acked-by: Peter De Schrijver <pdeschrijver@nvidia.com>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
2013-01-28 10:21:41 -07:00
Richard Zhao
c26cefd089 ARM: tegra: cpufreq: move clk_get/put out of function tegra_cpu_init/exit
tegra_cpu_init/exit will be called every time one cpu core is online or
offline. And all cpu cores share same clocks, redundant clk_get/put
wast time,  so I move them out.

Signed-off-by: Richard Zhao <linuxzsc@gmail.com>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
2013-01-28 10:21:37 -07:00
Stephen Warren
45c9e59296 ARM: tegra: fix Kconfig warnings when !SMP
Fix:

warning: (ARCH_TEGRA_2x_SOC) selects ARM_ERRATA_754327 which has unmet direct dependencies (CPU_V7 && SMP)
warning: (ARCH_TEGRA_2x_SOC) selects ARM_ERRATA_742230 which has unmet direct dependencies (CPU_V7 && SMP)

by selecting options only if SMP.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
2013-01-28 10:21:33 -07:00
Hiroshi Doyu
deeb8d1948 ARM: tegra: Make variables static
No need to be public. Checked with:
  $ touch arch/arm/mach-tegra/*[ch] && make C=1

Signed-off-by: Hiroshi Doyu <hdoyu@nvidia.com>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
2013-01-28 10:21:28 -07:00
Hiroshi Doyu
37340866fb clocksource: tegra: cosmetic: Fix error message
Add missing \n.

Signed-off-by: Hiroshi Doyu <hdoyu@nvidia.com>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
2013-01-28 10:21:25 -07:00
Stephen Warren
1711b1e102 ARM: tegra: move timer.c to drivers/clocksource/
Move arch/arm/mach-tegra/timer.c to drivers/clocksource/tegra20_timer.c
so that the code is co-located with other clocksource drivers, and to
reduce the size of the mach-tegra directory.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
2013-01-28 10:21:21 -07:00
Stephen Warren
f3dab3989b Merge remote-tracking branch 'korg_arm-soc/timer/cleanup' into for-3.9/cleanup 2013-01-28 10:20:34 -07:00
Mrugesh Katepallewar
1661636d36 ARM: davinci: da850: add RTC DT entries
Add RTC DT entries in da850 dts file.

Tested on da850-evm device.
Test Procedure:
$ date 2013.01.28-10:00:00 # usage: date[YYYY.]MM.DD-hh:mm[:ss]
$ hwclock -w
(reset board and check system time)

Signed-off-by: Mrugesh Katepallewar <mrugesh.mk@ti.com>
Signed-off-by: Sekhar Nori <nsekhar@ti.com>
2013-01-28 21:28:11 +05:30
Lad, Prabhakar
c57ff58d12 ARM: davinci: da850: move interrupt-parent property to soc node
This patch moves 'interrupt-parent' property to soc node, so that
the child inherits this property. This avoids adding 'interrupt-parent'
property to each node.

Signed-off-by: Lad, Prabhakar <prabhakar.lad@ti.com>
Cc: linux-arm-kernel@lists.infradead.org
Cc: linux-kernel@vger.kernel.org
Cc: davinci-linux-open-source@linux.davincidsp.com
Cc: devicetree-discuss@lists.ozlabs.org
Cc: Sekhar Nori <nsekhar@ti.com>
Cc: Heiko Schocher <hs@denx.de>
Signed-off-by: Sekhar Nori <nsekhar@ti.com>
2013-01-28 21:16:56 +05:30
Suravee Suthikulpanit
318fe78253 IOMMU, AMD Family15h Model10-1Fh erratum 746 Workaround
The IOMMU may stop processing page translations due to a perceived lack
of credits for writing upstream peripheral page service request (PPR)
or event logs. If the L2B miscellaneous clock gating feature is enabled
the IOMMU does not properly register credits after the log request has
completed, leading to a potential system hang.

BIOSes are supposed to disable L2B micellaneous clock gating by setting
L2_L2B_CK_GATE_CONTROL[CKGateL2BMiscDisable](D0F2xF4_x90[2]) = 1b. This
patch corrects that for those which do not enable this workaround.

Signed-off-by: Suravee Suthikulpanit <suravee.suthikulpanit@amd.com>
Acked-by: Borislav Petkov <bp@suse.de>
Cc: stable@vger.kernel.org
Signed-off-by: Joerg Roedel <joro@8bytes.org>
2013-01-28 15:26:54 +01:00
Wang YanQing
f44310b98d smp: Fix SMP function call empty cpu mask race
I get the following warning every day with v3.7, once or
twice a day:

  [ 2235.186027] WARNING: at /mnt/sda7/kernel/linux/arch/x86/kernel/apic/ipi.c:109 default_send_IPI_mask_logical+0x2f/0xb8()

As explained by Linus as well:

 |
 | Once we've done the "list_add_rcu()" to add it to the
 | queue, we can have (another) IPI to the target CPU that can
 | now see it and clear the mask.
 |
 | So by the time we get to actually send the IPI, the mask might
 | have been cleared by another IPI.
 |

This patch also fixes a system hang problem, if the data->cpumask
gets cleared after passing this point:

        if (WARN_ONCE(!mask, "empty IPI mask"))
                return;

then the problem in commit 83d349f35e ("x86: don't send an IPI to
the empty set of CPU's") will happen again.

Signed-off-by: Wang YanQing <udknight@gmail.com>
Acked-by: Linus Torvalds <torvalds@linux-foundation.org>
Acked-by: Jan Beulich <jbeulich@suse.com>
Cc: Paul E. McKenney <paulmck@linux.vnet.ibm.com>
Cc: Andrew Morton <akpm@linux-foundation.org>
Cc: peterz@infradead.org
Cc: mina86@mina86.org
Cc: srivatsa.bhat@linux.vnet.ibm.com
Cc: <stable@kernel.org>
Link: http://lkml.kernel.org/r/20130126075357.GA3205@udknight
[ Tidied up the changelog and the comment in the code. ]
Signed-off-by: Ingo Molnar <mingo@kernel.org>
2013-01-28 11:21:57 +01:00
David Teigland
d4e0bfec9b GFS2: fix skip unlock condition
The recent commit fb6791d100
included the wrong logic.  The lvbptr check was incorrectly
added after the patch was tested.

Signed-off-by: David Teigland <teigland@redhat.com>
Signed-off-by: Steven Whitehouse <swhiteho@redhat.com>
2013-01-28 09:49:15 +00:00
David Henningsson
fcd8f3b1d4 ALSA: hda - fix inverted internal mic on Acer AOA150/ZG5
This patch enables internal mic input on the machine.

Cc: stable@vger.kernel.org
BugLink: https://bugs.launchpad.net/bugs/1107477
Signed-off-by: David Henningsson <david.henningsson@canonical.com>
Signed-off-by: Takashi Iwai <tiwai@suse.de>
2013-01-28 09:50:50 +01:00
Olof Johansson
2806683c31 ARM i.MX SoC updates for next
Mostly clock related updates, most notably the conversion of
 i.MX31 to a DT based lookup.
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Merge tag 'imx-soc' of git://git.pengutronix.de/git/imx/linux-2.6 into next/soc

From Sascha Hauer:
ARM i.MX SoC updates for next

Mostly clock related updates, most notably the conversion of
i.MX31 to a DT based lookup.

* tag 'imx-soc' of git://git.pengutronix.de/git/imx/linux-2.6:
  ARM: clk-imx35: Fix build warnings with W=1
  ARM: imx27: add a clock gate to activate SPLL clock
  ARM: mx31: Replace clk_register_clkdev with clock DT lookup
  ARM: clk-imx31: Add dummy clock
  ARM: Let CONFIG_MACH_IMX31_DT be built by default

Signed-off-by: Olof Johansson <olof@lixom.net>
2013-01-27 23:42:02 -08:00
Olof Johansson
af70fdc947 Merge branch 'marco-timer-cleanup-rebase' of git://gitorious.org/sirfprima2-kernel/sirfprima2-kernel into next/soc
From Barry Song, this adds support for a new SoC from CSR; marco. It's
SMP, uses GIC instead of VIC and in general needs a bit of rework of
the platform code for setup, which this branch contains.

* 'marco-timer-cleanup-rebase' of git://gitorious.org/sirfprima2-kernel/sirfprima2-kernel:
  ARM: PRIMA2: provide two DEBUG_LL ports for prima2 and marco
  ARM: PRIMA2: add new SiRFmarco SMP SoC infrastructures
  ARM: PRIMA2: irq: make prima2 irq can work even we enable GIC for Marco
  ARM: PRIMA2: rtciobg: it is also compatible with marco
  ARM: PRIMA2: rstc: enable the support for Marco
  ARM: PRIMA2: mv timer to timer-prima2 as we will add timer-marco
  ARM: PRIMA2: initialize l2x0 according to mach from DT
  ARM: PRIMA2: enable AUTO_ZRELADDR for SIRF in Kconfig
  ARM: PRIMA2: add CSR SiRFmarco device tree .dts

Signed-off-by: Olof Johansson <olof@lixom.net>
2013-01-27 23:03:42 -08:00
Olof Johansson
66eae035dc Merge branch 'depends/cleanup' into next/soc
Signed-off-by: Olof Johansson <olof@lixom.net>
2013-01-27 23:03:34 -08:00
Peter Korsgaard
6642f91c92 dm9601: support dm9620 variant
dm9620 is a newer variant of dm9601 with more features (usb 2.0, checksum
offload, ..), but it can also be put in a dm9601 compatible mode, allowing
us to reuse the existing driver.

This does mean that the extended features like checksum offload cannot be
used, but that's hardly critical on a 100mbps interface.

Thanks to Sławek Wernikowski <slawek@wernikowski.net> for providing me
with a dm9620 based device to test.

Signed-off-by: Peter Korsgaard <jacmet@sunsite.dk>
Signed-off-by: David S. Miller <davem@davemloft.net>
2013-01-28 00:18:04 -05:00
Vlad Yasevich
5f19d1219a SCTP: Free the per-net sysctl table on net exit. v2
Per-net sysctl table needs to be explicitly freed at
net exit.  Otherwise we see the following with kmemleak:

unreferenced object 0xffff880402d08000 (size 2048):
  comm "chrome_sandbox", pid 18437, jiffies 4310887172 (age 9097.630s)
  hex dump (first 32 bytes):
    b2 68 89 81 ff ff ff ff 20 04 04 f8 01 88 ff ff  .h...... .......
    04 00 00 00 a4 01 00 00 00 00 00 00 00 00 00 00  ................
  backtrace:
    [<ffffffff815b4aad>] kmemleak_alloc+0x21/0x3e
    [<ffffffff81110352>] slab_post_alloc_hook+0x28/0x2a
    [<ffffffff81113fad>] __kmalloc_track_caller+0xf1/0x104
    [<ffffffff810f10c2>] kmemdup+0x1b/0x30
    [<ffffffff81571e9f>] sctp_sysctl_net_register+0x1f/0x72
    [<ffffffff8155d305>] sctp_net_init+0x100/0x39f
    [<ffffffff814ad53c>] ops_init+0xc6/0xf5
    [<ffffffff814ad5b7>] setup_net+0x4c/0xd0
    [<ffffffff814ada5e>] copy_net_ns+0x6d/0xd6
    [<ffffffff810938b1>] create_new_namespaces+0xd7/0x147
    [<ffffffff810939f4>] copy_namespaces+0x63/0x99
    [<ffffffff81076733>] copy_process+0xa65/0x1233
    [<ffffffff81077030>] do_fork+0x10b/0x271
    [<ffffffff8100a0e9>] sys_clone+0x23/0x25
    [<ffffffff815dda73>] stub_clone+0x13/0x20
    [<ffffffffffffffff>] 0xffffffffffffffff

I fixed the spelling of sysctl_header so the code actually
compiles. -- EWB.

Reported-by: Martin Mokrejs <mmokrejs@fold.natur.cuni.cz>
Signed-off-by: Vlad Yasevich <vyasevich@gmail.com>
Acked-by: Neil Horman <nhorman@tuxdriver.com>
Signed-off-by: "Eric W. Biederman" <ebiederm@xmission.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
2013-01-28 00:09:32 -05:00
Giuseppe CAVALLARO
014f2ffdf6 net: phy: icplus: fix broken INTR pin settings
This patch fixes the setting of the INTR pin that is
valid for IP101 A/G device and not for the IP1001.

Reported-by: Anunay Saxena <anunay.saxena@st.com>
Signed-off-by: Giuseppe Cavallaro <peppe.cavallaro@st.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
2013-01-28 00:08:22 -05:00
Stuart Menefy
b4a496319f net: phy: icplus: Use the RGMII interface mode to configure clock delays
Like several other PHY devices which support RGMII, the IC+1001 allows
additional delays to by added to the RX_CLK and TX_CLK signals to
compensate for skew between the clock and data signals. Previously this
was always enabled, but this change makes use of the different RGMII
interface modes to allow the user to specify whether this should be
enabled.

Signed-off-by: Stuart Menefy <stuart.menefy@st.com>
Signed-off-by: Giuseppe Cavallaro <peppe.cavallaro@st.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
2013-01-28 00:08:22 -05:00
Pravin B Shelar
5465740ace IP_GRE: Fix kernel panic in IP_GRE with GRE csum.
Due to IP_GRE GSO support, GRE can recieve non linear skb which
results in panic in case of GRE_CSUM.  Following patch fixes it by
using correct csum API.

Bug introduced in commit 6b78f16e4b (gre: add GSO support)

Signed-off-by: Pravin B Shelar <pshelar@nicira.com>
Acked-by: Eric Dumazet <edumazet@google.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
2013-01-28 00:07:34 -05:00
David Woodhouse
99f857db88 x86, build: Dynamically find entry points in compressed startup code
We have historically hard-coded entry points in head.S just so it's easy
to build the executable/bzImage headers with references to them.

Unfortunately, this leads to boot loaders abusing these "known" addresses
even when they are *explicitly* told that they "should look at the ELF
header to find this address, as it may change in the future". And even
when the address in question *has* actually been changed in the past,
without fanfare or thought to compatibility.

Thus we have bootloaders doing stunningly broken things like jumping
to offset 0x200 in the kernel startup code in 64-bit mode, *hoping*
that startup_64 is still there (it has moved at least once
before). And hoping that it's actually a 64-bit kernel despite the
fact that we don't give them any indication of that fact.

This patch should hopefully remove the temptation to abuse internal
addresses in future, where sternly worded comments have not sufficed.
Instead of having hard-coded addresses and saying "please don't abuse
these", we actually pull the addresses out of the ELF payload into
zoffset.h, and make build.c shove them back into the right places in
the bzImage header.

Rather than including zoffset.h into build.c and thus having to rebuild
the tool for every kernel build, we parse it instead. The parsing code
is small and simple.

This patch doesn't actually move any of the interesting entry points, so
any offending bootloader will still continue to "work" after this patch
is applied. For some version of "work" which includes jumping into the
compressed payload and crashing, if the bzImage it's given is a 32-bit
kernel. No change there then.

[ hpa: some of the issues in the description are addressed or
  retconned by the 2.12 boot protocol.  This patch has been edited to
  only remove fixed addresses that were *not* thus retconned. ]

Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
Link: http://lkml.kernel.org/r/1358513837.2397.247.camel@shinybook.infradead.org
Signed-off-by: H. Peter Anvin <hpa@linux.intel.com>
Cc: Matt Fleming <matt.fleming@intel.com>
2013-01-27 20:19:37 -08:00
David Woodhouse
b607e21267 x86, efi: Fix PCI ROM handing in EFI boot stub, in 32-bit mode
The 'Attributes' argument to pci->Attributes() function is 64-bit. So
when invoking in 32-bit mode it takes two registers, not just one.

This fixes memory corruption when booting via the 32-bit EFI boot stub.

Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
Cc: <stable@kernel.org>
Link: http://lkml.kernel.org/r/1358513837.2397.247.camel@shinybook.infradead.org
Signed-off-by: H. Peter Anvin <hpa@linux.intel.com>
Cc: Matt Fleming <matt.fleming@intel.com>
2013-01-27 20:19:37 -08:00
David Woodhouse
f791620fa7 x86, efi: Fix 32-bit EFI handover protocol entry point
If the bootloader calls the EFI handover entry point as a standard function
call, then it'll have a return address on the stack. We need to pop that
before calling efi_main(), or the arguments will all be out of position on
the stack.

Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
Cc: <stable@kernel.org>
Link: http://lkml.kernel.org/r/1358513837.2397.247.camel@shinybook.infradead.org
Signed-off-by: H. Peter Anvin <hpa@linux.intel.com>
Cc: Matt Fleming <matt.fleming@intel.com>
2013-01-27 20:19:37 -08:00
David Woodhouse
70a479cbe8 x86, efi: Fix display detection in EFI boot stub
When booting under OVMF we have precisely one GOP device, and it
implements the ConOut protocol.

We break out of the loop when we look at it... and then promptly abort
because 'first_gop' never gets set. We should set first_gop *before*
breaking out of the loop. Yes, it doesn't really mean "first" any more,
but that doesn't matter. It's only a flag to indicate that a suitable
GOP was found.

In fact, we'd do just as well to initialise 'width' to zero in this
function, then just check *that* instead of first_gop. But I'll do the
minimal fix for now (and for stable@).

Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
Cc: <stable@kernel.org>
Link: http://lkml.kernel.org/r/1358513837.2397.247.camel@shinybook.infradead.org
Signed-off-by: H. Peter Anvin <hpa@linux.intel.com>
Cc: Matt Fleming <matt.fleming@intel.com>
2013-01-27 20:19:37 -08:00
Xufeng Zhang
9839ff0dea sctp: set association state to established in dupcook_a handler
While sctp handling a duplicate COOKIE-ECHO and the action is
'Association restart', sctp_sf_do_dupcook_a() will processing
the unexpected COOKIE-ECHO for peer restart, but it does not set
the association state to SCTP_STATE_ESTABLISHED, so the association
could stuck in SCTP_STATE_SHUTDOWN_PENDING state forever.
This violates the sctp specification:
  RFC 4960 5.2.4. Handle a COOKIE ECHO when a TCB Exists
  Action
  A) In this case, the peer may have restarted. .....
     After this, the endpoint shall enter the ESTABLISHED state.

To resolve this problem, adding a SCTP_CMD_NEW_STATE cmd to the
command list before SCTP_CMD_REPLY cmd, this will set the restart
association to SCTP_STATE_ESTABLISHED state properly and also avoid
I-bit being set in the DATA chunk header when COOKIE_ACK is bundled
with DATA chunks.

Signed-off-by: Xufeng Zhang <xufeng.zhang@windriver.com>
Acked-by: Neil Horman <nhorman@tuxdriver.com>
Acked-by: Vlad Yasevich <vyasevich@gmail.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
2013-01-27 19:32:23 -05:00
Dan Carpenter
75356a8143 ip6mr: limit IPv6 MRT_TABLE identifiers
We did this for IPv4 in b49d3c1e1c "net: ipmr: limit MRT_TABLE
identifiers" but we need to do it for IPv6 as well.  On IPv6 the name
is "pim6reg" instead of "pimreg" so there is one less digit allowed.

The strcpy() is in ip6mr_reg_vif().

Signed-off-by: Dan Carpenter <dan.carpenter@oracle.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
2013-01-27 19:31:03 -05:00
françois romieu
ce11ff5e59 r8169: fix vlan tag read ordering.
Control of receive descriptor must not be returned to ethernet chipset
before vlan tag processing is done.

VLAN tag receive word is now reset both in normal and error path.

Signed-off-by: Francois Romieu <romieu@fr.zoreil.com>
Spotted-by: Timo Teras <timo.teras@iki.fi>
Cc: Hayes Wang <hayeswang@realtek.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
2013-01-27 19:28:58 -05:00
Bjørn Mork
56a666dcfc net: cdc_ncm: use IAD provided by the USB core
commit 9992c2e (net: cdc_ncm: workaround for missing CDC Union)
added code to lookup an IAD for the interface we are probing.
This is redundant.  The USB core has already done the lookup
and saved the result in the USB interface struct.  Use that
instead.

Cc: Greg Suarez <gsuarez@smithmicro.com>
Cc: Alexey Orishko <alexey.orishko@stericsson.com>
Signed-off-by: Bjørn Mork <bjorn@mork.no>
Signed-off-by: David S. Miller <davem@davemloft.net>
2013-01-27 19:27:39 -05:00
David S. Miller
2afd0a24da Included changes ares:
- fix an skb memleak in DAT
 - fix the ARP filtering routine in DAT by preventing bogus entries to overwrite
   already existing ones in the local cache.
 - fix the ARP filtering routine in DAT by preventing it to parse and add to the
   cache bogus entries
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Merge tag 'batman-adv-fix-for-davem' of git://git.open-mesh.org/linux-merge

Included changes ares:
- fix an skb memleak in DAT
- fix the ARP filtering routine in DAT by preventing bogus entries to overwrite
  already existing ones in the local cache.
- fix the ARP filtering routine in DAT by preventing it to parse and add to the
  cache bogus entries

Signed-off-by: David S. Miller <davem@davemloft.net>
2013-01-27 19:10:36 -05:00
H. Peter Anvin
09c205afde x86, boot: Define the 2.12 bzImage boot protocol
Define the 2.12 bzImage boot protocol: add xloadflags and additional
fields to allow the command line, initramfs and struct boot_params to
live above the 4 GiB mark.

The xloadflags now communicates if this is a 64-bit kernel with the
legacy 64-bit entry point and which of the EFI handover entry points
are supported.

Avoid adding new read flags to loadflags because of claimed
bootloaders testing the whole byte for == 1 to determine bzImageness
at least until the issue can be researched further.

This is based on patches by Yinghai Lu and David Woodhouse.

Originally-by: Yinghai Lu <yinghai@kernel.org>
Originally-by: David Woodhouse <dwmw2@infradead.org>
Acked-by: Yinghai Lu <yinghai@kernel.org>
Acked-by: David Woodhouse <dwmw2@infradead.org>
Acked-by: Matt Fleming <matt.fleming@intel.com>
Signed-off-by: H. Peter Anvin <hpa@linux.intel.com>
Link: http://lkml.kernel.org/r/1359058816-7615-26-git-send-email-yinghai@kernel.org
Cc: Rob Landley <rob@landley.net>
Cc: Gokul Caushik <caushik1@gmail.com>
Cc: Josh Triplett <josh@joshtriplett.org>
Cc: Joe Millenbach <jmillenbach@gmail.com>
2013-01-27 15:56:37 -08:00
Trond Myklebust
65436ec0c8 NFSv4.1: Ensure that nfs41_walk_client_list() does start lease recovery
We do need to start the lease recovery thread prior to waiting for the
client initialisation to complete in NFSv4.1.

Signed-off-by: Trond Myklebust <Trond.Myklebust@netapp.com>
Cc: Chuck Lever <chuck.lever@oracle.com>
Cc: Ben Greear <greearb@candelatech.com>
Cc: stable@vger.kernel.org [>=3.7]
2013-01-27 15:51:41 -05:00
Trond Myklebust
202c312dba NFSv4: Fix NFSv4 trunking discovery
If walking the list in nfs4[01]_walk_client_list fails, then the most
likely explanation is that the server dropped the clientid before we
actually managed to confirm it. As long as our nfs_client is the very
last one in the list to be tested, the caller can be assured that this
is the case when the final return value is NFS4ERR_STALE_CLIENTID.

Reported-by: Ben Greear <greearb@candelatech.com>
Signed-off-by: Trond Myklebust <Trond.Myklebust@netapp.com>
Cc: Chuck Lever <chuck.lever@oracle.com>
Cc: stable@vger.kernel.org [>=3.7]
Tested-by: Ben Greear <greearb@candelatech.com>
2013-01-27 15:51:28 -05:00