On SoCs the sprom is often stored in nvram in the flashchip. This patch
registers a sprom fallback callback handler in bcma and provides the
sprom needed for this device.
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
Signed-off-by: John W. Linville <linville@tuxdriver.com>
Move the sprom parsing from nvram into sprom.c. There are all values
needed for sprom version 1 to 9 read from nvram and there are more
sanity checks added. This is based on the sprom parsing in the open
source part of the Broadcom SDK.
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
Signed-off-by: John W. Linville <linville@tuxdriver.com>
Explicitly enforce an char array of 6 bytes for the mac address.
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
Signed-off-by: John W. Linville <linville@tuxdriver.com>
With branch stack sampling, it is possible to filter by priv levels.
In system-wide mode, that means it is possible to capture only user
level branches. The builtin SW LBR filter needs to disassemble code
based on LBR captured addresses. For that, it needs to know the task
the addresses are associated with. Because of context switches, the
content of the branch stack buffer may contain addresses from
different tasks.
We need a callback on context switch to either flush the branch stack
or save it. This patch adds a new callback in struct pmu which is called
during context switches. The callback is called only when necessary.
That is when a system-wide context has, at least, one event which
uses PERF_SAMPLE_BRANCH_STACK. The callback is never called for
per-thread context.
In this version, the Intel x86 code simply flushes (resets) the LBR
on context switches (fills it with zeroes). Those zeroed branches are
then filtered out by the SW filter.
Signed-off-by: Stephane Eranian <eranian@google.com>
Signed-off-by: Peter Zijlstra <a.p.zijlstra@chello.nl>
Link: http://lkml.kernel.org/r/1328826068-11713-11-git-send-email-eranian@google.com
Signed-off-by: Ingo Molnar <mingo@elte.hu>
This patch adds an internal sofware filter to complement
the (optional) LBR hardware filter.
The software filter is necessary:
- as a substitute when there is no HW LBR filter (e.g., Atom, Core)
- to complement HW LBR filter in case of errata (e.g., Nehalem/Westmere)
- to provide finer grain filtering (e.g., all processors)
Sometimes the LBR HW filter cannot distinguish between two types
of branches. For instance, to capture syscall as CALLS, it is necessary
to enable the LBR_FAR filter which will also capture JMP instructions.
Thus, a second pass is necessary to filter those out, this is what the
SW filter can do.
The SW filter is built on top of the internal x86 disassembler. It
is a best effort filter especially for user level code. It is subject
to the availability of the text page of the program.
The SW filter is enabled on all Intel processors. It is bypassed
when the user is capturing all branches at all priv levels.
Signed-off-by: Stephane Eranian <eranian@google.com>
Signed-off-by: Peter Zijlstra <a.p.zijlstra@chello.nl>
Link: http://lkml.kernel.org/r/1328826068-11713-9-git-send-email-eranian@google.com
Signed-off-by: Ingo Molnar <mingo@elte.hu>
This patch implements PERF_SAMPLE_BRANCH support for Intel
x86processors. It connects PERF_SAMPLE_BRANCH to the actual LBR.
The patch adds the hooks in the PMU irq handler to save the LBR
on counter overflow for both regular and PEBS modes.
Signed-off-by: Stephane Eranian <eranian@google.com>
Signed-off-by: Peter Zijlstra <a.p.zijlstra@chello.nl>
Link: http://lkml.kernel.org/r/1328826068-11713-8-git-send-email-eranian@google.com
Signed-off-by: Ingo Molnar <mingo@elte.hu>
The patch adds a restriction for Intel Atom LBR support. Only
steppings 10 (PineView) and more recent are supported. Older models
do not have a functional LBR. Their LBR does not freeze on PMU
interrupt which makes LBR unusable in the context of perf_events.
Signed-off-by: Stephane Eranian <eranian@google.com>
Signed-off-by: Peter Zijlstra <a.p.zijlstra@chello.nl>
Link: http://lkml.kernel.org/r/1328826068-11713-7-git-send-email-eranian@google.com
Signed-off-by: Ingo Molnar <mingo@elte.hu>
This patch adds the mappings from the generic PERF_SAMPLE_BRANCH_*
filters to the actual Intel x86LBR filters, whenever they exist.
Signed-off-by: Stephane Eranian <eranian@google.com>
Signed-off-by: Peter Zijlstra <a.p.zijlstra@chello.nl>
Link: http://lkml.kernel.org/r/1328826068-11713-6-git-send-email-eranian@google.com
Signed-off-by: Ingo Molnar <mingo@elte.hu>
If precise sampling is enabled on Intel x86 then perf_event uses PEBS.
To correct for the off-by-one error of PEBS, perf_event uses LBR when
precise_sample > 1.
On Intel x86 PERF_SAMPLE_BRANCH_STACK is implemented using LBR,
therefore both features must be coordinated as they may not
configure LBR the same way.
For PEBS, LBR needs to capture all branches at the priv level of
the associated event.
This patch checks that the branch type and priv level of BRANCH_STACK
is compatible with that of the PEBS LBR requirement, thereby allowing:
$ perf record -b any,u -e instructions:upp ....
But:
$ perf record -b any_call,u -e instructions:upp
Is not possible.
Signed-off-by: Stephane Eranian <eranian@google.com>
Signed-off-by: Peter Zijlstra <a.p.zijlstra@chello.nl>
Link: http://lkml.kernel.org/r/1328826068-11713-5-git-send-email-eranian@google.com
Signed-off-by: Ingo Molnar <mingo@elte.hu>
The Intel LBR on some recent processor is capable
of filtering branches by type. The filter is configurable
via the LBR_SELECT MSR register.
There are limitation on how this register can be used.
On Nehalem/Westmere, the LBR_SELECT is shared by the two HT threads
when HT is on. It is private to each core when HT is off.
On SandyBridge, the LBR_SELECT register is private to each thread
when HT is on. It is private to each core when HT is off.
The kernel must manage the sharing of LBR_SELECT. It allows
multiple users on the same logical CPU to use LBR_SELECT as
long as they program it with the same value. Across sibling
CPUs (HT threads), the same restriction applies on NHM/WSM.
This patch implements this sharing logic by leveraging the
mechanism put in place for managing the offcore_response
shared MSR.
We modify __intel_shared_reg_get_constraints() to cause
x86_get_event_constraint() to be called because LBR may
be associated with events that may be counter constrained.
Signed-off-by: Stephane Eranian <eranian@google.com>
Signed-off-by: Peter Zijlstra <a.p.zijlstra@chello.nl>
Link: http://lkml.kernel.org/r/1328826068-11713-4-git-send-email-eranian@google.com
Signed-off-by: Ingo Molnar <mingo@elte.hu>
This patch adds the LBR definitions for NHM/WSM/SNB and Core.
It also adds the definitions for the architected LBR MSR:
LBR_SELECT, LBRT_TOS.
Signed-off-by: Stephane Eranian <eranian@google.com>
Signed-off-by: Peter Zijlstra <a.p.zijlstra@chello.nl>
Link: http://lkml.kernel.org/r/1328826068-11713-3-git-send-email-eranian@google.com
Signed-off-by: Ingo Molnar <mingo@elte.hu>
This patch adds the ability to sample taken branches to the
perf_event interface.
The ability to capture taken branches is very useful for all
sorts of analysis. For instance, basic block profiling, call
counts, statistical call graph.
This new capability requires hardware assist and as such may
not be available on all HW platforms. On Intel x86 it is
implemented on top of the Last Branch Record (LBR) facility.
To enable taken branches sampling, the PERF_SAMPLE_BRANCH_STACK
bit must be set in attr->sample_type.
Sampled taken branches may be filtered by type and/or priv
levels.
The patch adds a new field, called branch_sample_type, to the
perf_event_attr structure. It contains a bitmask of filters
to apply to the sampled taken branches.
Filters may be implemented in HW. If the HW filter does not exist
or is not good enough, some arch may also implement a SW filter.
The following generic filters are currently defined:
- PERF_SAMPLE_USER
only branches whose targets are at the user level
- PERF_SAMPLE_KERNEL
only branches whose targets are at the kernel level
- PERF_SAMPLE_HV
only branches whose targets are at the hypervisor level
- PERF_SAMPLE_ANY
any type of branches (subject to priv levels filters)
- PERF_SAMPLE_ANY_CALL
any call branches (may incl. syscall on some arch)
- PERF_SAMPLE_ANY_RET
any return branches (may incl. syscall returns on some arch)
- PERF_SAMPLE_IND_CALL
indirect call branches
Obviously filter may be combined. The priv level bits are optional.
If not provided, the priv level of the associated event are used. It
is possible to collect branches at a priv level different from the
associated event. Use of kernel, hv priv levels is subject to permissions
and availability (hv).
The number of taken branch records present in each sample may vary based
on HW, the type of sampled branches, the executed code. Therefore
each sample contains the number of taken branches it contains.
Signed-off-by: Stephane Eranian <eranian@google.com>
Signed-off-by: Peter Zijlstra <a.p.zijlstra@chello.nl>
Link: http://lkml.kernel.org/r/1328826068-11713-2-git-send-email-eranian@google.com
Signed-off-by: Ingo Molnar <mingo@elte.hu>
* pm-domains:
PM / Domains: Fix include for PM_GENERIC_DOMAINS=n case
PM / Domains: Provide a dummy dev_gpd_data() when generic domains are not used
PM / Domains: Run late/early device suspend callbacks at the right time
ARM: EXYNOS: Hook up power domains to generic power domain infrastructure
PM / Domains: Add OF support
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v2.0.18 (GNU/Linux)
iQEcBAABAgAGBQJPUqnkAAoJEDeqqVYsXL0MyTwH/14R9sIt+IdQgMGje6Dys6U1
3wxmNHcxNBB461212i+XVToH72GiPtUyWY8Q3LT+Qcq4Rab9oq8wDffxdgflDLja
sZq9COLR8dmXJM0hduyuysCiNIlmuURV20uIMsDbYutBVtAKKqMd7ZrJBmkVh7xT
slBJf+0lcD5IBYPYwf8lbxAI7E/C5TarMCIZk4z21I8ovF321RlGcyyo6NM62q/P
wvLw4bJuW7nJa3q3B7BznzBcoHLmzo9tiY+CbtQlGhSdasDKJ8HuAegTVyofl6s8
0/RTvaUcqTWUlFxXzLVDT+MCWAUP4GFR66tR2T5tygRi9st70TcpMzISiyZzKi8=
=WzAJ
-----END PGP SIGNATURE-----
Merge tag 'parisc-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/jejb/parisc-2.6
PARISC fixes from James Bottomley:
"This is a set of build fixes to get the cross compiled architecture
testbeds building again"
* tag 'parisc-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/jejb/parisc-2.6:
[PARISC] don't unconditionally override CROSS_COMPILE for 64 bit.
[PARISC] include <linux/prefetch.h> in drivers/parisc/iommu-helpers.h
[PARISC] fix compile break caused by iomap: make IOPORT/PCI mapping functions conditional
s3c2410_dma_suspend suspends channels from 0 to dma_channels.
s3c2410_dma_resume resumes channels in reverse order. So
pointer should be decremented instead of being incremented.
Signed-off-by: Gusakov Andrey <dron0gus@gmail.com>
Reviewed-by: Heiko Stuebner <heiko@sntech.de>
Cc: stable <stable@vger.kernel.org>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
It turned out that a performance counter on AMD does not
count at all when the GO or HO bit is set in the control
register and SVM is disabled in EFER.
This patch works around this issue by masking out the HO bit
in the performance counter control register when SVM is not
enabled.
The GO bit is not touched because it is only set when the
user wants to count in guest-mode only. So when SVM is
disabled the counter should not run at all and the
not-counting is the intended behaviour.
Signed-off-by: Joerg Roedel <joerg.roedel@amd.com>
Signed-off-by: Peter Zijlstra <a.p.zijlstra@chello.nl>
Cc: Avi Kivity <avi@redhat.com>
Cc: Stephane Eranian <eranian@google.com>
Cc: David Ahern <dsahern@gmail.com>
Cc: Gleb Natapov <gleb@redhat.com>
Cc: Robert Richter <robert.richter@amd.com>
Cc: stable@vger.kernel.org # v3.2
Link: http://lkml.kernel.org/r/1330523852-19566-1-git-send-email-joerg.roedel@amd.com
Signed-off-by: Ingo Molnar <mingo@elte.hu>
Pull s390 fixes from Martin Schwidefsky
* 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/s390/linux:
[S390] memory hotplug: prevent memory zone interleave
[S390] crash_dump: remove duplicate include
[S390] KEYS: Enable the compat keyctl wrapper on s390x
Carlos was getting
WARNING: at drivers/pci/pci.c:118 pci_ioremap_bar+0x24/0x52()
when probing his sound card, and sound did not work. After adding
pci=use_crs to the kernel command line, no more trouble.
Ok, we can add a quirk. dmidecode output reveals that this is an MSI
MS-7253, for which we already have a quirk, but the short-sighted
author tied the quirk to a single BIOS version, making it not kick in
on Carlos's machine with BIOS V1.2. If a later BIOS update makes it
no longer necessary to look at the _CRS info it will still be
harmless, so let's stop trying to guess which versions have and don't
have accurate _CRS tables.
Addresses https://bugtrack.alsa-project.org/alsa-bug/view.php?id=5533
Also see <https://bugzilla.kernel.org/show_bug.cgi?id=42619>.
Reported-by: Carlos Luna <caralu74@gmail.com>
Reviewed-by: Bjorn Helgaas <bhelgaas@google.com>
Signed-off-by: Jonathan Nieder <jrnieder@gmail.com>
Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
splits OTG functionality away from transceivers.
We have known for quite a long time that struct otg_transceiver was
a bad name for the structure, considering transceiver is far from
being OTG-specific (see 4e67185).
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1.4.11 (GNU/Linux)
iQIcBAABAgAGBQJPTeeMAAoJEIaOsuA1yqRE6ZAP/j2G6DaDyng6vpyYQi2drXaY
NKx3pA0sC98NACOv6sh+urcMDcDctLmOnwV18U+GNNP+qExQFnyuc7iGsXRxfUOj
qkIbVPxzPcE0opmEMFJ5ZT85rw33DqKjFnQT4av3wwXe/qSrEkAfBoBSb6wn73rA
v0JOhceGsFb+kJAc7U9Ji9A9xSjj+6uw08RTuuQv8KBLb5Pws+NoQ6UEjlni8umA
lkOSelyBZN1OJU+fZKIpS4+SiwtdkZCm2wSIUiwaPosdJgw0w8fz0zNjn/4gAHB1
oPyjjjP3/VDegp9CuYDRlnBgQa2K4V1vbjrBfhKbyar8fsOSoaPVv1fR9VKgVnT8
RKlXKSeFEsdP4fOGYCjNKAzjeQH/qSNzdzo+s4GMqoWq7Lm3+b56zdQWvRmTT7Xg
++bMqFAi0noeU8aZWwSDMFiYv6O19o+Px4OTS/3aRmR1wdJpUUSk2M7Quw6A/YNj
4Q5hDvio2eYtI1nya9yMS/j4ZiJ5fDQb5jUfBDB1MKtkZKKzVVSboK8P/rFq5+xf
xdUfBRd7/fMk+he6RtemfjhMdYTiX6Cm6VzveZVBL4+7dERbnJDRgDhSJOYvA/eW
Bvc7BY+/EYz7msF0gjLyWu3BBiChajk/D5ukoCIssUPGuIhmO1S7JRi1s+fLaNs3
Bz8Haxql69YWrNL2ouQf
=WiB6
-----END PGP SIGNATURE-----
Merge tag 'xceiv-for-v3.4' of git://git.kernel.org/pub/scm/linux/kernel/git/balbi/usb into usb-next
USB: transceiver changes for 3.4
Here we have a big rework done by Heikki Krogerus (thanks) which
splits OTG functionality away from transceivers.
We have known for quite a long time that struct otg_transceiver was
a bad name for the structure, considering transceiver is far from
being OTG-specific (see 4e67185).
* 'at91-fixes' of git://github.com/at91linux/linux-at91:
ARM: at91/dma: DMA controller registering with DT support
ARM: at91/dma: remove platform data from DMA controller
Create a distinction between scheduler related preempt_enable_no_resched()
calls and the nearly one hundred other places in the kernel that do not
want to reschedule, for one reason or another.
This distinction matters for -rt, where the scheduler and the non-scheduler
preempt models (and checks) are different. For upstream it's purely
documentational.
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Link: http://lkml.kernel.org/n/tip-gs88fvx2mdv5psnzxnv575ke@git.kernel.org
Signed-off-by: Ingo Molnar <mingo@elte.hu>
Commit b27b072791 (ARM: 7265/1: restart: S3C24XX: use new restart hook)
introduced the new restart hook also for the S3C244x cpus, but it
was only defined in the S3C2440 scope, i.e. when CPU_S3C2440 was
selected. Devices using the S3C2442 like the GTA02 normally don't select
this CPU which leads to compilation errors like:
LD .tmp_vmlinux1
arch/arm/mach-s3c2440/built-in.o:(.arch.info.init+0x3c): undefined reference
to `s3c2440_restart'
make: *** [.tmp_vmlinux1] Error 1
Therefore move the s3c2440_restart function to s3c244x.c which is
common to both cpus and also fix the naming to reflect this.
Reported-and-tested-by: Denis 'GNUtoo' Carikli <GNUtoo@no-log.org>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
The device link core registers for hsotg is base + 0000h
~ base + 11000h.
Signed-off-by: Joonyoung Shim <jy0922.shim@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
[Rebased on the newest git/kgene/linux-samsung #for-next]
Signed-off-by: Lukasz Majewski <l.majewski@samsung.com>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
Add missing break statement in the function omap3xxx_check_revision.
The commit id 4390f5b2cb [ARM: OMAP: TI814X: Add cpu type macros
and detection support], removed the 'break' statement from the function
omap3xxx_check_revision(), resulting into wrong omap/cpu_revision
initialization for AM335x devices.
Signed-off-by: Vaibhav Hiremath <hvaibhav@ti.com>
[tony@atomide.com: refreshed to apply after changes to cpu_rev]
Signed-off-by: Tony Lindgren <tony@atomide.com>
bits are all for devices that still need to get set up in board code.
Only three platforms are in this set of fixes: omap2+, pxa and lpc32xx.
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1.4.11 (GNU/Linux)
iQIVAwUAT05lqGCrR//JCVInAQK+lhAAhWkKqdXyIswvg5p5Q1oOQziH1MGmXw87
ufu/XgoKE7W8gr/oDfRgUPtzmlg0LVkm/ObvUr2JgNstvZpE6AU1irxLbhNxCbJt
3UJCqc3XWJL08aC0N4s0fj8j2iYv/2ZmO9litBPH1NOhIk+hm3iVqrnSFpdwtcYm
DZhOJg9WXRk93xYZx/CTTjxF+2pnd8XBmz7q6nJFKN6rRslbKuUpHlc6IlfXkQma
btayG2EMWxmXsevOUq9oCGkbp9MozlOfuuSHCfZaUeDXVgf+DUfyx+ZppC/ZS14k
cz9u7U+yRuhGX2lC+7lRC+Bek/i7c8NPTgVb1lRbvitnEzkUcz/8tkrztlSrC5ws
49dKSZUq3jJMb8tl0xFxzKHIQfE+xTrJ7Mor4Tj72XCwIOEcIhAwMYEOCmjpMzER
4g7IypNM0UFdN6/cywAYHX2X/pjjrQfJC1ridqzzUZjcw4b+FEsaWcp5+IV/Yi+D
z41VdlrN0pK3AhDq9IMpDwHtbtOGYJFBl6QdLvLFwR9kEudvDt7cFGHZKT4hsE5L
NqpASxZUfrcX5AQraZqnYMH8EJcOmxPOSp/iFWdOe4m3L1goE2R5oxIwg3ptIjYK
Im2Ye6RrDVjF3bkyAdXXOxiu0OAo17Jt4vX+FvORug12mfxJGiWsdypSBXFDy5go
ozkUx/YTHv0=
=ElaK
-----END PGP SIGNATURE-----
Merge tag 'fixes-3.3-rc6' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc
Arnd Bergmann says:
"Another set of arm-soc bug fixes on top of v3.3-rc5. The few larger
bits are all for devices that still need to get set up in board code.
Only three platforms are in this set of fixes: omap2+, pxa and lpc32xx."
* tag 'fixes-3.3-rc6' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (22 commits)
ARM: LPC32xx: serial.c: Fixed loop limit
ARM: LPC32xx: serial.c: HW bug workaround
ARM: LPC32xx: irq.c: Clear latched event
ARM: LPC32xx: Fix interrupt controller init
ARM: LPC32xx: Fix irq on GPI_28
ARM: OMAP2: fix mailbox init code
ARM: OMAP2+: gpmc-smsc911x: add required smsc911x regulators
ARM: OMAP1: Fix out-of-bounds array access for Innovator
OMAP3 EVM: remove out-of-bounds array access of gpio_leds
ARM: OMAP: Fix build error when mmc_omap is built as module
ARM: OMAP: Fix kernel panic with HSMMC when twl4030_gpio is a module
pxa/hx4700: add platform device and I2C info for AK4641 codec
arch/arm/mach-pxa/: included linux/gpio.h twice
arch/arm/mach-mmp/: some files include some headers twice
ARM: pxa: fix error handling in pxa2xx_drv_pcmcia_probe
ARM: pxa: fix including linux/gpio.h twice
ARM: pxa: fix mixed declarations and code in sharpsl_pm
ARM: pxa: fix wrong parsing gpio event on spitz
ARM: OMAP2+: usb-host: fix compile warning
ARM: OMAP4: Move the barrier memboclk_steal() as part of reserve callback
...
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1.4.11 (GNU/Linux)
iEYEABECAAYFAk9N7bQACgkQ70gcjN2673NSHACgp162blpKTwkDoFKnSHMh2KjQ
VLAAn0rx+4JbbWvMN+TyGRAjHA0CueOx
=t3M1
-----END PGP SIGNATURE-----
Merge tag 'for-3.3' of git://openrisc.net/jonas/linux
Build fixes for 3.3 from Jonas Bonn
* tag 'for-3.3' of git://openrisc.net/jonas/linux:
openrisc: Fix up audit_syscall_[entry|exit]() usage
openrisc: include export.h for EXPORT_SYMBOL
Device tree support on at91sam9g45 family SoC. Only call
platform_device_register() if no dma-controller node is
found in device tree.
Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
Acked-by: Grant Likely <grant.likely@secretlab.ca>
DMA controller can deduce its configuration data from
the platform. Remove the platform data and match device
types with the compatible ones.
Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
Acked-by: Grant Likely <grant.likely@secretlab.ca>
VUSB is a fixed regulator, so get rid of the apply_uV constraint
for it, which fixes the following error seen at boot on omap4
SDP and PANDA boards.
machine_constraints_voltage: VUSB: failed to apply 3300000uV constraint
twl_reg twl_reg.46: can't register VUSB, -22
twl_reg: probe of twl_reg.46 failed with error -22
Signed-off-by: Rajendra Nayak <rnayak@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
The following commit: 2f31b51659
Author: Tero Kristo <t-kristo@ti.com>
Date: Fri Dec 16 14:37:00 2011 -0700
ARM: OMAP4: PRM: use PRCM interrupt handler
introduced the PRCM interrupt handler and thus the need
for 64 more interrupts. Since SPARSE_IRQ is still not fully
functional on OMAP, the NR_IRQS needs to be updated to avoid
the failure that happen during irq_alloc_descs call inside
the PRCM driver:
[ 0.208221] PRCM: failed to allocate irq descs: -12
Later the mux framework is then unable to request an IRQ from
the PRCM interrupt handler.
[ 1.802795] mux: Failed to setup hwmod io irq -22
Fix that by adding 64 more interrupts for OMAP2PLUS config.
Signed-off-by: Benoit Cousson <b-cousson@ti.com>
Cc: Tero Kristo <t-kristo@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
In the spirit of commit 29cf7a30f8 ("x86/PCI: use host bridge _CRS
info on ASUS M2V-MX SE"), this DMI quirk turns on "pci_use_crs" by
default on a board that needs it.
This fixes boot failures and oopses introduced in 3e3da00c01
("x86/pci: AMD one chain system to use pci read out res"). The quirk
is quite targetted (to a specific board and BIOS version) for two
reasons:
(1) to emphasize that this method of tackling the problem one quirk
at a time is a little insane
(2) to give BIOS vendors an opportunity to use simpler tables and
allow us to return to generic behavior (whatever that happens to
be) with a later BIOS update
In other words, I am not at all happy with having quirks like this.
But it is even worse for the kernel not to work out of the box on
these machines, so...
Reference: https://bugzilla.kernel.org/show_bug.cgi?id=42619
Reported-by: Svante Signell <svante.signell@telia.com>
Signed-off-by: Jonathan Nieder <jrnieder@gmail.com>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
All the fixes are for the OMAP IOMMU driver. The first patch is the
biggest one. It fixes the calls of the function omap_find_iovm_area() in
the omap-iommu-debug module which expects a 'struct device' parameter
since commit fabdbca instead of an omap_iommu handle. The
omap-iommu-debug code still passed the handle to the function which
caused a crash.
The second patch fixes a NULL pointer dereference in the OMAP code and
the third patch makes sure that the omap-iommu is initialized before the
omap-isp driver, which relies on the iommu. The last patch is only a
workaround until defered probing is implemented.
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1.4.11 (GNU/Linux)
iQIcBAABAgAGBQJPTK9LAAoJECvwRC2XARrjfLkP/3A8wPy0ALLZ3nbRT2S/9CkL
MyNBI7+J8aqnWHQzyiTryLOzyqrUwBPS5wB/KRg6PUAAiwEZGPc5yZlpIHE+8RwP
ze5JAfddox1XRisQ8A8yJWFnvC/KAeMgAiiFn+egnxQlIZUujzgK/SIzTKyFXGtB
T+7utXB/U0T/GygYYTEJo9gU41NvAyWc8Ji6Uin48RTLRHZ74IQdMAEgf1GsAsvp
CsDrBXqgziKEfkcDYhwRcw3teaMX8gUwnvL4Qm33iUpE4sHLW38l0gVaFPWlMEjr
4OTHWLGrNI+TkvSZyTXXXRH+BTZrzW2RisfYpdCaHbjh0XRJvN4CpOChwSewVF7P
1K4uE/cfV66mOzAecR54v0DazUAuVewmDoXzouLdsT6RRTe4nhSev/821odmHDLm
1zh2WcKMwmiKldbtWnSGghiN3hUzP9yPNUEIc7CmEGwOyTjlIkYdQNI5BhpPY+fd
SoMNzwknIW4qdJJoFw/et9z/sXuqjPFQ2Xuhc6HfGOmODNcZeQ4b1/l2J1ygka0y
hIOjOVFNx1K9pfkDkmsXPFL1xMuWls7qUpcY8zVimE5Z3VPs9EowoJ3ZWK1XH0tZ
tJdntNPfsufRnlqAyqqDKuutXavILwnTLRdeEH6SD4YwKlIxiOrLLLJKlUEWCD0B
RUhyr3i8qqtFm4o9j36K
=aclV
-----END PGP SIGNATURE-----
Merge tag 'iommu-fixes-v3.3-rc5' of git://git.kernel.org/pub/scm/linux/kernel/git/joro/iommu
IOMMU fixes for Linux 3.3-rc5
All the fixes are for the OMAP IOMMU driver. The first patch is the
biggest one. It fixes the calls of the function omap_find_iovm_area() in
the omap-iommu-debug module which expects a 'struct device' parameter
since commit fabdbca instead of an omap_iommu handle. The
omap-iommu-debug code still passed the handle to the function which
caused a crash.
The second patch fixes a NULL pointer dereference in the OMAP code and
the third patch makes sure that the omap-iommu is initialized before the
omap-isp driver, which relies on the iommu. The last patch is only a
workaround until defered probing is implemented.
* tag 'iommu-fixes-v3.3-rc5' of git://git.kernel.org/pub/scm/linux/kernel/git/joro/iommu:
ARM: OMAP: make iommu subsys_initcall to fix builtin omap3isp
iommu/omap: fix NULL pointer dereference
iommu/omap: fix erroneous omap-iommu-debug API calls
The user may wish to set their own value (for real cross compiles). Since the
top level Makefile initialises CROSS_COMPILE to empty by default, we must
check it for being empty (rather than for being defined) before we override.
Reported-by: Paul Gortmaker <paul.gortmaker@windriver.com>
Signed-off-by: James Bottomley <JBottomley@Parallels.com>
The major features of this series are:
- making RCU more aggressive about entering dyntick-idle mode in order to
improve energy efficiency
- converting a few more call_rcu()s to kfree_rcu()s
- applying a number of rcutree fixes and cleanups to rcutiny
- removing CONFIG_SMP #ifdefs from treercu
- allowing RCU CPU stall times to be set via sysfs
- adding CPU-stall capability to rcutorture
- adding more RCU-abuse diagnostics
- updating documentation
- fixing yet more issues located by the still-ongoing top-to-bottom
inspection of RCU, this time with a special focus on the
CPU-hotplug code path.
Signed-off-by: Ingo Molnar <mingo@elte.hu>
This patch fixes a HW bug by flushing RX FIFOs of the UARTs on init. It was
ported from NXP's git.lpclinux.com tree.
Signed-off-by: Roland Stigge <stigge@antcom.de>
Cc: stable@vger.kernel.org
This patch fixes the initialization of the interrupt controller of the LPC32xx
by correctly setting up SIC1 and SIC2 instead of (wrongly) using the same value
as for the Main Interrupt Controller (MIC).
Signed-off-by: Roland Stigge <stigge@antcom.de>
Cc: stable@vger.kernel.org
