Some SMMUs can walk page tables in the CPU cache, avoiding the need to
do cache maintenance operations on the page table memory. Don't do
cache maintenance on SMMUs with coherent page tables.
Change-Id: I47e00e72548212209b59c13a0d7d59cb0ab964ff
Signed-off-by: Mitchel Humpherys <mitchelh@codeaurora.org>
Add an "inline" so the compiler no longer gives a defined-but-not-used
warning.
Change-Id: I226242bf994e659d8018a885f20c3a3f80b9b8e5
Signed-off-by: Patrick Daly <pdaly@codeaurora.org>
A common software error when it comes to page table code is missing TLB
maintenance. Add some checks to the io-pgtable-fast code to detect when
an address that might be stale in the TLB is being re-used. This can be
accomplished by writing a "stale TLB" flag value to the reserved bits of
the PTE during unmap and then removing the flag value when the TLBs are
invalidated (by sweeping the entire page table). That way, whenever we
map we can know that there might be a stale TLB in the location being
mapped into if it contains the "stale TLB" flag value.
CRs-Fixed: 997751
Change-Id: Icf9c1e41977cb71e8b137190adb3b4a201c339da
Signed-off-by: Mitchel Humpherys <mitchelh@codeaurora.org>
io-pgtable-fast does some underhanded tricks to achieve performance.
One of those tricks is that it expects clients to call its map function
directly, rather than going through the IOMMU framework. Add a DMA API
implementation that goes through io-pgtable-fast.
CRs-Fixed: 997751
Change-Id: Iebcafeb630d9023f666078604898069e9f26dfdd
Signed-off-by: Mitchel Humpherys <mitchelh@codeaurora.org>
