Commit graph

597159 commits

Author SHA1 Message Date
Alex Yakavenka
baf99c4702 ARM: dts: msm: Remove rh850 device node from mizar
Mizar board doesn't have rh850 can controller

Change-Id: Ie3eb224fc4dfa71da7d290bfaf47ae4b9fcaceb4
Signed-off-by: Alex Yakavenka <ayakav@codeaurora.org>
2018-02-08 14:13:13 -08:00
Camus Wong
fe9857b511 DRM: SDE: Avoid vblank request to the same state
This change add check to existing vblank request state.  It will avoid
enable vblank multiple times.  It will also avoid disable vblank
multiple times.

Change-Id: I10781c33e51b1032b72fcbc1a01a7d01be8be510
Signed-off-by: Camus Wong <camusw@codeaurora.org>
2018-02-08 15:25:39 -05:00
Linux Build Service Account
6ca24c92b8 Merge "mm-camera2:isp2: Handle use after free buffer" 2018-02-08 08:43:54 -08:00
Tharun Kumar Merugu
e569b915a2 msm: ADSPRPC: Use ID in response to get context pointer
Send context ID in rpc header instead of context pointer.
Validate context ID received in response and get context pointer.

Change-Id: I9cfd10d0c1b25c3085b8e15c7ca1c8ff214bf10d
Acked-by: Viswanatham Paduchuri <vpaduchu@qti.qualcomm.com>
Signed-off-by: Tharun Kumar Merugu <mtharu@codeaurora.org>
2018-02-08 15:30:54 +05:30
Marc Zyngier
03ac41373f arm64: Move BP hardening to check_and_switch_context
We call arm64_apply_bp_hardening() from post_ttbr_update_workaround,
which has the unexpected consequence of being triggered on every
exception return to userspace when ARM64_SW_TTBR0_PAN is selected,
even if no context switch actually occured.

This is a bit suboptimal, and it would be more logical to only
invalidate the branch predictor when we actually switch to
a different mm.

In order to solve this, move the call to arm64_apply_bp_hardening()
into check_and_switch_context(), where we're guaranteed to pick
a different mm context.

Change-Id: I28f2fb09b77544e5ead095e9dad1ad64b2b3ae36
Acked-by: Will Deacon <will.deacon@arm.com>
Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
Git-commit: a8e4c0a919ae310944ed2c9ace11cf3ccd8a609b
Git-repo: git://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
Signed-off-by: Srinivas Ramana <sramana@codeaurora.org>
2018-02-08 01:50:38 -08:00
Srinivas Ramana
21393ff3ea arm64: Add BTAC/LinkStack sanitizations for Kryo cores
Kryo cores are exposed to two vulnerabilities due to subroutine return
(called LINK-STACK) and branch target predictors.
These two issues can be mitigated through software workarounds.

Kernel:
 - Apply LINK-STACK mitigation which is to issue 16 nested BL instructions
   on process context switch 'cpu_do_switch_mm()' where ASID changes.
 - Apply psci based branch predictor invalidation.

use the kryo core detection routine (based on MIDR) from the
commit bb48711800e6d ("arm64: cpu_errata: Add Kryo to Falkor 1003 errata")
by Stephen Boyd <sboyd@codeaurora.org>.

Change-Id: I81e8e72e7fa219f12dfe8ec39836eb8eb3c4c7b0
Signed-off-by: Srinivas Ramana <sramana@codeaurora.org>
2018-02-08 01:50:16 -08:00
Shanker Donthineni
f62d97e9b4 arm64: Implement branch predictor hardening for Falkor
Falkor is susceptible to branch predictor aliasing and can
theoretically be attacked by malicious code. This patch
implements a mitigation for these attacks, preventing any
malicious entries from affecting other victim contexts.

Change-Id: I535d423c2cefaf93627267b867bf0846e502d4c1
Signed-off-by: Shanker Donthineni <shankerd@codeaurora.org>
[will: fix label name when !CONFIG_KVM and remove references to MIDR_FALKOR]
Signed-off-by: Will Deacon <will.deacon@arm.com>
Git-commit: ec82b567a74fbdffdf418d4bb381d55f6a9096af
Git-repo: git://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
[sramana@codeaurora.org: Use only the link stack sanitization routines,
and leave Falkor related BP hardening code]
Signed-off-by: Srinivas Ramana <sramana@codeaurora.org>
2018-02-08 15:13:20 +05:30
Mohammed Javid
36737be7c6 msm: ipa: Fix to add string NULL terminator
Missing null terminator to userspcae provided
string leads to strlen buffer overflow in strlcpy function.
Added code changes to fix string NULL terminator issue.

Change-Id: I3f9d5f22fbb26f68de12370bc5e07a4e6bc2ced9
Acked-by: Ashok Vuyyuru <avuyyuru@qti.qualcomm.com>
Signed-off-by: Mohammed Javid <mjavid@codeaurora.org>
2018-02-07 22:49:47 -08:00
Vijay kumar Tumati
ca6497929a msm: camera: change csiphy CDR regulator voltage on sdm660
Set the appropriate regulator voltage to run csiphy in
cphy mode.

Change-Id: I1d6d65115e294dbf72560c8066b45bed0b03b92a
Signed-off-by: Vijay kumar Tumati <vtumati@codeaurora.org>
2018-02-08 11:15:41 +05:30
Sameer Thalappil
db441e2f4c cnss: Add support to program MAC address thru debugfs
MAC addresses provisioning thru CNSS is usually done by OEM drivers.
Debugfs interfaces can be used for internal testing.

Change-Id: I1a2693835ac09619baf03ee7d2e1b69dbe48559f
Signed-off-by: Sameer Thalappil <sameert@codeaurora.org>
2018-02-07 21:14:51 -08:00
Linux Build Service Account
f0020b57b5 Merge "i2c-msm-v2: Use "subsys" instead of "arch" initcall" 2018-02-07 17:11:15 -08:00
Linux Build Service Account
324ecc4547 Merge "ath10k: Enable wlan firmware based on the driver mode" 2018-02-07 17:11:14 -08:00
Linux Build Service Account
645d6ad33c Merge "power: smb1351-charger: Fix check in shutdown path for parallel disable" 2018-02-07 08:41:44 -08:00
Linux Build Service Account
f5c9996a31 Merge "cnss_utils: Add support for derived MAC address" 2018-02-07 08:41:42 -08:00
Linux Build Service Account
b7c0ad4f6b Merge "drm/msm: Corrected CCU load bit configuration" 2018-02-07 08:41:41 -08:00
Srinivas Ramana
254d671c83 arch: arm64: Add midr values for kryo2xx big cores
Add midr value for kryo2xx big cores to apply errata workarounds for
branch prediction hardening.

Change-Id: I7ca9cfa3e6b48d5af78a5297cb76ebe6f52e519e
Signed-off-by: Srinivas Ramana <sramana@codeaurora.org>
2018-02-07 04:16:55 -08:00
Will Deacon
ac2491ab10 arm64: Implement branch predictor hardening for affected Cortex-A CPUs
Cortex-A57, A72, A73 and A75 are susceptible to branch predictor aliasing
and can theoretically be attacked by malicious code.

This patch implements a PSCI-based mitigation for these CPUs when available.
The call into firmware will invalidate the branch predictor state, preventing
any malicious entries from affecting other victim contexts.

Change-Id: I554536e8e5cb3839e102299da8f5b944415b1880
Co-developed-by: Marc Zyngier <marc.zyngier@arm.com>
Signed-off-by: Will Deacon <will.deacon@arm.com>
Git-commit: aa6acde65e03186b5add8151e1ffe36c3c62639b
Git-repo: git://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
Signed-off-by: Srinivas Ramana <sramana@codeaurora.org>
2018-02-07 04:16:43 -08:00
Marc Zyngier
a2c10034c9 arm64: Define Cortex-A73 MIDR
As we're about to introduce a new workaround that is specific to
Cortex-A73, let's define the coresponding MIDR.

Change-Id: Iabb0e83a0eadddbde458fdafd1224e442b6f3e63
Acked-by: Thomas Gleixner <tglx@linutronix.de>
Acked-by: Mark Rutland <mark.rutland@arm.com>
Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
Git-commit: 199fd2bff4040985fbd7853cc39b7245fcf54bb9
Git-repo: git://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
[sramana@codeaurora.org: Resolve trivial merge conflicts]
Signed-off-by: Srinivas Ramana <sramana@codeaurora.org>
2018-02-07 04:16:32 -08:00
Will Deacon
424c93be33 arm64: cputype: Add missing MIDR values for Cortex-A72 and Cortex-A75
Hook up MIDR values for the Cortex-A72 and Cortex-A75 CPUs, since they
will soon need MIDR matches for hardening the branch predictor.

Change-Id: I59af5ea4af17198aa70d2ba4b25f729a562727ee
Signed-off-by: Will Deacon <will.deacon@arm.com>
Git-commit: a65d219fe5dc7887fd5ca04c2ac3e9a34feb8dfc
Git-repo: git://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
[sramana@codeaurora.org: Resolve trivial merge conflicts]
Signed-off-by: Srinivas Ramana <sramana@codeaurora.org>
2018-02-07 04:16:21 -08:00
Marc Zyngier
cdf382ed61 arm64: cpu_errata: Allow an erratum to be match for all revisions of a core
Some minor erratum may not be fixed in further revisions of a core,
leading to a situation where the workaround needs to be updated each
time an updated core is released.

Introduce a MIDR_ALL_VERSIONS match helper that will work for all
versions of that MIDR, once and for all.

Change-Id: Icbb685f79205ba45f9c990d83cf961616b0d96b7
Acked-by: Thomas Gleixner <tglx@linutronix.de>
Acked-by: Mark Rutland <mark.rutland@arm.com>
Acked-by: Daniel Lezcano <daniel.lezcano@linaro.org>
Reviewed-by: Suzuki K Poulose <suzuki.poulose@arm.com>
Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
Git-commit: 06f1494f837da8997d670a1ba87add7963b08922
Git-repo: git://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
[sramana@codeaurora.org: Fix merge conflicts]
Signed-off-by: Srinivas Ramana <sramana@codeaurora.org>
2018-02-07 04:16:08 -08:00
Will Deacon
4e56397ea6 arm64: Add skeleton to harden the branch predictor against aliasing attacks
Aliasing attacks against CPU branch predictors can allow the attacks to
redirect speculative control flow on some CPUs and potentially divulge
information from one context to another.

This patch adds initial skeleton code behind a new Kconfig option to
enable implementation-specific mitigations against these attacks for
CPUs that are affected.

Change-Id: I07fba1943dd63df8951bf68fac947666100e5559
Co-developed-by: Marc Zyngier <marc.zyngier@arm.com>
Signed-off-by: Will Deacon <will.deacon@arm.com>
Git-commit: 0f15adbb2861ce6f75ccfc5a92b19eae0ef327d0
Git-repo: git://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
[sramana@codeaurora.org: Fix merge conflicts and make it
compilable on msm-4.4]
Signed-off-by: Srinivas Ramana <sramana@codeaurora.org>
2018-02-07 17:33:15 +05:30
Atanas Filipov
1b0c0d8c44 i2c-msm-v2: Use "subsys" instead of "arch" initcall
The i2c-msm-v2 driver trying to get the clocks too early, but
the clock framework is not initialized yet. The change of the
initcall type reducing deferred calls and improving boot time.

Info:
[0.212999] i2c-msm-v2 78b6000.i2c: probing driver i2c-msm-v2
[0.213172] i2c-msm-v2 78b6000.i2c: error on clk_get(core_clk):-517
-- snipped --
[0.275922] i2c-msm-v2 78b6000.i2c: probing driver i2c-msm-v2
[0.276086] i2c-msm-v2 78b6000.i2c: error on clk_get(core_clk):-517
-- snipped --
[0.302980] msm_mpm_dev_probe(): Cannot get clk resource for XO: -517
[0.303394] i2c-msm-v2 78b6000.i2c: probing driver i2c-msm-v2
-- snipped --

Change-Id: Ia8c110b5f67eeec07586adb30ec3a7aff7ce265a
Signed-off-by: Atanas Filipov <afilipov@codeaurora.org>
2018-02-07 14:55:25 +05:30
Cong Tang
f092d46f0f ASoC: msm: Upgrade Machine Driver to Support 32 Channels
Upgrade machine driver to support 32 channels include expose mixer
controls for TERT/QUAT slot_number and slot_width and also slot
mapping configuration.

Change-Id: Ie0a73cf45a6daf3d4aced02cd99aa0ec09cb7c48
Signed-off-by: Cong Tang <congt@codeaurora.org>
2018-02-07 16:10:22 +08:00
Linux Build Service Account
e0c650273e Merge "reg: qcom: call reg notifier during wiphy registration" 2018-02-06 23:46:59 -08:00
Linux Build Service Account
2be3fbd7ed Merge "drm/msm: restore perfcounter after turning on GPMU" 2018-02-06 23:46:57 -08:00
Linux Build Service Account
84d2490998 Merge "ath10k: Handle mgmt tx completion event" 2018-02-06 23:46:56 -08:00
Sameer Thalappil
e2b2768357 cnss_utils: Add support for derived MAC address
MAC address programmed thru CNSS could be provisioned or
derived MAC address. So add support for programming the derived
MAC address.

Change-Id: I2fae232e32a8600949c286346acd05afefd94ef8
Signed-off-by: Sameer Thalappil <sameert@codeaurora.org>
2018-02-06 20:36:18 -08:00
Cong Tang
9ae73bba1f ASoC: msm: Update Audio Header File for 32 Channels Support
Update audio header files include new macro and structure definitions
for 32 channels support.

Change-Id: Idf5e92f7fda4b820b1a7f01001a683772281d8ba
Signed-off-by: Cong Tang <congt@codeaurora.org>
2018-02-07 10:23:23 +08:00
Linux Build Service Account
1766dce24a Merge "lpm-stats: cleanup lpm stats processing sanity wrapping" 2018-02-06 15:07:47 -08:00
Linux Build Service Account
53c56ac0a5 Merge "Merge android-4.4.114 (fe09418) into msm-4.4" 2018-02-06 15:07:46 -08:00
Gustavo Solaira
a8c85fc795 ARM: dts: msm: Disable SPI CAN controller on msm8996 CV2X boards
Disable the SPI based CAN controller on msm8996 CV2X boards
since they are using the USB based CAN controller now.

Change-Id: I57cccee0b9ffa59f516747350160907960048a6a
Signed-off-by: Gustavo Solaira <gustavos@codeaurora.org>
2018-02-06 13:42:15 -08:00
Kiran Kumar Lokere
2aa0bb3ac0 reg: qcom: call reg notifier during wiphy registration
Call reg notifier for self managed hints during wiphy
registration. Call the notifier with last reg-domain
request.

CRs-Fixed: 2183721
Change-Id: I4fdc0a8fae94f774c4b923fba26a8eec1c96730d
Signed-off-by: Kiran Kumar Lokere <klokere@codeaurora.org>
2018-02-06 11:44:16 -08:00
Will Deacon
24c543be85 drivers/firmware: Expose psci_get_version through psci_ops structure
Entry into recent versions of ARM Trusted Firmware will invalidate the CPU
branch predictor state in order to protect against aliasing attacks.

This patch exposes the PSCI "VERSION" function via psci_ops, so that it
can be invoked outside of the PSCI driver where necessary.

Change-Id: Id6edce067d098ed7aca19ad9321c858c89097966
Acked-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Signed-off-by: Will Deacon <will.deacon@arm.com>
Git-commit: d68e3ba5303f7e1099f51fdcd155f5263da8569b
Git-repo: git://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
Signed-off-by: Srinivas Ramana <sramana@codeaurora.org>
2018-02-06 20:03:53 +05:30
Will Deacon
715fcb10be arm64: cpufeature: Pass capability structure to ->enable callback
In order to invoke the CPU capability ->matches callback from the ->enable
callback for applying local-CPU workarounds, we need a handle on the
capability structure.

This patch passes a pointer to the capability structure to the ->enable
callback.

Change-Id: Ie9a18c7a5d721dcb3d3d6c6001c74366525cf87e
Reviewed-by: Suzuki K Poulose <suzuki.poulose@arm.com>
Signed-off-by: Will Deacon <will.deacon@arm.com>
Git-commit: 0a0d111d40fd1dc588cc590fab6b55d86ddc71d3
Git-repo: git://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
Signed-off-by: Srinivas Ramana <sramana@codeaurora.org>
2018-02-06 20:03:49 +05:30
Andre Przywara
ce870f33b6 arm64: errata: Calling enable functions for CPU errata too
Currently we call the (optional) enable function for CPU _features_
only. As CPU _errata_ descriptions share the same data structure and
having an enable function is useful for errata as well (for instance
to set bits in SCTLR), lets call it when enumerating erratas too.

Change-Id: Ie5d4d14dc1c0006423196e9fc1b102655f0c13b2
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Reviewed-by: Suzuki K Poulose <suzuki.poulose@arm.com>
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
Git-commit: 8e2318521bf5837dae093413f81292b59d49d030
Git-repo: git://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
[sramana@codeaurora.org: Resolve trivial merge conflicts]
Signed-off-by: Srinivas Ramana <sramana@codeaurora.org>
2018-02-06 20:03:44 +05:30
John Zhao
819b1faf12 lpm-stats: cleanup lpm stats processing sanity wrapping
during list_for_each_entry_reverse iteration, cleanup_stats
recursively on current operated stats node could result it
will be freed at the end of that cleanup_stats progress.
De-referencing it again should not happen.

CRs-Fixed: 2182622
Change-Id: Icf837b0aa796fed5fe1721f9fe66fd0dd36ccfd7
Signed-off-by: John Zhao <yuankuiz@codeaurora.org>
2018-02-06 06:25:17 -08:00
Mohammed Javid
6cb84eed2d msm: ipa: dynamic memory leak fix
This is a fix for dynamic memory leak seen with incorrectly
allocating memory of a different size than with intended
size.

Change-Id: I350719dadad9fd5c7f35a334e81c8d9f2298f888
Acked-by: Jyothi Jayanthi <jyothij@qti.qualcomm.com>
Acked-by: Ashok Vuyyuru <avuyyuru@qti.qualcomm.com>
Signed-off-by: Michael Adisumarta <madisuma@codeaurora.org>
Signed-off-by: Mohammed Javid <mjavid@codeaurora.org>
2018-02-06 02:47:19 -08:00
Cong Tang
bc6ca96313 ASoC: msm: qdsp6v2: Add support to query AVCS version info
Add APIs to get AVCS service version info.

Change-Id: Ib62f76e5e605869c1683bc9dfc5adbdf70e531c0
Signed-off-by: Cong Tang <congt@codeaurora.org>
2018-02-06 00:12:39 -08:00
Rakesh Pillai
ad91e76196 ath10k: Enable wlan firmware based on the driver mode
The firmware is always enabled in the mission mode,
even if the driver is in the utf mode. This causes
unexpected behaviour when driver is in utf mode.

Enable the firmware in FTM mode if the driver is
started in UTF mode, else enable the firmware in
the normal mission mode.

Change-Id: I4da204b6d19d41e208465a8314bfb8cacc346f4b
Signed-off-by: Rakesh Pillai <pillair@codeaurora.org>
2018-02-06 12:36:15 +05:30
Rahul Sharma
9de2b620dc msm: ais: sensor: Fix out of bound read for region params
The region index is not validated against the region size.
This causes out-of-bound read on the KASAN kernel. Hence
adding restriction that region index is smaller than region size.

Change-Id: I3ebccee89f6e48a84389eb3b9055bc6e09e0310b
Signed-off-by: Rahul Sharma <sharah@codeaurora.org>
2018-02-05 22:30:08 -08:00
Linux Build Service Account
a7e3f3f2de Merge "diag: Fix possible use-after-free issue for mdlog session info" 2018-02-05 16:30:01 -08:00
Linux Build Service Account
68a2f1c190 Merge "ARM: dts: qcom: add an empty hab into the baseline vplatform" 2018-02-05 16:29:59 -08:00
Linux Build Service Account
9c85fe89c6 Merge "reg: qcom: call regulatory callback for self managed hints" 2018-02-05 16:29:58 -08:00
Linux Build Service Account
a15bce8f33 Merge "msm: sensor: actuator: fix out of bound read for region params" 2018-02-05 07:53:20 -08:00
Venkateswara Rao Tadikonda
0a281e5e64 drm/msm: Corrected CCU load bit configuration
CCU load_bit is supposed to be configured for RB_PERFCTR_CCU register, but
it is configured for RB_POWERCTR_CCU register. Updated the RB_PERFCTR_CCU
register configuration with CCU load_bit.

Change-Id: I3b4ce056923b5bd39bc274a0744008f5bc5db0f1
Signed-off-by: Venkateswara Rao Tadikonda <vtadik@codeaurora.org>
2018-02-05 15:51:15 +05:30
Venkateswara Rao Tadikonda
e8df2440a4 drm/msm: restore perfcounter after turning on GPMU
Restore of TP perfcounters before turning ON the GPMU causes the GPU fault
and recovery. Restore the perfcounters after turning ON the GPMU.

Change-Id: I3c00ed0a487d452e29f360300f92227784b81bbf
Signed-off-by: Venkateswara Rao Tadikonda <vtadik@codeaurora.org>
2018-02-05 15:49:56 +05:30
Linux Build Service Account
980d13d0d0 Merge "ASoC: msm: qdsp6v2: Fix Set Lpass Clk Timeout Issue" 2018-02-04 23:33:30 -08:00
Srinivasarao P
2fd547e8d1 Merge android-4.4.115 (aa856bd) into msm-4.4
* refs/heads/tmp-aa856bd
  Linux 4.4.115
  spi: imx: do not access registers while clocks disabled
  serial: imx: Only wakeup via RTSDEN bit if the system has RTS/CTS
  selinux: general protection fault in sock_has_perm
  usb: uas: unconditionally bring back host after reset
  usb: f_fs: Prevent gadget unbind if it is already unbound
  USB: serial: simple: add Motorola Tetra driver
  usbip: list: don't list devices attached to vhci_hcd
  usbip: prevent bind loops on devices attached to vhci_hcd
  USB: serial: io_edgeport: fix possible sleep-in-atomic
  CDC-ACM: apply quirk for card reader
  USB: cdc-acm: Do not log urb submission errors on disconnect
  USB: serial: pl2303: new device id for Chilitag
  usb: option: Add support for FS040U modem
  staging: rtl8188eu: Fix incorrect response to SIOCGIWESSID
  usb: gadget: don't dereference g until after it has been null checked
  media: usbtv: add a new usbid
  scsi: ufs: ufshcd: fix potential NULL pointer dereference in ufshcd_config_vreg
  scsi: aacraid: Prevent crash in case of free interrupt during scsi EH path
  xfs: ubsan fixes
  drm/omap: Fix error handling path in 'omap_dmm_probe()'
  kmemleak: add scheduling point to kmemleak_scan()
  SUNRPC: Allow connect to return EHOSTUNREACH
  quota: Check for register_shrinker() failure.
  net: ethernet: xilinx: Mark XILINX_LL_TEMAC broken on 64-bit
  hwmon: (pmbus) Use 64bit math for DIRECT format values
  lockd: fix "list_add double add" caused by legacy signal interface
  nfsd: check for use of the closed special stateid
  grace: replace BUG_ON by WARN_ONCE in exit_net hook
  nfsd: Ensure we check stateid validity in the seqid operation checks
  nfsd: CLOSE SHOULD return the invalid special stateid for NFSv4.x (x>0)
  xen-netfront: remove warning when unloading module
  KVM: VMX: Fix rflags cache during vCPU reset
  btrfs: fix deadlock when writing out space cache
  mac80211: fix the update of path metric for RANN frame
  openvswitch: fix the incorrect flow action alloc size
  drm/amdkfd: Fix SDMA oversubsription handling
  drm/amdkfd: Fix SDMA ring buffer size calculation
  drm/amdgpu: Fix SDMA load/unload sequence on HWS disabled mode
  bcache: check return value of register_shrinker
  cpufreq: Add Loongson machine dependencies
  ACPI / bus: Leave modalias empty for devices which are not present
  KVM: x86: ioapic: Preserve read-only values in the redirection table
  KVM: x86: ioapic: Clear Remote IRR when entry is switched to edge-triggered
  KVM: x86: ioapic: Fix level-triggered EOI and IOAPIC reconfigure race
  KVM: X86: Fix operand/address-size during instruction decoding
  KVM: x86: Don't re-execute instruction when not passing CR2 value
  KVM: x86: emulator: Return to user-mode on L1 CPL=0 emulation failure
  igb: Free IRQs when device is hotplugged
  mtd: nand: denali_pci: add missing MODULE_DESCRIPTION/AUTHOR/LICENSE
  gpio: ath79: add missing MODULE_DESCRIPTION/LICENSE
  gpio: iop: add missing MODULE_DESCRIPTION/AUTHOR/LICENSE
  power: reset: zx-reboot: add missing MODULE_DESCRIPTION/AUTHOR/LICENSE
  crypto: af_alg - whitelist mask and type
  crypto: aesni - handle zero length dst buffer
  ALSA: seq: Make ioctls race-free
  kaiser: fix intel_bts perf crashes
  x86/pti: Make unpoison of pgd for trusted boot work for real
  bpf: reject stores into ctx via st and xadd
  bpf: fix 32-bit divide by zero
  bpf: fix divides by zero
  bpf: avoid false sharing of map refcount with max_entries
  bpf: arsh is not supported in 32 bit alu thus reject it
  bpf: introduce BPF_JIT_ALWAYS_ON config
  bpf: fix bpf_tail_call() x64 JIT
  x86: bpf_jit: small optimization in emit_bpf_tail_call()
  bpf: fix branch pruning logic
  loop: fix concurrent lo_open/lo_release
  ANDROID: sdcardfs: Protect set_top
  ANDROID: fsnotify: Notify lower fs of open
  Revert "ANDROID: sdcardfs: notify lower file of opens"
  ANDROID: sdcardfs: Use lower getattr times/size
  ANDROID: sched/rt: schedtune: Add boost retention to RT

Conflicts:
	arch/x86/Kconfig
	kernel/sched/rt.c

Change-Id: I91b08e1b8e0a1c6ca9c245597acad0bf197f9527
Signed-off-by: Srinivasarao P <spathi@codeaurora.org>
2018-02-05 11:59:38 +05:30
Rahul Sharma
433a3513cb msm: ais: Synchronize v4l2 subscribe and unsubscribe event
Serializing msm_subscribe_event and msm_unsubscribe_event to
prevent possibility of use-after-free if same event is
unsubcribed before v4l2 subscribe and unsubscribe event.

Change-Id: Ia5ba7aa1338982b3a99616a2981e415c28f8b4a6
Signed-off-by: Rahul Sharma <sharah@codeaurora.org>
2018-02-04 22:08:29 -08:00
Haibin Liu
6821542253 msm: sensor: actuator: fix out of bound read for region params
Issue:
the region index is not validated against the region size.
this cause out-of-bound read on the KASAN kernel.

Fix:
Add restriction that region index smaller than region size.

CRs-Fixed: 2153841
Change-Id: I141bba45662769f0661c947fb642c2671578f32e
Signed-off-by: Haibin Liu <haibinl@codeaurora.org>
2018-02-04 19:10:18 -08:00