Commit graph

571366 commits

Author SHA1 Message Date
Joonwoo Park
ee800fccbe sched: fix incorrect type casting in trace events
CPU cycles and execution time are in u64.

Change-Id: Ifb3ce3fd2c5c6bf4d658137214b73659a60fd9d7
Signed-off-by: Joonwoo Park <joonwoop@codeaurora.org>
2016-06-21 15:12:06 -07:00
Phani Kumar Uppalapati
a0da30d1ba ASoC: dapm: Avoid static route b/w cpu and codec dai
Currently ASoC core creates a static route b/w
playback/capture widgets of cpu and codec dai
if they are part of the same dai-link. However
this will cause codec path to get powered up first
followed by the backend dai start during device
switch use-case where the front-end is not closed,
leading to audio playback failure if either bit-width
or sample rate is different.

CRs-Fixed: 1029118
Change-Id: I180515f2ad55d1f446ad7eb1ad0bd71809db94bd
Signed-off-by: Phani Kumar Uppalapati <phaniu@codeaurora.org>
2016-06-21 15:11:54 -07:00
Nikhilesh Reddy
ddd6e3c830 fs:fuse: Disable passthrough when mmap is called on a file
When some data is written to a file both mmap and regular io
there can be race conditions that can cause incorrect data
to be saved.

Disable passthrough on the specific files on which  mmap is called
until we add mmap support to passthrough.

Change-Id: Ic24219ab22d3130aa7e9e998a9e6798648a7321c
Signed-off-by: Nikhilesh Reddy <reddyn@codeaurora.org>
2016-06-21 15:11:43 -07:00
Ghanim Fodi
38d03cd71e msm: ipa3: Move IPA FnR building to IPAHAL
IPA Filtering and Routing rules and tables building is
a logic related to IPA H/W. As such, migrating this
logic to IPAHAL (H/W abstraction layer) of IPA driver
and adapt the core driver code to use it.
New internal S/W API is added to access IPAHAL for
Filtering and Routing rules and tables building and
clearing.

CRs-Fixed: 1006485
Change-Id: I23a95be86412987f72287138817235d3f1f9bc61
Signed-off-by: Ghanim Fodi <gfodi@codeaurora.org>
2016-06-21 15:11:32 -07:00
Joonwoo Park
c876c09f58 sched: kill unnecessary divisions on fast path
The max_possible_efficiency and CPU's efficiency are fixed values which
are determined at cluster allocation time.  Avoid division on the fast
by using precomputed scale factor.

Also update_cpu_busy_time() doesn't need to know how many full windows
have elapsed.  Thus replace unneeded division with simple comparison.

Change-Id: I2be1aad3fb9b895e4f0917d05bd8eade985bbccf
Suggested-by: Syed Rameez Mustafa <rameezmustafa@codeaurora.org>
Signed-off-by: Joonwoo Park <joonwoop@codeaurora.org>
2016-06-21 15:11:21 -07:00
Joonwoo Park
47c31979a1 sched: prevent race where update CPU cycles
Updating cycle counter should be serialized by holding rq lock.
Add missing rq lock hold when cycle counter is updated by irq entry
point.

Change-Id: I92cf75d047a45ebf15a6ddeeecf8fc3823f96e5d
Signed-off-by: Joonwoo Park <joonwoop@codeaurora.org>
2016-06-21 15:11:07 -07:00
Joonwoo Park
14ac5ed8b8 sched: fix overflow in scaled execution time calculation
Task execution time in nanoseconds and CPU cycle counters are large
enough to cause overflow when we multiply both.  Avoid overflow by
calculating frequency separately.

Change-Id: I076d9ecd27cb1c1f11578f009ebe1a19c1619454
Signed-off-by: Joonwoo Park <joonwoop@codeaurora.org>
2016-06-21 15:10:56 -07:00
Joonwoo Park
c07e88c80f sched: remove unused parameter cpu from cpu_cycles_to_freq()
The function parameter cpu isn't used anymore by cpu_cycles_to_freq().
So remove it.

Change-Id: Ide19321206dacb88fedca97e1b689d740f872866
Signed-off-by: Joonwoo Park <joonwoop@codeaurora.org>
2016-06-21 15:10:22 -07:00
Divya Ponnusamy
dcd111c96e base: sync: Increase char buffer size to get accurate fence name
Increase the char buffer size for the sync fence name from
32 to 64. This makes it possible for drivers to use a longer,
more descriptive name for sync_fence, which improves the
readability of the sync dump in debugfs.

Change-Id: I8a54ec1c7b95764fe3a39f00ce392fddcfd261f1
Signed-off-by: Divya Ponnusamy <pdivya@codeaurora.org>
2016-06-20 15:07:09 -07:00
Osvaldo Banuelos
9cc575936a ARM: dts: msm: add VDD_APC corner adjustments for msmcobalt
Define the open-loop and closed-loop fused corner voltage
margin adjustments for CPR local rev >= 1 parts. This ensures
the CPU clusters powered by VDD_APC0 and VDD_APC1 rails on
CPR rev >= 1 msmcobalt chips have sufficient voltage margin
for stable operation.

CRs-Fixed: 1030441
Change-Id: I3d9cf9179c78619933c11d966ae19a8851749595
Signed-off-by: Osvaldo Banuelos <osvaldob@codeaurora.org>
2016-06-20 15:06:56 -07:00
Bryse Flowers
91c13c10bc defconfig: arm64: msm: Enable netfilter matching for qtaguid
Enabling the configuration for qtaguid which is needed for
enabling bandwidth control from userspace.

Change-Id: I5d0fe18bbef5b80085a9cd77f49eb77e3c654542
CRs-Fixed: 1030408
Signed-off-by: Bryse Flowers <bflowers@codeaurora.org>
2016-06-20 15:06:43 -07:00
Viswanadha Raju Thotakura
1e0847ba47 msm: camera: Changes to support MIPI C-Phy mode
Changes to support MIPI Cphy mode on CSID version 5.0.

CRs-Fixed: 1030317
Change-Id: I6e0835811a47820714eddcf851ea15ece729c2bb
Signed-off-by: Viswanadha Raju Thotakura <viswanad@codeaurora.org>
2016-06-20 15:06:30 -07:00
Deepak Katragadda
3091a5c5f7 clk: msm: clock: Add support for programming MDP_LUT_CBCR register
Add support for the mdss_mdp_lut_clk clock on MSMCOBALT.
In addition, remove toggling the memory retention bits for the
mdp core clock during gdsc_enable/disable. The display driver
will use the set_flags API to set the core clock memory retention.

CRs-Fixed: 1025605
Change-Id: If812473a67a7900c8f7b8b97f32fbf003f0e80a4
Signed-off-by: Deepak Katragadda <dkatraga@codeaurora.org>
2016-06-20 15:06:16 -07:00
Aravind Venkateswaran
d7a02e724c msm: mdss: dsi: configure data lane swap for newer hw revisions
Starting with DSI PHY hardware revisions 3.0 and above, data lane swap
configurations need to be programmed via the DSI PHY interface. In other
cases, a new register interface has been introduced to program the lane
swap configuration for DSI controller revision 2.0 and above. Refactor
the existing implementation to account for these hardware changes.

Change-Id: I3772c614bfee0ed13f30a38535bb814158d23226
Signed-off-by: Aravind Venkateswaran <aravindh@codeaurora.org>
2016-06-20 15:06:01 -07:00
Shashank Mittal
195ae4dadc coresight-tmc: allocate memory for register and buffer dump
Add code to allocate memory for dumping TMC register and buffer data.

These memory locations can be used to store TMC registers and buffer
information after a crash.

Change-Id: I8e98178110efa8e455a329e358c471757e87f2d1
Signed-off-by: Shashank Mittal <mittals@codeaurora.org>
2016-06-20 15:05:34 -07:00
Shashank Mittal
e34081c665 coresight-tpdm: add support for configuring patt_type for dsb
DSB_TIER.PATT_TYPE bit can be used to choose a driver for
pattern matching based timestamps for DSB subunit.

Add support to configure this bit.

Change-Id: Id07ee18006c96e9a66cab5f4e7544dda85a692f8
Signed-off-by: Shashank Mittal <mittals@codeaurora.org>
2016-06-20 15:05:21 -07:00
Satish Babu Patakokila
33551e20a9 ASoC: msm: qdsp6v2: add support for DTS offload
Add DTS to supported offload formats.

Change-Id: I08cade9366673a7aae8595293296e88aece149bd
Signed-off-by: Satish Babu Patakokila <sbpata@codeaurora.org>
2016-06-17 15:20:06 -07:00
Anirudh Ghayal
3358aae869 regulator: qpnp-labibb: Add support for controlling IBB pulse skip timing
The IBB pulse-skip and NLIMIT DAC configuration should be disabled
before applying the 2nd SWIRE command skip logic, to guarantee
that the IBB voltage changes immediately in the subsequent
SWIRE command. After the WA is completed, the pulse-skip can
be re-enabled after a programmable delay. Add this logic and
a DT property 'qcom,swire-ibb-ps-enable-delay' to configure
this delay. If this delay is not specified in the DT it defaults
to 200ms.

CRs-Fixed: 1010085
Change-Id: Ifec458a0028c16440ffd6ac1f6fa58eebc815c5a
Signed-off-by: Anirudh Ghayal <aghayal@codeaurora.org>
2016-06-17 15:19:54 -07:00
Stephen Boyd
a492035331 clk: qcom: Add KPSS ACC/GCC driver
The ACC and GCC regions present in KPSSv1 contain registers to
control clocks and power to each Krait CPU and L2. For CPUfreq
purposes probe these devices and expose a mux clock that chooses
between PXO and PLL8.

Change-Id: Icaa1b68652eb4c836e8aacad80ff6cebe34cad4f
Cc: <devicetree@vger.kernel.org>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Signed-off-by: Taniya Das <tdas@codeaurora.org>
2016-06-17 15:19:42 -07:00
Stephen Boyd
d0c3d21542 clk: qcom: Add support for Krait clocks
The Krait clocks are made up of a series of muxes and a divider
that choose between a fixed rate clock and dedicated HFPLLs for
each CPU. Instead of using mmio accesses to remux parents, the
Krait implementation exposes the remux control via cp15
registers. Support these clocks.

Change-Id: Ic720d45d8c78e6c5a901e58ec6fd23fa15302a21
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Signed-off-by: Taniya Das <tdas@codeaurora.org>
2016-06-17 15:19:30 -07:00
Stephen Boyd
cc1f7af491 clk: qcom: Add support for High-Frequency PLLs (HFPLLs)
HFPLLs are the main frequency source for Krait CPU clocks. Add
support for changing the rate of these PLLs.

Change-Id: I53cb4364e84d108f4fc211ca5524ca25d569997c
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Signed-off-by: Taniya Das <tdas@codeaurora.org>
2016-06-17 15:19:15 -07:00
Stephen Boyd
d5257756bb clk: qcom: Add HFPLL driver
On some devices (MSM8974 for example), the HFPLLs are
instantiated within the Krait processor subsystem as separate
register regions. Add a driver for these PLLs so that we can
provide HFPLL clocks for use by the system.

Change-Id: If8a3e492e1c227cbf42f4f9907cdcb0dcb3ccc11
Cc: <devicetree@vger.kernel.org>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Signed-off-by: Taniya Das <tdas@codeaurora.org>
2016-06-17 15:19:03 -07:00
Gaurav Singhal
424b4b2157 NFC: Add eSE power request gpio pin support
We can't control eSE power through driver as of now
so adding gpio pin support for eSE in NQxxx driver.

Multiline comments are updated.

Change-Id: I60651052d7bf97a8a0505e76904cebe2b7c69ce2
Signed-off-by: Gaurav Singhal <gsinghal@codeaurora.org>
2016-06-17 15:18:53 -07:00
Sandeep Panda
f4d714686f msm: mdss: set N_MUTIPLIER bit as per different audio sample rate
In the current implementation N_MULTIPLIER bit for audio packets
on HDMI TX controller is not getting set properly. Fix this issue
by setting the multiplier value according to the sample rate set
for audio playback.

Change-Id: I25ab63eeadd5fd08649e9e828dcab83ec1b60161
Signed-off-by: Sandeep Panda <spanda@codeaurora.org>
2016-06-17 15:18:39 -07:00
Yeleswarapu Nagaradhesh
5eaa7f688f wcd9xxx: refactor wcd9xxx audio codec drivers
Refactor wcd9xxx audio codec driver for better handling
of codec specific functionalities.

CRs-fixed: 1028800
Change-Id: I229ee4a741c5a606e2eb045940f5ee3c4eabf512
Signed-off-by: Phani Kumar Uppalapati <phaniu@codeaurora.org>
Signed-off-by: Yeleswarapu Nagaradhesh <nagaradh@codeaurora.org>
2016-06-17 15:18:27 -07:00
Yeleswarapu Nagaradhesh
000c189cb6 ARM: dts: msm: rename wcd-gpio-ctrl to msm-cdc-pinctrl
Rename wcd-gpio-ctrl to msm-cdc-pinctrl as these
changes are not wcd specific.

CRs-fixed: 1028800
Change-Id: Iffc36dd27ae3b651b736acab004d6fff3bdcb2c7
Signed-off-by: Yeleswarapu Nagaradhesh <nagaradh@codeaurora.org>
2016-06-17 15:18:14 -07:00
JinHee Kim
a98daf455c ARM: dts: msm-4.4: Enable FD for msmcobalt
Enable FD for msmcobalt in dtsi.

CRs-Fixed: 1030317
Change-Id: Ie82b62777d0a5c5610b985a42dbe14ce54acb006
Signed-off-by: JinHee Kim <jinheek@codeaurora.org>
2016-06-17 15:18:00 -07:00
Nicholas Troast
f3eefac718 defconfig: arm64: msmcortex: enable SMB138X_CHARGER support for msmcobalt
Enable SMB138X parallel charger device support for the msmcobalt platform.

CRs-Fixed: 1023141
Change-Id: Ifb806bb4c18a9d1c0c1357fef1600d1bc67c149f
Signed-off-by: Nicholas Troast <ntroast@codeaurora.org>
2016-06-17 15:17:50 -07:00
Nicholas Troast
1a09d5468f ARM: dts: msm: add SMB138X parallel charger device to msmcobalt-mtp
Add the SMB138X parallel charger device that is present in msmcobalt-mtp

CRs-Fixed: 1023141
Change-Id: Iba87437d7d57f4f42f973ea7db2af5ff8b579bd3
Signed-off-by: Nicholas Troast <ntroast@codeaurora.org>
2016-06-17 15:17:39 -07:00
Nicholas Troast
05de9fa95f qcom-charger: introduce SMB138X charger driver
This driver supports the SMB138X charger device.

This charger peripheral is common among other chips, therefore the
driver uses the smb library to support all common functionality.

Register access is provided by the parent device via regmap. Interrupts
are controlled by the parent device, and handlers are registered by the
SMB138X charger driver.

The power supply framework is used to communicate battery and usb
properties to userspace and other driver consumers such as fuel gauge
and USB.

VBUS and VCONN regulators are registered for supporting OTG, and powered
Type-C cables respectively.

CRs-Fixed: 1023141
Change-Id: I119d33cdfdfc874b5d7f6137618ee3e590c72064
Signed-off-by: Nicholas Troast <ntroast@codeaurora.org>
2016-06-17 15:17:27 -07:00
Rajendra Nayak
76fd66f1e9 clk: qcom: gdsc: Add the missing BIMC gdsc for msm8996
Add BIMC gdsc data found in MMCC part of msm8996 family of devices.

Change-Id: Ibeac134f941f402bcad8e803bdb73ba73f55909d
Signed-off-by: Rajendra Nayak <rnayak@codeaurora.org>
Signed-off-by: Taniya Das <tdas@codeaurora.org>
2016-06-17 15:17:09 -07:00
Rajendra Nayak
a97cf54112 clk: qcom: gdsc: Add mmcc gdscs for msm8996 family
Add all gdsc data which are part of mmcc on msm8996 family

Change-Id: I77caf8f26bf676a7553b6873eb188acb02a9c44d
Signed-off-by: Rajendra Nayak <rnayak@codeaurora.org>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Signed-off-by: Taniya Das <tdas@codeaurora.org>
2016-06-17 15:16:56 -07:00
Stephen Boyd
22f8264730 clk: qcom: Add MSM8996 Multimedia Clock Controller (MMCC) driver
Add a driver for the multimedia clock controller found on MSM8996
based devices. This should allow most multimedia device drivers
to probe and control their clocks.

Change-Id: I0b69b1e78a8b0faeaff3e5c87c73e24b1c19ba55
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Signed-off-by: Odelu Kukatla <okukatla@codeaurora.org>
2016-06-17 15:16:43 -07:00
Harry Yang
13ed836a21 qcom-charger: add two irqs for parallel charging
Add icl handler to report USB input current limit, and charge handler
to report charging state changes, providing input to parallel
charging algorithm.

CRs-Fixed: 1023703
Change-Id: Id51ad3dbd6e2637c105db681082eea98ab161a50
Signed-off-by: Harry Yang <harryy@codeaurora.org>
2016-06-17 15:16:32 -07:00
Tatenda Chipeperekwa
a922a31a6e ARM: dts: msm: add mnoc_ahb clock for HDMI device on msmcobalt
mnoc_ahb clock should be enabled prior to enabling the mdss_ahb
clock for any register access in the HDMI domain.

CRs-Fixed: 1022772
Change-Id: If78feebe1efb3efa2490551374a35ea702496323
Signed-off-by: Tatenda Chipeperekwa <tatendac@codeaurora.org>
2016-06-17 15:16:20 -07:00
Tatenda Chipeperekwa
ef3b38ed14 msm: mdss: hdmi: handle CEC interrupts if CEC feature is enabled
Handle CEC interrupts in the CEC hardware module only if the CEC
feature is explicitly enabled by the CEC framework. This will
prevent the CEC hardware module from unnecessarily processing
interrupts that will not be handled by the CEC framework (if
the feature is not explicity enabled).

Change-Id: I5110f2c8277581f87da71f962560c33f65582176
Signed-off-by: Tatenda Chipeperekwa <tatendac@codeaurora.org>
CRs-Fixed: 1016853
2016-06-17 15:16:10 -07:00
Harry Yang
8d43acccb8 qcom-charger: smb-lib: add votable for parallel charging
Add a votable structure - one veto to disable or unanimous
approval to enable.

Provide an open and flexiable machanism to enable/disable
parallel charging based on various dynamically changing
factors.

CRs-Fixed: 1023703
Change-Id: I552467645d6f8f633afe273b173a636e0eb396a7
Signed-off-by: Harry Yang <harryy@codeaurora.org>
2016-06-17 15:15:58 -07:00
Harry Yang
46926992f6 qcom-charger: smb-lib: add wakesource votable support
Implement wake votable on top of PM wakesource APIs for PMIC voters
to hold system awake.

CRs-Fixed: 1023703
Change-Id: If2c8f65d932f2f0bdad9f0f026d440a2089cec5f
Signed-off-by: Harry Yang <harryy@codeaurora.org>
2016-06-17 15:15:44 -07:00
Ghanim Fodi
964e01fb62 ARM: dts: msm: Do not use peripheral memory for IPA FWs on msmcobalt
IPA FWs load should use CMA memory as intermediate memory
for loading the FWs instead of the peripheral memory.

Change-Id: I0f7e8af9d233390861972048b07cc02dfaf1ed14
CRs-Fixed: 1025417
Signed-off-by: Ghanim Fodi <gfodi@codeaurora.org>
2016-06-17 15:15:31 -07:00
Karthik Reddy Katta
1438b8b5dd ASoC: msm: qdsp6v2: Fix unmap memory command failure
Add pointer validation checks to prevent sending
invalid handles to ADSP as part of unmap memory
regions command.

CRs-Fixed: 1018367
Change-Id: I0dfb2fccb4414ed82ee10d73576fda66a273043d
Signed-off-by: Karthik Reddy Katta <a_katta@codeaurora.org>
2016-06-17 15:15:17 -07:00
Tatenda Chipeperekwa
c72e42a443 msm: mdss: hdmi: enable additional clocks for register access
MMMS mnoc_ahb clock needs to be enabled prior to enabling the
mdss_ahb clock on msmcobalt as there is a core fsm dependency
between these clocks.

CRs-Fixed: 1022772
Change-Id: I24f3b01ae40d1242e64bfc87177142b0d64ac123
Signed-off-by: Tatenda Chipeperekwa <tatendac@codeaurora.org>
2016-06-16 16:33:39 -07:00
Gidon Studinski
c13c4916b8 msm: ipa: fix static analysis issues
Fix several static analysis issues in IPA driver.

Change-Id: If04e11b9e44aabb7c9389dbf79ed9c80c66c877e
Signed-off-by: Gidon Studinski <gidons@codeaurora.org>
2016-06-16 15:24:50 -07:00
Amit Nischal
ebdfa88580 clk: qcom: gcc-msm8996: Add missing BCR for USB3 and PCIE clocks
The block reset registers for USB3 and PCIE will be required by the clients
to reset their subsystem blocks so add them in the reset map.

Change-Id: Ie30158592fca057454152f3f46a5d8b89ae36b88
Signed-off-by: Amit Nischal <anischal@codeaurora.org>
2016-06-16 15:24:38 -07:00
Amir Levy
22f7684298 msm: ipa3: fix condition tested on ipahal wrapper
offset_entry parameter should be tested for NULL, invert
testing logic.

CRs-Fixed: 1028328
Change-Id: I52761b04c594b10202a3823d49324a4991ecf3e4
Signed-off-by: Amir Levy <alevy@codeaurora.org>
2016-06-16 15:24:24 -07:00
Shashank Mittal
edd0183cad coresight: make 'coresight-name' a required property
Without 'coresight-name' a CoreSight device gets registered with its
dev_name.

This can be a problem in case where we have CoreSight properties defined
within some other platform device.

Make 'coresight-name' a required property for a CoreSight device to
avoid this problem.

Change-Id: I5e192c4d850bb040983024cfe163714fbebbb199
Signed-off-by: Shashank Mittal <mittals@codeaurora.org>
2016-06-16 15:24:12 -07:00
Skylar Chang
ab366edb3e msm: ipa3: fix qmap deaggregation issue
With GRO enable, ipa3 still use default
aggr_byte_limit to calculates the
rx_buff_sz and configures wrong channel
righ size in GSI. The fix is to use
the right aggr_byte_limit which netmgrd
configured.

Change-Id: I9f804a122090ea4340f7873a5aa276dff00cbcb7
Signed-off-by: Skylar Chang <chiaweic@codeaurora.org>
2016-06-16 15:24:01 -07:00
Deepak Katragadda
02368c203a clk: msm: clock: Include logic to treat votable clocks/GDSCs differently
On MSMCOBALT, the votable GDSCs might take longer to enable/disable
depending on a number of factors including if another entity outside
of HLOS tried disabling the GDSC at the same time that HLOS tried to
enable it. Add a higher polling timeout to accommodate this.
In addition, add flags to branch clocks which might be controlled via
the voting registers so that the driver does not print out a warning
if these clocks do not turn off even after removing the SW vote.

CRs-Fixed: 1027807
Change-Id: I044ca5209c364d4bfb4f3bd504cdcb87021fd010
Signed-off-by: Deepak Katragadda <dkatraga@codeaurora.org>
2016-06-16 15:23:49 -07:00
Phani Kumar Uppalapati
ee0140710a ARM: dts: msm: Add codec reset gpio device node for msmcobalt
Add codec reset gpio device tree node for msmcobalt target
specifying active and sleep pinctrl states.

CRs-fixed: 1028800
Change-Id: Id2625cd71b4c204ce10bc6dd007939834d2b9e10
Signed-off-by: Phani Kumar Uppalapati <phaniu@codeaurora.org>
2016-06-16 15:23:36 -07:00
Mayank Rana
bb2f0dff03 usb: gadget: f_diag: Decrement counter if zero length packet queueing fails
If usb_ep_queue() fails on queueing zero-length packet, driver is not
decrementing dpkts_tolaptop_pending counter which may results into seeing
count mismatch. Hence decrement dpkts_tolaptop_pending if zero length
packet queueing fails.

CRs-Fixed: 1027031
Change-Id: Id3c7c2627bdf37524067512db51d3180c570106d
Signed-off-by: Mayank Rana <mrana@codeaurora.org>
2016-06-16 15:23:23 -07:00
Mayank Rana
4b0289c582 usb: gadget: gsi: Fix reporting of USB device's usage count
Currently driver is reading and logging usage count of gadget
device but it is required to use usage count of gadget's parent
device which is used to prevent USB controller's low power mode.
Hence fix reporting of USB devices' usage count.

Also mark sm_state to initialized and remove queueing of
ipa_usb_wq as ipa_work_handler() is running without USB gadget
is initialized i.e. gadget is NULL.

CRs-Fixed: 1021499
Change-Id: Ia64afa3adb769674f6a9a60fde2c7397b7e4fe49
Signed-off-by: Mayank Rana <mrana@codeaurora.org>
2016-06-16 15:23:09 -07:00