Commit graph

12833 commits

Author SHA1 Message Date
Thierry Reding
dee8268f8f drm/tegra: Move driver to DRM tree
In order to make subsystem-wide changes easier, move the Tegra DRM
driver back into the DRM tree.

Signed-off-by: Thierry Reding <treding@nvidia.com>
2013-10-31 09:55:40 +01:00
Thierry Reding
fc3be3e8fc gpu: host1x: Use relative include paths
This is slightly safer than adding -Idrivers/gpu/host1x to cflags-y.

Signed-off-by: Thierry Reding <treding@nvidia.com>
2013-10-31 09:55:40 +01:00
Thierry Reding
776dc38403 drm/tegra: Move subdevice infrastructure to host1x
The Tegra DRM driver currently uses some infrastructure to defer the DRM
core initialization until all required devices have registered. The same
infrastructure can potentially be used by any other driver that requires
more than a single sub-device of the host1x module.

Make the infrastructure more generic and keep only the DRM specific code
in the DRM part of the driver. Eventually this will make it easy to move
the DRM driver part back to the DRM subsystem.

Signed-off-by: Thierry Reding <treding@nvidia.com>
2013-10-31 09:55:33 +01:00
Thierry Reding
35d747a81d gpu: host1x: Expose syncpt and channel functionality
Expose the buffer objects, syncpoint and channel functionality in the
public public header so that drivers can use them.

Signed-off-by: Thierry Reding <treding@nvidia.com>
2013-10-31 09:20:11 +01:00
Thierry Reding
53fa7f7204 drm/tegra: Introduce tegra_drm_client structure
This structure derives from host1x_client. DRM-specific fields are moved
from host1x_client to this structure, so that host1x_client can remain
agnostic of DRM.

Signed-off-by: Thierry Reding <treding@nvidia.com>
2013-10-31 09:20:10 +01:00
Thierry Reding
e1e906448d gpu: host1x: Make host1x header file public
In preparation to support host1x clients other than DRM, move this
header into a public location.

Signed-off-by: Thierry Reding <treding@nvidia.com>
2013-10-31 09:20:10 +01:00
Thierry Reding
3be8274341 drm/tegra: gem: Miscellaneous cleanups
Rename the host1x_to_drm_bo() macro to host1x_to_tegra_bo() for
consistency and fixup various stylistic issues.

Signed-off-by: Thierry Reding <treding@nvidia.com>
2013-10-31 09:20:10 +01:00
Thierry Reding
a137ce3438 drm/tegra: Rename gr2d to tegra-gr2d
Other drivers use the tegra- prefix in their names, so add it to this
driver's name as well for consistency.

Signed-off-by: Thierry Reding <treding@nvidia.com>
2013-10-31 09:20:09 +01:00
Thierry Reding
c1bef81fe7 drm/tegra: gr2d: Miscellaneous cleanups
Rework the address table code for the host1x firewall. The previous
implementation allocated a bitfield but didn't check for a valid pointer
so it could potentially crash. Instead, embed a static bitmap within the
gr2d structure to avoid the allocation and use the Linux bitmap API to
reduce code complexity.

Don't annotate the driver's .remove() function __exit. Even if built in
the driver can be unloaded via sysfs, so .remove() needs to stick around
after initialization. Also remove the explicit initialization of the
driver's .owner field to THIS_MODULE because that's now handled by the
driver core.

Furthermore make an error message more consistent with other subdrivers,
index the syncpts array for better readability, remove a gratuituous
newline and reorder some variable declarations to make the code easier
to read.

Signed-off-by: Thierry Reding <treding@nvidia.com>
2013-10-31 09:20:09 +01:00
Thierry Reding
d77563ff56 gpu: host1x: firewall: Refactor register check
The same code sequence is used in various places to validate a register
access in the command stream. This can be refactored into a separate
function.

Signed-off-by: Thierry Reding <treding@nvidia.com>
2013-10-31 09:20:08 +01:00
Thierry Reding
d7fbcf477a gpu: host1x: firewall: Rename cmdbuf_id -> cmdbuf
The value stored in this field is a pointer to a command buffer, not an
ID. Avoid some confusion by reflecting that in the field's name.

Signed-off-by: Thierry Reding <treding@nvidia.com>
2013-10-31 09:20:08 +01:00
Thierry Reding
37857cd2c5 gpu: host1x: Fix alignment of function arguments
Arguments on subsequent lines should be aligned with the first argument.
This one occurrence went unnoticed during code review.

Signed-off-by: Thierry Reding <treding@nvidia.com>
2013-10-31 09:20:08 +01:00
Thierry Reding
452e7f0cda gpu: host1x: Do not discard .remove()
The device can be unbound from the driver via sysfs, so regardless of
whether the driver is builtin or a module, its .remove() function needs
to stick around.

Signed-off-by: Thierry Reding <treding@nvidia.com>
2013-10-31 09:20:07 +01:00
Thierry Reding
9eb9b220fc gpu: host1x: Cleanup includes
Most of the included files are either not required or already included
by some other header file.

Signed-off-by: Thierry Reding <treding@nvidia.com>
2013-10-31 09:20:07 +01:00
Thierry Reding
c88c363072 drm/tegra: Rename host1x_drm_context to tegra_drm_context
The structure represents a context associated with a particular process
that has opened the Tegra DRM device and requested a channel. This is a
very DRM-specific notion and has nothing to do with host1x. Rename the
structure to more clearly mark the boundaries between the two.

Signed-off-by: Thierry Reding <treding@nvidia.com>
2013-10-31 09:20:06 +01:00
Thierry Reding
08943e6cbc drm/tegra: Rename host1x_drm_file to tegra_drm_file
This structure extends drm_file with Tegra DRM specific fields and has
nothing to do with host1x. Rename the structure to more clearly mark the
boundaries between host1x and Tegra DRM.

While at it, move the structure definition out of the header. It's never
used outside of the drm.c source file, so it can be defined within that.

Signed-off-by: Thierry Reding <treding@nvidia.com>
2013-10-31 09:20:06 +01:00
Thierry Reding
386a2a71e2 drm/tegra: Rename host1x_drm structure to tegra_drm
The host1x and Tegra DRM drivers are currently tightly coupled. Renaming
the structure marks the boundary more clearly.

Signed-off-by: Thierry Reding <treding@nvidia.com>
2013-10-31 09:20:05 +01:00
Thierry Reding
d18d303378 drm/tegra: Cleanup tegra_dc structure
Remove the unused host1x field from the structure and group the fields
more logically.

Signed-off-by: Thierry Reding <treding@nvidia.com>
2013-10-31 09:20:05 +01:00
Thierry Reding
77651e7173 drm/tegra: Remove unused fields
Some of the fields in struct host1x_drm haven't been used for a while,
so remove them.

Signed-off-by: Thierry Reding <treding@nvidia.com>
2013-10-31 09:20:05 +01:00
Thierry Reding
474318cabc gpu: host1x: Remove unused Makefile
Signed-off-by: Thierry Reding <treding@nvidia.com>
2013-10-31 09:20:04 +01:00
Erik Faye-Lund
a9ff999538 gpu: host1x: check relocs after all gathers are consumed
The num_relocs count are passed to the kernel per job, not per gather.

For multi-gather jobs, we would previously fail if there were relocs in
other gathers aside from the first one.

Fix this by simply moving the check until all gathers have been
consumed.

Signed-off-by: Erik Faye-Lund <kusmabite@gmail.com>
Reviewed-by: Arto Merilainen <amerilainen@nvidia.com>
Acked-By: Terje Bergstrom <tbergstrom@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2013-10-31 09:20:04 +01:00
Thierry Reding
f28c38ae86 drm: Fix typo in debug message
Fix a typo (iotcl -> ioctl) in the debug message when an unknown IOCTL
is encountered.

Acked-by: David Airlie <airlied@linux.ie>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2013-10-31 09:20:02 +01:00
Thierry Reding
a6ad6230c1 drm: Track the proper DPMS mode of connectors
When userspace removes the active framebuffer using DRM_IOCTL_MODE_RMFB,
or explicitly disables the CRTC (by calling drmModeSetCrtc(..., NULL)
for example), a NULL framebuffer will be passed to the .set_config()
implementation of a CRTC. The drm_crtc_helper_set_config() helper will
decide to disable a CRTC when that happens.

To do so, it calls drm_crtc_helper_disable(), which in turn will iterate
over all encoders and decouple them from their connectors and finally
call drm_helper_disable_unused_functions() to clean up and call the
.disable() or .dpms() implementation for each encoder. However, at no
point during this sequence does it track the DPMS mode of a connector,
so it will usually remain on after this.

When a connector is enabled again, drm_helper_connector_dpms() will not
notice that the DPMS mode actually changed and won't do anything, which
causes the connector to stay disabled indefinitely.

To prevent this from happening, explicitly set the connector's DPMS mode
to off when the CRTC is disabled. That way it reflects the correct state
and can be enabled again.

This solves an issue observed when terminating an X server running on
the xf86-video-modesetting driver. Without this patch, the connector
would not be enabled properly and the screen would stay dark.

Acked-by: David Airlie <airlied@linux.ie>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2013-10-31 09:19:59 +01:00
Dave Airlie
74c85e1357 Merge branch 'drm-fixes-3.12' of git://people.freedesktop.org/~agd5f/linux into drm-fixes
Just a few small fixes for radeon (audio regression fix,
stability fix, and an endian bug noticed by coverity).

* 'drm-fixes-3.12' of git://people.freedesktop.org/~agd5f/linux:
  drm/radeon/dpm: fix incompatible casting on big endian
  drm/radeon: disable bapm on KB
  drm/radeon: use sw CTS/N values for audio on DCE4+
2013-10-31 15:29:10 +10:00
Thierry Reding
9d6104e017 drm/sysfs: Do not drop device reference twice
device_unregister() already drops its reference to the struct device, so
explicitly calling put_device() before device_unregister() can cause the
device to have been freed before it can be unregistered.

Signed-off-by: Thierry Reding <treding@nvidia.com>
Reviewed-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Tested-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Tested-by: Ben Widawsky <ben@bwidawsk.net>
Signed-off-by: Dave Airlie <airlied@redhat.com>
2013-10-31 06:33:49 +10:00
Daniel Vetter
40da17c29b drm/i915: refactor ilk display interrupt handling
- Use a for_each_loop and add the corresponding #defines.
- Drop the _ILK postfix on the existing DE_PIPE_VBLANK macro for
  consistency with everything else.
- Also use macros (and add the missing one for plane flips) for the
  ivb display interrupt handler.

Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
[danvet: Drop the useless parens that Ville spotted.]
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2013-10-30 11:16:59 +01:00
Daniel Vetter
3b6c42e82c drm/i915: use enum pipe consistently in i915_irq.c
Request by Ville in his review of the CRC stuff. This converts
everything but ilk_display_irq_handler since that needs a bit more
than a simple search&replace to look nice.

Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2013-10-30 11:15:25 +01:00
Chris Wilson
94e39e282e drm/i915: Capture batchbuffer state upon GPU hang
The bbstate contains useful bits of debugging information such as
whether the batch is being read from GTT or PPGTT, or whether it is
allowed to execute privileged instructions.

v2: Only record BB_STATE for gen4+

Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2013-10-30 10:37:58 +01:00
Daniel Vetter
f4adcd2477 drm/i915: handle faked missed interrupts as simulated hangs, too
Otherwise QA will report this as a real hang when running igt
ZZ_missed_irq.

v2: Actually test the right stuff and really shut up the DRM_ERROR
output ...

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=70747
Tested-by: lu hua <huax.lu@intel.com>
Acked-by: Chris Wilson <chris@chris-wilson.co.uk>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2013-10-30 10:35:55 +01:00
David Herrmann
3d3b78c06c drm: allow DRM_IOCTL_VERSION on render-nodes
DRM_IOCTL_VERSION is a reliable way to get the driver-name and version
information. It's not related to the interface-version (SET_VERSION ioctl)
so we can safely enable it on render-nodes.

Note that gbm uses udev-BUSID to load the correct mesa driver. However,
the VERSION ioctl should be the more reliable way to do this (in case we
add new DRM-bus drivers which have no BUSID or similar).

Signed-off-by: David Herrmann <dh.herrmann@gmail.com>
Reviewed-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Signed-off-by: Dave Airlie <airlied@redhat.com>
2013-10-30 14:41:56 +10:00
Imre Deak
ddb642fb05 drm/i915: rename i915_init_power_well to init_power_domains_init
Similarly rename the other related functions in the power domain
interface.

Higher level driver code calling these functions knows only about power
domains, not the underlying power wells which may be different on
different platforms. Also these functions really init/cleanup/resume
power domains and only through that all related power wells, so rename
them accordingly.

Note that I left i915_{request,release}_power_well as is, since that
really changes the state only of a single power well (and is HSW
specific). It should also get a better name once we make it more
generic by controlling things through a new audio power domain.

v4:
- use intel prefix instead of i915 everywhere (Paulo)
- use a $prefix_$block_$action format (Daniel)

Signed-off-by: Imre Deak <imre.deak@intel.com>
Reviewed-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2013-10-29 18:53:21 +01:00
Daniel Vetter
1fbc0d789d drm/i915: Fix the PPT fdi lane bifurcate state handling on ivb
Originally I've thought that this is leftover hw state dirt from the
BIOS. But after way too much helpless flailing around on my part I've
noticed that the actual bug is when we change the state of an already
active pipe.

For example when we change the fdi lines from 2 to 3 without switching
off outputs in-between we'll never see the crucial on->off transition
in the ->modeset_global_resources hook the current logic relies on.

Patch version 2 got this right by instead also checking whether the
pipe is indeed active. But that in turn broke things when pipes have
been turned off through dpms since the bifurcate enabling is done in
the ->crtc_mode_set callback.

To address this issues discussed with Ville in the patch review move
the setting of the bifurcate bit into the ->crtc_enable hook. That way
we won't wreak havoc with this state when userspace puts all other
outputs into dpms off state. This also moves us forward with our
overall goal to unify the modeset and dpms on paths (which we need to
have to allow runtime pm in the dpms off state).

Unfortunately this requires us to move the bifurcate helpers around a
bit.

Also update the commit message, I've misanalyzed the bug rather badly.

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=70507
Tested-by: Jan-Michael Brummer <jan.brummer@tabos.org>
Cc: stable@vger.kernel.org
Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2013-10-29 13:52:56 +01:00
Ville Syrjälä
92e76c8c7e drm/i915: Clamp cursor coordinates to int16_t range
We store cursor_x/y as int16_t internally, but the user provided
coordinates are int32_t. Clamp the coordinates so that they don't
overflow the int16_t. Since the cursor is only 64x64 in size, the
clamping can't cause any visual changes.

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2013-10-28 17:56:00 +01:00
Rob Pearce
645378d85e drm/i915: No LVDS hardware on Intel D410PT and D425KT
The Intel D410PT(LW) and D425KT Mini-ITX desktop boards both show up as
having LVDS but the hardware is not populated. This patch adds them to
the list of such systems. Patch is against 3.11.4

v2: Patch revised to match the D425KT exactly as the D425KTW does have
LVDS.  According to Intel's documentation, the D410PTL and D410PLTW
don't.

Signed-off-by: Rob Pearce <rob@flitspace.org.uk>
Cc: stable@vger.kernel.org
[danvet: Pimp commit message to my liking and add cc: stable.]
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2013-10-28 17:48:30 +01:00
Jani Nikula
c6cd2ee2d5 drm/i915/dp: workaround BIOS eDP bpp clamping issue
This isn't a real fix to the problem, but rather a stopgap measure while
trying to find a proper solution.

There are several laptops out there that fail to light up the eDP panel
in UEFI boot mode. They seem to be mostly IVB machines, including but
apparently not limited to Dell XPS 13, Asus TX300, Asus UX31A, Asus
UX32VD, Acer Aspire S7. They seem to work in CSM or legacy boot.

The difference between UEFI and CSM is that the BIOS provides a
different VBT to the kernel. The UEFI VBT typically specifies 18 bpp and
1.62 GHz link for eDP, while CSM VBT has 24 bpp and 2.7 GHz link. We end
up clamping to 18 bpp in UEFI mode, which we can fit in the 1.62 Ghz
link, and for reasons yet unknown fail to light up the panel.

Dithering from 24 to 18 bpp itself seems to work; if we use 18 bpp with
2.7 GHz link, the eDP panel lights up. So essentially this is a link
speed issue, and *not* a bpp clamping issue.

The bug raised its head since
commit 657445fe86
Author: Daniel Vetter <daniel.vetter@ffwll.ch>
Date:   Sat May 4 10:09:18 2013 +0200

    Revert "drm/i915: revert eDP bpp clamping code changes"

which started clamping bpp *before* computing the link requirements, and
thus affecting the required bandwidth. Clamping after the computations
kept the link at 2.7 GHz.

Even though the BIOS tells us to use 18 bpp through the VBT, it happily
boots up at 24 bpp and 2.7 GHz itself! Use this information to
selectively ignore the VBT provided value.

We can't ignore the VBT eDP bpp altogether, as there are other laptops
that do require the clamping to be used due to EDID reporting higher bpp
than the panel can support.

Bugzilla: https://bugzilla.kernel.org/show_bug.cgi?id=59841
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=67950
Tested-by: Ulf Winkelvos <ulf@winkelvos.de>
Tested-by: jkp <jkp@iki.fi>
CC: stable@vger.kernel.org
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2013-10-28 17:48:30 +01:00
Ville Syrjälä
7195a50b5c drm/i915: Add HSW CRT output readout support
Call intel_ddi_get_config() to get the pipe_bpp settings from
DDI.

The sync polarity settings from DDI are irrelevant for CRT
output, so override them with data from the ADPA register.

Note: This is already merged in drm-intel-next-queued as

commit 6801c18c0a
Author: Ville Syrjälä <ville.syrjala@linux.intel.com>
Date:   Tue Sep 24 14:24:05 2013 +0300

    drm/i915: Add HSW CRT output readout support

but is required for the following edp bpp bugfix.

v2: Extract intel_crt_get_flags()

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=69691
Tested-by: Qingshuai Tian <qingshuai.tian@intel.com>
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Cc: stable@vger.kernel.org
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2013-10-28 17:48:24 +01:00
Ville Syrjälä
4f56d12ebb drm/i915: Add support for pipe_bpp readout
On CTG+ read out the pipe bpp setting from hardware and fill it into
pipe config. Also check it appropriately.

v2: Don't do the pipe_bpp extraction inside the PCH only code block on
    ILK+.
    Avoid the PIPECONF read as we already have read it for the
    PIPECONF_EANBLE check.

Note: This is already in drm-intel-next-queued as
commit 42571aefaf
Author: Ville Syrjälä <ville.syrjala@linux.intel.com>
Date:   Fri Sep 6 23:29:00 2013 +0300

    drm/i915: Add support for pipe_bpp readout

but is needed for the following bugfix.

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Reviewed-by: Jani Nikula <jani.nikula@intel.com>
Cc: stable@vger.kernel.org
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2013-10-28 09:34:37 +01:00
Imre Deak
b4ed448447 drm/i915: remove device field from struct power_well
The only real need for this field was in
i915_{request,release}_power_well, but there we can get at it by a
container_of magic. Also since in the future we'll have multiple power
wells each with its own power_well struct it makes sense to remove the
field from there where it'd be just redundancy.

Suggested-by: Paulo Zanoni <paulo.zanoni@intel.com>
Signed-off-by: Imre Deak <imre.deak@intel.com>
Reviewed-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2013-10-27 20:29:57 +01:00
Imre Deak
baa707073b drm/i915: use power get/put instead of set for power on after init
Currently we make sure that all power domains are enabled during driver
init and turn off unneded ones only after the first modeset. Similarly
during suspend we enable all power domains, which will remain on through
the following resume until the first modeset.

This logic is supported by intel_set_power_well() in the power domain
framework. It would be nice to simplify the API, so that we only have
get/put functions and make it more explicit on the higher level how this
"power well on during init" logic works. This will make it also easier
if in the future we want to shorten the time the power wells are on.

For this add a new device private flag tracking whether we have the
power wells on because of init/suspend and use only
intel_display_power_get()/put(). As nothing else uses
intel_set_power_well() we can remove it.

This also fixes

commit 6efdf354dd
Author: Imre Deak <imre.deak@intel.com>
Date:   Wed Oct 16 17:25:52 2013 +0300

    drm/i915: enable only the needed power domains during modeset

where removing intel_set_power_well() resulted in not releasing the
reference on the power well that was taken during init and thus leaving
the power well on all the time. Regression reported by Paulo.

v2:
- move the init_power_on flag to the power_domains struct (Daniel)

v3:
- add note about this being a regression fix too (Paulo)

Signed-off-by: Imre Deak <imre.deak@intel.com>
Reviewed-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2013-10-27 17:38:13 +01:00
Imre Deak
83c00f5530 drm/i915: prepare for multiple power wells
In the future we'll need to support multiple power wells, so prepare for
that here. Create a new power domains struct which contains all
power domain/well specific fields. Since we'll have one lock protecting
all power wells, move power_well->lock to the new struct too.

No functional change.

Signed-off-by: Imre Deak <imre.deak@intel.com>
Reviewed-by: Paulo Zanoni <paulo.zanoni@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2013-10-27 17:37:42 +01:00
Ben Widawsky
8c7b72f20b drm/i915: Remove WaFbcDisableDpfcClockGating on HSW
Production HSW does not need it. I confirmed this with Art.

Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
Reviewed-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2013-10-27 16:04:42 +01:00
Ben Widawsky
a74b0c4815 drm/i915: Remove WaFbcDisableDpfcClockGating on IVB
Production IVB does not need it. I confirmed this with Art.

Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
Reviewed-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2013-10-27 14:43:10 +01:00
Ben Widawsky
153b4b9547 drm/i915: Convert straggling MCHBAR registers
All our registers which are written through the MCHBAR are defined
descriptively as an offset to the MCHBAR. We had 3 outliers here.
Convert these as well so all registers which are offsets are MCHBAR can
be easily identified/found within the code.

With this, convert DCLK to also follow this format.

Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
Reviewed-by: Jani Nikula <jani.nikula@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2013-10-27 14:39:14 +01:00
Dave Airlie
be51e4a781 Merge tag 'drm-intel-next-2013-10-18' of git://people.freedesktop.org/~danvet/drm-intel into drm-next
- CRC support from Damien and He Shuang. Long term this should allow us to
  test an awful lot modesetting corner cases automatically. So for me as
  the maintainer this is really big.
- HDMI audio fix from Jani.
- VLV dpll computation code refactoring from Ville.
- Fixups for the gpu booster from last time around (Chris).
- Some cleanups in the context code from Ben.
- More watermark work from Ville (we'll be getting there ...).
- vblank timestamp improvements from Ville.
- CONFIG_FB=n support, including drm core changes to make the fbdev
  helpers optional.
- DP link training improvements (Jani).
- mmio vtable from Ben, prep work for future hw.

* tag 'drm-intel-next-2013-10-18' of git://people.freedesktop.org/~danvet/drm-intel: (132 commits)
  drm/i915/dp: don't mention eDP bpp clamping if it doesn't affect bpp
  drm/i915: remove dead code in ironlake_crtc_mode_set
  drm/i915: crc support for hsw
  drm/i915: fix CRC debugfs setup
  drm/i915: wait one vblank when disabling CRCs
  drm/i915: use ->get_vblank_counter for the crc frame counter
  drm/i915: wire up CRC interrupt for ilk/snb
  drm/i915: add CRC #defines for ilk/snb
  drm/i915: extract display_pipe_crc_update
  drm/i915: don't Oops in debugfs for I915_FBDEV=n
  drm/i915: set HDMI pixel clock in audio configuration
  drm/i915: pass mode to ELD write vfuncs
  cpufreq: Add dummy cpufreq_cpu_get/put for CONFIG_CPU_FREQ=n
  drm/i915: check gem bo size when creating framebuffers
  drm/i915: Use unsigned long for obj->user_pin_count
  drm/i915: prevent tiling changes on framebuffer backing storage
  drm/i915: grab dev->struct_mutex around framebuffer_init
  drm/i915: vlv: fix VGA hotplug after modeset
  drm: add support for additional stereo 3D modes
  drm/i915: preserve dispaly init order on ByT
  ...
2013-10-25 09:35:04 +01:00
Alex Deucher
cdf6e80584 drm/radeon/dpm: fix incompatible casting on big endian
We use u16 for voltage values throughout the driver so switch
the table values to a u16 as well.  Fixes an incompatible
cast error in ci_patch_clock_voltage_limits_with_vddc_leakage()
picked up by coverity.

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2013-10-23 16:25:18 -04:00
Alex Deucher
d48d88b21e drm/radeon: disable bapm on KB
May cause stability problems on some boards.

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2013-10-23 16:25:18 -04:00
Alex Deucher
de926800b1 drm/radeon: use sw CTS/N values for audio on DCE4+
Use the driver calculated CTS and N values rather than
having hardware generate them.  This allows us to use
the modeline pixel clock rather than the actual pll clock
when setting up the dto for audio.  Fixes problems with
audio playback rate on certain asics if the pll clock
does not match the pixel clock exactly.

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2013-10-23 16:25:12 -04:00
Marc-André Lureau
5cab51cb33 drm/qxl: fix disabling extra monitors from client
To disable a monitor, a Spice client sends a monitor config with the
monitor resolution to 0x0.

However, before qxl_crtc_disable() is reached after the hotplug event,
it can happen that another monitor is reconfigured, and
qxl_send_monitors_config() is called with the old config, which will
re-enable the monitor on the client.

Reset config if monitor is found disconnected, during
drm_helper_hpd_irq_event().

Signed-off-by: Marc-André Lureau <marcandre.lureau@redhat.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
2013-10-23 14:21:48 +01:00
Marc-André Lureau
a40a60d912 drm/qxl: remove unnecessary check
All hard-coded resolutions are passing this check.

Signed-off-by: Marc-André Lureau <marcandre.lureau@redhat.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
2013-10-23 14:21:24 +01:00
Marc-André Lureau
b080742393 drm/qxl: prefer the monitor config resolution
By default, 1024x768 is the preferred resolution. However, when a
monitor config is given, it should be the only preferred resolution.

Note that the monitor config resolution is passed to
qxl_add_common_modes() to avoid adding a duplicate mode without the
preferred resolution. That would discard the previous monitor config
preferred bit.

Signed-off-by: Marc-André Lureau <marcandre.lureau@redhat.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
2013-10-23 14:21:22 +01:00