As reported by Aric Blumer, the pxa27x_udc driver does work
with pxa3xx devices. Add support into device files.
Reported-by: Aric Blumer <aric@sdgsystems.com>
Signed-off-by: Robert Jarzmik <robert.jarzmik@free.fr>
Signed-off-by: Matt Reimer <mattjreimer@gmail.com>
Signed-off-by: Eric Miao <eric.miao@marvell.com>
The default value is 16 IRQs. Zylonite needs 32, ASIC3 based boards need 70.
My problem is still that due to the way IRQ_GPIO is hardcoded, ASIC3 based boards
need 70 IRQs starting at IRQ_BOARD_START. If I define ASIC3 IRQs similar to LoCoMo
or SA1111, things break as soon as something selects PXA_HAVE_BOARD_IRQS.
Increasing the default number of board IRQs to 70 instead doesn't seem very nice.
Signed-off-by: Philipp Zabel <philipp.zabel@gmail.com>
Signed-off-by: Eric Miao <eric.miao@marvell.com>
The PXA_PWM config option is really redundant since the introduction
of HAVE_PWM, replace that with HAVE_PWM to avoid confusion.
Signed-off-by: Eric Miao <eric.miao@marvell.com>
PWMs on PXA168/910 start at number 1 instead of 0, (i.e. PWM1/2/3/4 instead
of PWM0/1/2/3 on PXA25x/PXA27x/PXA3xx). Allow this number to be specified
in pwm_id_table.
Signed-off-by: Eric Miao <eric.miao@marvell.com>
The Makefile.boot file for the U300 port. This will compile the
kernel for different ZRELADDR depending on the location of
physical RAM in the chosen configuration.
Signed-off-by: Linus Walleij <linus.walleij@stericsson.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
This can be used for other arm platforms too as discussed
on the linux-arm-kernel list.
Also check the return value with IS_ERR and return PTR_ERR
as suggested by Russell King.
Signed-off-by: Tony Lindgren <tony@atomide.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Define onboard devices for Freescale STMP3xxx boards
Signed-off-by: dmitry pervushin <dpervushin@embeddedalley.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Sascha Hauer wrote:
> On Tue, Jun 02, 2009 at 04:18:42PM -0400, Daniel Schaeffer wrote:
>> Add basic support for the Logic i.MX27LITE board.
>>
>> Signed-off-by: Daniel Schaeffer <daniel.schaeffer@timesys.com>
>
> Besides the comment made by Fabio this looks ok to me.
>
> Sascha
>
>
Fixed issues pointed out by Fabio and Magnus, and rebased to mxc-master head.
Signed-off-by: Daniel Schaeffer <daniel.schaeffer@timesys.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Currently, pxa27x_udc tries to use GPIO 0 as D+ pullup if not
explicitly configured. Default to an invalid GPIO (-1) instead.
Signed-off-by: Philipp Zabel <philipp.zabel@gmail.com>
Acked-by: Robert Jarzmik <robert.jarzmik@free.fr>
Signed-off-by: Eric Miao <eric.miao@marvell.com>
Add hook so that the HW RNG source on the TS-78xx is available.
Signed-off-by: Alexander Clouter <alex@digriz.org.uk>
Signed-off-by: Nicolas Pitre <nico@marvell.com>
This patch completely rewrites the rfkill core to address
the following deficiencies:
* all rfkill drivers need to implement polling where necessary
rather than having one central implementation
* updating the rfkill state cannot be done from arbitrary
contexts, forcing drivers to use schedule_work and requiring
lots of code
* rfkill drivers need to keep track of soft/hard blocked
internally -- the core should do this
* the rfkill API has many unexpected quirks, for example being
asymmetric wrt. alloc/free and register/unregister
* rfkill can call back into a driver from within a function the
driver called -- this is prone to deadlocks and generally
should be avoided
* rfkill-input pointlessly is a separate module
* drivers need to #ifdef rfkill functions (unless they want to
depend on or select RFKILL) -- rfkill should provide inlines
that do nothing if it isn't compiled in
* the rfkill structure is not opaque -- drivers need to initialise
it correctly (lots of sanity checking code required) -- instead
force drivers to pass the right variables to rfkill_alloc()
* the documentation is hard to read because it always assumes the
reader is completely clueless and contains way TOO MANY CAPS
* the rfkill code needlessly uses a lot of locks and atomic
operations in locked sections
* fix LED trigger to actually change the LED when the radio state
changes -- this wasn't done before
Tested-by: Alan Jenkins <alan-jenkins@tuffmail.co.uk>
Signed-off-by: Henrique de Moraes Holschuh <hmh@hmh.eng.br> [thinkpad]
Signed-off-by: Johannes Berg <johannes@sipsolutions.net>
Signed-off-by: John W. Linville <linville@tuxdriver.com>
Remove the __initdata annotation for the clock lookups, since they will
be needed when loading modules which use clk_get().
Tested-by: Agustín Ferrín Pozuelo <gatoguan-os@yahoo.com>
Signed-off-by: Rabin Vincent <rabin@rab.in>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Currently, whenever an erratum workaround is enabled, it will be
applied whether or not the erratum is relevent for the CPU. This
patch changes this - we check the variant and revision fields in the
main ID register to determine which errata to apply.
We also avoid re-applying erratum 460075 if it has already been applied.
Applying this fix in non-secure mode results in the kernel failing to
boot (or even do anything.)
This fixes booting on some ARMv7 based platforms which otherwise
silently fail.
Acked-by: Catalin Marinas <catalin.marinas@arm.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Define ARCH_KMALLOC_MINALIGN in asm/cache.h
At the request of Russell also move ARCH_SLAB_MINALIGN to this file.
Signed-off-by: Martin Fuzzey <mfuzzey@gmail.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
On Thu, May 28, 2009 at 08:42:23PM +0200, Sascha Hauer wrote:
> > > Mail-Followup-To: Daniel Mack <daniel@caiaq.de>,
> > > linux-arm-kernel@lists.arm.linux.org.uk
> >
> > ... which causes my mutt to only reply to the list.
>
> Ah, ok. /me hacking in muttrc... Does it work now?
Yep :)
> > mxc_register_device(&mxc_uart_device0, &uart_pdata);
> > + mxc_register_device(&mxc_uart_device1, &uart_pdata);
> > + mxc_register_device(&mxc_uart_device2, &uart_pdata);
>
> What about the RXD3/TXD3 pins?
You're right - I got the IOMUX tables wrong and thought UART0 pins are
selected unconditionally. But as it turns out TXD1/RXD1 is for UART0
(mxc_uart_device0), TXD2/RXD2 for UART1 (mxc_uart_device1) etc.
Below is a new patch.
Thanks,
Daniel
From e7eb5fa0fed09d667a4b2f168fe466e2cc645abb Mon Sep 17 00:00:00 2001
From: Daniel Mack <daniel@caiaq.de>
Date: Wed, 27 May 2009 12:22:51 +0200
Subject: [PATCH] ARM: MX3: add two more UARTs to lilly-1131-db
Signed-off-by: Daniel Mack <daniel@caiaq.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Conflicts:
arch/mips/sibyte/bcm1480/irq.c
arch/mips/sibyte/sb1250/irq.c
Merge reason: we gathered a few conflicts plus update to latest upstream fixes.
Signed-off-by: Ingo Molnar <mingo@elte.hu>
This adds a defconfig for the U300 series ST-Ericsson mobile
platforms. It will be maintained to enable the maximum set of
drivers so as to provide a good regression testing target for
these platforms.
Signed-off-by: Linus Walleij <linus.walleij@stericsson.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Support for Palm LifeDrive's internal harddrive.
Signed-off-by: Marek Vasut <marek.vasut@gmail.com>
Acked-by: Jeff Garzik <jgarzik@redhat.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
This CPU generates synchronous VFP exceptions in a non-standard way -
the FPEXC.EX bit set but without the FPSCR.IXE bit being set like in the
VFP subarchitecture 1 or just the FPEXC.DEX bit like in VFP
subarchitecture 2. The main problem is that the faulty instruction
(which needs to be emulated in software) will be restarted several times
(normally until a context switch disables the VFP). This patch ensures
that the VFP exception is treated as synchronous.
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
Cc: Nicolas Pitre <nico@cam.org>
Starting with ARMv6, the CPUs support the BE-8 variant of big-endian
(byte-invariant). This patch adds the core support:
- setting of the BE-8 mode via the CPSR.E register for both kernel and
user threads
- big-endian page table walking
- REV used to rotate instructions read from memory during fault
processing as they are still little-endian format
- Kconfig and Makefile support for BE-8. The --be8 option must be passed
to the final linking stage to convert the instructions to
little-endian
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
The IRQ_* macros need to be made visible via the mach/irqs.h file but
without the additional macros defined in the board-*.h files.
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
_sdata and __bss_stop are common symbols defined by many architectures
and made available to the kernel via asm-generic/sections.h. Kmemleak
uses these symbols when scanning the data sections.
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
This patch adds a comment to the proc-v7.S file for the setting of the
PRRR and NMRR registers. It also sets the PRRR[13:12] bits to 0
(corresponding to the reserved TEX[0]CB encoding 110) to be consistent
with the documentation.
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
The SWP instruction has been deprecated starting with the ARMv6
architecture. On ARMv7 processors with the multiprocessor extensions
(like Cortex-A9), this instruction is disabled by default but it can be
enabled by setting bit 10 in the System Control register. Note that
setting this bit is safe even if the ARMv7 processor has the SWP
instruction enabled by default.
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
If a process is interrupted during an If-Then block and a signal is
invoked, the ITSTATE bits must be cleared otherwise the handler would
not run correctly.
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
Cc: Joseph S. Myers <joseph@codesourcery.com>
There are additional bits to set for the ARMv7 SMP extensions in the
TTBR registers. The IRGN bits order is counter-intuitive but it allows
software built for the ARMv7 base architecture to run on an
implementation with the MP extensions.
Signed-off-by: Tony Thompson <Anthony.Thompson@arm.com>
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
ARMv7 SMP hardware can handle the TLB maintenance operations
broadcasting in hardware so that the software can avoid the costly IPIs.
This patch adds the necessary checks (the MMFR3 CPUID register) to avoid
the broadcasting if already supported by the hardware.
(this patch is based on the work done by Tony Thompson @ ARM)
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
If CONFIG_LEDS is enabled, it makes more sense to toggle one LED per CPU
in SMP systems rather than a single LED for all the CPUs.
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
This patch adds a Kconfig option for specifying whether Linux will only
be run in secure mode on the RealView PB1176 platform. Enabling it will
make the secure flash memory block (64MB @ 0x3c000000) available to
Linux.
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
