Enable more checks and add more debug logs for AD BL attenuation
functionality tests.
Change-Id: I088657bdbed553970c3550aab5bdc399970d9b23
Signed-off-by: Ping Li <quicpingli@codeaurora.org>
If unable to map a buffer, set the pipe in a non-buffer mode which would
cause it to go to a black solid fill. This is better than fetching from
a stale address or a buffer with a different frame configuration.
Change-Id: Ia5b281e695a096c885a2eae0f96126cd3b4da828
Signed-off-by: Adrian Salido-Moreno <adrianm@codeaurora.org>
When turning off command mode panel, if retire fences are still active
and suspend sequence goes through some fences may remain active.
If fences remain active command panel off sequence would stop signaling
vsyncs and would throw off the timeline. To fix this clear the retire
timeline when turning panel off.
Change-Id: I32a5fe0f81b16fa2ef959c7f05e484fb9f9f8598
Signed-off-by: Adrian Salido-Moreno <adrianm@codeaurora.org>
While applying dynamic refresh rate, there is a possibility of
failure to apply new refresh rate and has to release all resources
acquired. Remove the clock vote in the case of failure to
apply new refresh rate.
Change-Id: I882b51a94499b1984b10b176ed9dac3daf595d81
Signed-off-by: Jeevan Shriram <jshriram@codeaurora.org>
When continuous splash screen feature is enabled, the panel is left
turned on by the bootloader. In such cases, we need to request all
the GPIOs used by the DSI driver at probe time. In the current
implementation, the GPIOs are not requested if certain panel specific
flags are set. This results in a bug when an attempt is made to free
these GPIOs when the device is suspended. Fix this by ensuring that
the GPIOs are requested unconditionally.
Change-Id: If0bea80aab819aeafdaaedf81451d5fa64d4e76d
CRs-Fixed: 684253
Signed-off-by: Aravind Venkateswaran <aravindh@codeaurora.org>
Histogram bin count variable was being allocated insufficient
space in compat ioctl for histogram read.
Correcting the space being allocated to the member variable
bin_cnt in histogram read.
Change-Id: I91111037ee5c73f8090d867b4924d3dc59b91d97
Signed-off-by: Krishna Chaitanya Parimi <cparimi@codeaurora.org>
The MSMFB_NOTIFY_UPDATE ioctl is defined based on sizeof(unsigned int).
However, we use the incorrect size when copying to and from userspace.
The sizes for copying have been fixed to match the ioctl definition.
Change-Id: I0f63228e5b4ad936d89c5f2bcbd84204037a0edf
Signed-off-by: Benet Clark <benetc@codeaurora.org>
Fix the AD backlight attenuation implementation by sending the
attenuation backlight to both panel and AD HW block, to achieve power
saving.
Change-Id: I64c79d7aa439a8d9e722b4b098c0b163fd115699
Signed-off-by: Ping Li <quicpingli@codeaurora.org>
TG control register is double buffered register. When
disable, it will only take effect once vsync has come.
So wait for at least once vsync to ensure TG is off.
Change-Id: I35d8c8be4bc72ababd2a04bb7718688404d775eb
Signed-off-by: Sandeep Panda <spanda@codeaurora.org>
Clean up trace points to generate proper pingpong and
post processing trace points in display commit.
Change-Id: I7fe696515482f77ee90f0fec88e5778868399896
Signed-off-by: Jeevan Shriram <jshriram@codeaurora.org>
In the current implementation, we are waiting for ping pong
interrupt only for the first control. There is a possibility
that the second control takes more time than the first. As the
commit call is asynchronous next kickoff could get triggered.
This causes dsi fifo to underflow and eventually pingpong timeout
are observed.
This change fixes the issue by waiting for second control's
pingpong done interrupt, to ensure that the tx to dsi
controller is complete before the next commit is triggered.
Change-Id: Ie8caf36744b3f5860962ad30d19d61d0a6de2763
Signed-off-by: Jeevan Shriram <jshriram@codeaurora.org>
Correct the 480p clockrate to ensure HDMI pll
locks when connected to a 480p sink.
Change-Id: I93b49390c534966b86cb73bf02bdf25f5b12890e
Signed-off-by: Casey Piper <cpiper@codeaurora.org>
For DSI read or write commands, they will also go through
axi bus. Earlier, we were only voting for the mdp bus bandwidth.
In the case where the mdp bus bandwidth vote is 0 and there is
a DSI transaction, it will result in DSI hang.
Change-Id: Iafd9e06ae2050665392c6c74fece8f20cb6d44b1
Signed-off-by: Xiaoming Zhou <zhoux@codeaurora.org>
Control path power on status should be checked before BTA status
check else command sending failure and IOMMU page faults during
bootup can be observed if ESD is enabled for device. Currently
IOMMU is not powered on when commands are being sent.
Change-Id: Ice66f38e79755eb14843fc63afe058e4bab2f0e2
Signed-off-by: Jayant Shekhar <jshekhar@codeaurora.org>
Add 8994 MDP version check for MISR offset
Change-Id: Idd1c8d902cd72684dad2bd1acabb8f9a5391ab76
Signed-off-by: Radhika Ranjan Soni <rrsoni@codeaurora.org>
In MDSS 1.8.0 WB2 intr status and intr enable bits has changed.
Handle this case only for WFD scenario as code path is common
for both WFD and rotator and it is affecting rotator use cases.
Change-Id: Id366bb2f3a7ac7b4195193c71d5823eeb152a315
Signed-off-by: Radhika Ranjan Soni <rrsoni@codeaurora.org>
One stub function was missing a return code and
another stub function was missing completely. Add these.
Change-Id: Ie09d51227230facc571fd0e17cc9765da94b7db1
Signed-off-by: Laura Abbott <lauraa@codeaurora.org>
It is possible to power collaps MDSS without configuring the DSI
lanes in Ultra Low Power State (ULPS). Add support for this by
configuring DSI clamps irrespective of whether ULPS feature is
enabled or not.
Change-Id: I0564216737cc6e98c1e8658862cf7af5dabd363c
Signed-off-by: Aravind Venkateswaran <aravindh@codeaurora.org>
msm8994 can support three additional blending stages in the layer
mixer bringing the total to 8 layers including the base stage.
Modify layer mixer programming to support additional blend stages.
Change-Id: Iff812ec2cf08e4234dc13c5630fe66ba07462b87
Signed-off-by: Sree Sesha Aravind Vadrevu <svadrevu@codeaurora.org>
Calling backlight lock on every commit iteration was adding
overhead. Altering the conditions to allow locking only for
case when unset backlight level is not zero.
Change-Id: I023dccfa584cf641d042565b7ad2cb32c0724c55
Signed-off-by: Krishna Chaitanya Parimi <cparimi@codeaurora.org>
Since the DSI ULPS clamping registers offset varies
from chipset to chipset, so read the offset values from
chipset specific mdss dtsi file.
Change-Id: I0dcdf8cf0d0f3f1851337e05add833fbdac0632c
Signed-off-by: Sandeep Panda <spanda@codeaurora.org>
Fix the current pwm backlight control implementation
to configure pwm channel only when it is defined
in devicetree.
Change-Id: I8613fa5564f98d3693455f35cf9912b03acf31ce
Signed-off-by: Chandan Uddaraju <chandanu@codeaurora.org>
fb_event_callback cancels the work queue when it receives
the power down event. However, this event occurs after the
panel & DSI have been turned off. So if the check_status
function was being called right when the panel is being
turned off, we have a race conditon. Hence add offlock
mutex to ensure that bta status check is done when dsi
is being turned off.
Change-Id: Ie341c002c4544376bda2940fa65c6eb13997ae17
Signed-off-by: Vineet Bajaj <vbajaj@codeaurora.org>
The bias voltage regulator is controlled by wled driver
for the sharp panel on 8994. Add support to control this
regulator to fix suspend/resume issues.
Add optional "qcom,dsi-panel-bias-vreg" property to
support this on specific platforms.
Change-Id: Ifb02a0467dc190e673781490a918c12293d41d58
Signed-off-by: Chandan Uddaraju <chandanu@codeaurora.org>
Use one dma pipe during block mode transaction instead of two pipes
for the buffer resolution greater than max mixer width
Change-Id: I2a9f1bba95bfb66d1c0168aa9b99b8b9de57cd6a
Signed-off-by: Ramkumar Radhakrishnan <ramkumar@codeaurora.org>
Add additional checks in dual dsi with dynamic fps(dfps) enabled.
This change fixes synchronization issues during mismatch of dfps
settings between the dsi controllers.
Change-Id: Ib98b779bec15b5b60cbba337724a0b1d093bda46
Signed-off-by: Jeevan Shriram <jshriram@codeaurora.org>
check if ovlist32 arg is valid before dereferencing it to
avoid NULL ptr or an invalid address access.
Change-Id: Ice0845ad0afdb20d7e101f114fc0a443d6aff19a
Signed-off-by: Nirmal Abraham <nabrah@codeaurora.org>
Signed-off-by: Raghavendra Ambadas <rambad@codeaurora.org>
At partial update, When broadcast mode enabled, dsi1 is used
to trigger dcs command to be sent to both panel. Therefore
set_col_page dcs command of dsi1 can not be skipped even its
roi has not changed.
CRs-Fixed: 679218
Change-Id: Id979433fc3993dfb5e6aee4b9779c2cde42617f1
Signed-off-by: Kuogee Hsieh <khsieh@codeaurora.org>
NRT clients need not to enable or disable danger/safe signalling.
So pipe used by non real time clients (e.g. writeback path) need
not enable or disable danger/safe signalling explicitly. Hence
add a check to ensure danger/safe signalling enabled only for
real time client at pipe_init and disabled at pipe_free.
Change-Id: I69b8b57620eb0c27193671632f9a97cccab073f3
Signed-off-by: Radhika Ranjan Soni <rrsoni@codeaurora.org>
With current iommu ref count implementation, iommu is
attached at points when only needed and detached once
finished. Iommu reference count in overlay pan display
path is currently missing hence add it. Also remove
code repetitions and unnecessary error checks while
decreasing iommu ref counts in overlay and writeback
path.
Change-Id: If1aed768e5d704dd6c9d4bfd17c1ec368c8d8711
Signed-off-by: Jayant Shekhar <jshekhar@codeaurora.org>
BW calculations of display controller depends on how many pipes are
staged on a given layer mixer (LM). Currently BW calculations are done
twice, once during PREPARE IOCTL to check if BW is within system defined
limits and other during commit IOCTL. During both calculations, we need
to find out how many pipes are staged on a give LM. When these
calculations are done during frame (n)'s PREPARE IOCTL, frame (n-1)'s
pipe stage information is used rather than frame (n)'s. This can lead to
false BW checks in PREPARE IOCTL and allows display controller with
configuration beyond its BW limits. Fix this by propagating frame (n)'s
intended number of staged pipes to BW calculation function.
Change-Id: I7561f6b020dc46ca356efac3f690bda1eb810ca4
Signed-off-by: Ujwal Patel <ujwalp@codeaurora.org>
Signed-off-by: Ingrid Gallardo <ingridg@codeaurora.org>
At Current implementation mutex is released after dcs
commands had been added to queue and before cmdlist_commit
called to tx commands. This is created a possibility to allow
other thread do take over command queue and call cmdlist_commit
to tx commands which not added by it. Extend mutex coverage to
including both cmdlsit_put and cmdlist_commit to fix the problem.
CRs-Fixed: 669136
Change-Id: I317adae2b39505d96afe1edd27f1a1ab813b343d
Signed-off-by: Kuogee Hsieh <khsieh@codeaurora.org>
Add MDP hw revision check to support panic/robust signalling
feature for msm8939. This feature enables MDP hardware to send
panic/robust signal to bimc based on fill level for all pipes
connected to realtime interfaces.
Change-Id: Idf8908eb6e4d2827d02f929161e43b58ca56757a
Signed-off-by: Radhika Ranjan Soni <rrsoni@codeaurora.org>
Fix overriding of rgb_swap parameter in dsi driver,
as this should be read and set from panel dtsi file.
Change-Id: I1ed35f0dc4ce623ebcf3bc8e563a9d10d34a4a70
Signed-off-by: Sandeep Panda <spanda@codeaurora.org>
Add support to dynamically switch between dsi video
mode and command mode for MDP3 driver. For a panel which
is configured in video mode and can support command mode,
it would be power efficient to dynamically switch to
command mode on need basis.
Change-Id: Iefb3c8aa453a8be4396fd04b65dcc462d01e26fb
Signed-off-by: Shivaraj Shetty <shivaraj@codeaurora.org>
Calling blank/unblank after locking the backlight mutex will result
in mutex lockup as blank/unblank would again try to aquire the same
lock. Avoid this situation in Dynamic Switching.
Change-Id: I7ddb2afec605f236071976420e0d6bd0c707e4d0
Signed-off-by: Shivaraj Shetty <shivaraj@codeaurora.org>
Compiling the kernel with the -O2 GCC flag reveals a number
of warnings relating to potentially uninitialized variables
and other edge cases.
Change-Id: I3758dbe1af276d79f55188b9f2db850c730acb80
Signed-off-by: Stepan Moskovchenko <stepanm@codeaurora.org>
MDSS interface timing engine registers need to be flushed
only once during the first commit to the respective panel.
Change-Id: I7a619f2eeeb57baf5429346a11eb41eedac252f3
Signed-off-by: Sree Sesha Aravind Vadrevu <svadrevu@codeaurora.org>
The recovery handler is used in the dsi event thread, and
the recovery handler variable was configured from a different
thread. Earlier, there is no synchronization between the two
threads when accessing the recovery handler, causing kernel
panics.
Change-Id: Iee990276fdabd65e2e1f2e3c21ad574fc0d8a7bc
Signed-off-by: Xiaoming Zhou <zhoux@codeaurora.org>
Populate shared memory length during probe for availability
to userspace through FSCREENINFO ioctl. Also, ensure that fb
length is always available.
Change-Id: I94d3f83098fbfd81a7aa20f6fc1f19e756aebc4e
Signed-off-by: Jeevan Shriram <jshriram@codeaurora.org>
Currently MDP is attaching/detaching iommu based on
bus bandwidth requests. This can lead to performance
issues, so implement ref count on iommu such that
iommu is attached where needed.
Change-Id: Ic4d35e2dc7f83291d1ab93d3e0109a2d69c98844
Signed-off-by: Jayant Shekhar <jshekhar@codeaurora.org>
Add support for new 20nm PLL clock driver to handle
different DSI panel resolutions. Add seperate files
to support this new 20nm PHY PLL block.
Change-Id: I4ee5309449f317daddba7106cb8e1829fd6e76cf
Signed-off-by: Chandan Uddaraju <chandanu@codeaurora.org>
Previously, we were checking the error value for mdss bus_scale_register
incorrectly. Now we check the error value for null rather than a negative
value.
Change-Id: If7fda0584df82d6c007829f2e63af9b735cafb7e
Signed-off-by: Benet Clark <benetc@codeaurora.org>
The msm register bus is currently configured by postprocessing. If the
mdss driver wants to modify the msm register bus bandwidth at any point
in the future, then the bus should be configured in a more central
location of the mdss driver.
Change-Id: I4ae65f4448f0b2be1371446d08bd4ab55c830d19
Signed-off-by: Benet Clark <benetc@codeaurora.org>
Similar to RGB fixed MMB's, msm8994 reserves fixed MMB's for VIG pipes too.
Parse fixed MMB allocation for VIG pipes from device tree and update
MMB alloc map.
Change-Id: Ie7c7dea77fe8a2afc6bfeffdb5d7f69c48b802cd
Signed-off-by: Jeykumar Sankaran <jsanka@codeaurora.org>
The timing engine flush registers for display interfaces need to be
programmed before enabling their respective timing generators.
Change-Id: I6144233e9dbad5ce5699652fac4834f0744fe2e0
Signed-off-by: Sree Sesha Aravind Vadrevu <svadrevu@codeaurora.org>
When source split is disabled on split display panels, a layer can be
split un-evenly into two pipes. When in this condition along with
vertical decimation specified by user-space, it is possible that driver
infuse extra decimation if per pipe BW is exceeded. Now when we do this,
it is possible that both halves of the same layer get different decimation
and can lead to quality difference between two panels. Fix this by not
allowing extra decimation when split display is enabled.
Change-Id: Ib47953fd94400b01d02ee07059bf008310abbc84
Signed-off-by: Ujwal Patel <ujwalp@codeaurora.org>
